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Welcome to the HIR Workshop at ECTC
The HIR International Roadmap Committee would like to thank everyone who contributed to the completion
of the first edition of our peer reviewed roadmap
• Sponsoring institutions• Global Advisory Council• Corporate meeting sponsors • Participants in our workshops• Technical Working Group Chairs• All contributing TWG members • Denise Manning
A Brief History Of The Semiconductor Technology
Slide 3
4
Point Contact Transistor 1947Shockley, Brattain and Bardeen
1st Integrated Circuit 1958 Jack Kilby
1st FinFet 1998 Hiamoto et al
11 years
First CMOS IC 1963Frank Wanlass
5 years
Moore’s Law 1965
2 Yrs
33 years???????3D Heterogeneous system integration at the package level
Our Industry has reinvented itself many times
40 Year DRAM Memory Capacity IncreaseJohn Hennessy at DARPA ERI Conference July 2018
Progress in functional density has slowed
40 Years Of Progress In ComputingJohn Hennessy at DARPA ERI Conference July 2018
Progress in performance has slowed
2006• Exxon Mobil
• General Electric• GazpromMicrosoft
• Citicorp• Bank of America• Royal Dutch Shell
• BP• Petro China• HSBC
2018Apple
AmazonAlphabet (Google)Microsoft
FacebookAlibaba• Berkshire Hathaway
Tencent Holdings• JP Morgan Chase• ExxonMobile
Companies In The Increasingly Connected WorldSources: The Economist, Statista
Change is driven by explosive growth in data generated & global network traffic
Structure of the economy has changed
Semiconductor Research Opportunities“An Industry Vision & Guide”
“The path forward is not as clear as it was during the Moore’s Law era. However, the enormous potential for economic and societal benefits—some that are envisioned and others yet to be imagine.” SIA & SRC March 2017
Heterogeneous Integration is the path forward
Slide 9
Technology Roadmapping History1991World’s first Open Source Technology Roadmap, the National Technology Roadmap for Semiconductors (NTIS) sponsored by the US Semiconductor Industry Association 1998NTIS expanded forming the first Global Technology Roadmap. Europe, Japan, Taiwan, and Korea joined. It was renamed International Roadmap for Semiconductors (ITRS).
2014 The benefits of Moore’s Law scaling diminishing and decision was made to end ITRS.
2016The last edition of the ITRS was published July 8, 2016
We have a History 2015ITRS Heterogeneous Focus Group signed an agreement with the IEEE CPMT society that initiated what is HIR today.2016The last edition of ITRS Published July 8, 2016 and the institutional sponsorship, governance document were prepared and approved.2017Institutional sponsorship expanded to 5, 19 Technical working groups were initiated, 27 workshop sessions around the world, 947 cumulative participants 2018TWGs expanded to 23, First annual symposium in February, 27 workshop sessions around the world, first presentations by each TWG in parallel sessions at ECTC 2019Second Annual Symposium in February, TWG structure revised to 21 by combining where appropriate, All TWGs presenting at ECTC, Formal publication of peer reviewed Chapters
Today’s Workshop has a new Focus
In the hundreds of meetings and conference calls since HIR began, we have focused on generating an applications based roadmap that predicts difficult challenges well in advance of the time they could become a roadblock. This goal was also at the heart of the ITRS predecessor roadmap.Today our presentations will focus on identifying additions and modifications for the second HIR edition to be published in 2020.We need the active participation of everyone attending to contribute their ideas and constructive criticism to help guide work on HIR 2020.
IEEE Heterogeneous Integration Roadmap HIR Workshop at ECTC
Tuesday May 28th, 20198:00 AM to 5:30 PM
Condesa 3 (2nd Floor)
ECTC has many activities today and we understand that participants will go in and out to attend other activities they are committed to. We must keep our schedule on time so
everyone will know the time of each presentation.
HI for Market Applications Design
High Performance Computing and Data Center Co-Design
IoT Simulation
Medical, Health and Wearables Cross Cutting topics
Automotive Materials & Emerging Research Materials
Aerospace and Defense Emerging Research Devices
Mobile Supply Chain
Heterogeneous Integration Components Security
Single Chip and Multi Chip Integration (including Substrates)
Thermal Management
Integrated Photonics Integration Processes
Integrated Power Electronics SiP and Module
MEMS & Sensor Integration 3D & Interconnect
RF and Analog Mixed Signal WLP (fan in and fan out)
https://eps.ieee.org/technology/heterogeneous-integration-roadmap.html
HIR Workshop at ECTC
8:00 – 8:15 am REGISTRATION & COFFEE8:15 – 8:45 am Workshop OPENING (IRC and TWG Chairs)
Review of AgendaAnticipated Outcome of WorkshopCelebration of Release of HIR Version 1.0
Session 1 Heterogeneous Integration for High Performance
8:45 – 10:12 am Chair: Bill Bottoms, IEEE EPS and 3MTS
8:45 – 8:57 High Performance Computing & Data Center: Kanad Ghose (Binghamton University), Dale Becker (IBM)
8:57 – 9:09 3D & Interconnect: Ravi Mahajan (Intel), Subramanian Iyer (UCLA)9:09 – 9:21 Integrated Photonics: Bill Bottoms (3MTS), Amr Helmy (University of
Toronto) 9:21 – 9:33 Thermal Management: Madhu Iyenger (Google), Avi Bar-Cohen (Raytheon),
Azmat Malik (Acuventures) 9:33 – 9:45 WLP (fan in and fan out): John Hunt (ASE), Rozalia Beica (DOW)9:45 – 9:57 Test: Dave Armstrong (Advantest)9:57 – 10:12 Q&A
BREAK
Session 2: Heterogeneous Integration for Consumer & Industrial Applications
10:24 – 11:40 pmChair: Ravi Mahajan, ASME/EPPD and Intel10:24 – 10:36 SiP & Module: Rolf Aschenbrenner (Fraunhofer IZM), Klaus Pressel (Infineon) 10:36 – 10:48 Mobile: Benson Chan (Binghamton Univ), Bill Chen (ASE)10:48 – 11:00 Single Chip and Multi Chip Integration: Kyu-oh Lee (Intel), William Chen (ASE),
Annette Teng (Promex) 11:00 – 11:12 Co-Design: Jose Schutt-Aine (University of Illinois)11:12 – 11:24 Simulation: Chris Bailey (University of Greenwich), Xuejun Fan (Lamar
University) Richard Rao (Microsemi)11:24 – 11:40 Q&A
Lunch Break11:40 AM-1:00 PM
Lunch is Provided here for all speakers and session chairs
Lunch: Restaurant OptionsLardo (Level 2), Overlook Grill (Level 4), Estiatorio Milos (Level 3),
Hattie B’s Hot Chicken (Level 2), The Henry (Level 1), Tekka Bar (Level 2)Jaleo (Level 3)
Please be back in time for the panelAudience participation is an important part of the panel session
Roadmap Publication Status
• Everyone who is registered for this meeting will receive a link sometime next week to access HIR Chapters.
• Peer reviews are complete for the initial chapters to be released• There will be a rolling release as additional chapters complete their
peer reviews.If you want to receive this initial distribution please make sure that
you have signed with Denise.
Session 3: Heterogeneous Integration for Special Applications
1:00 – 1:45 Plenary Panel: How does the world use Roadmaps? Why do your institutions support your work contributing to the HIR1:45 – 3:00pmChair: Paul Trio, SEMI 1:45 – 1:57 Aerospace & Defense: Tim Lee (Boeing), Jeff Demmin (DARPA) 1:57 – 2:09 5G & RF Analog Mixed Signal: Tim Lee (Boeing), Herbert
Bennett (Alta Tech)2:09 – 2:21 Security: Sohrab Aftabjahani (Intel) Remote 2:21 – 2:33 Integrated Power Electronics: Patrick McCluskey (UMD), Doug Hopkins (NCSU)2:33 – 2:45 MEMS & Sensor Integration: Benson Chan (Binghamton Univ)2:45 – 3:00 Q&A
BREAK
Session 4: Heterogeneous Integration Applications, Materials & Simulation3:09 – 5:30pmChair: Bill Bottoms, IEEE EPS and 3MTS3:09 – 3:21 Automotive: Rich Rice (ASE), Urmi Ray 3:21 – 3:33 Medical and Health & Wearables: Jan Vardaman (Techsearch),
Mark Poliks (Binghamton U), Nancy Stoffel (GE)3:33 – 3:45 Break3:45 – 3:57 Materials & Emerging Research Materials: Bill Bottoms (3MTS)3:57 – 4:09 Supply Chain: Paul Trio (SEMI), Tom Salmon (SEMI)4:09 – 4:21 Q&A4:21 – 4:33 WRAP UP: Ravi Mahajan4:33 – 5:00 Information on Release of HIR version 1.0: Download & Roadmap Use5:00 – 5:30 Cake & Coffee
HIR Current Scheduled Events for 2019TWG Chairs, Co Chairs and members are to attend at least one face to face meeting
• 2nd HIR Annual Symposium 2/21-22 SEMI Headquarters• SEMICON China Shanghai, China CSTIC 3/18-19/2019• EuroSimE Hannover, Germany 3/24-27/2019• ICEP Niigata 4/17-20/2019• ECIO, Ghent, Belgium 4/24-26/2019• Advanced Semiconductor Manufacturing Conference 5/6-9/2019• ECTC Las Vegas, NV 5/28-31/2019• VLSI Symposium 6/9/2019• NordPac Denmark 6/11-13/2019• Palo Alto Meeting 7/7/2019• SEMICON West San Francisco, CA 7/8-11/2019• ICEPT Hong Kong 8/11-15/2019• Electronics Packaging Symposium Niskayuna, NY 9/5-6/2019• HIR Workshop with EPS Japan, JIEP & SEMI Japan Tokyo, Japan TBD• IMAPS Boston, MA 10/1-3/2019• INTERPACK 2019 Anaheim, CA 10/7-9/2019• IMPACT Taiwan 10/24-26/2019• SEMICON Europa Germany 11/12-15/2019• ICSJ Kyoto, Japan 11/18-20/2019• IEDM 12/9-11/2019
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