Development of MSP430-based ultra-low power expandable underwater acoustic recorder

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Ocean Engineering 36 (2009) 446–455

Contents lists available at ScienceDirect

Ocean Engineering

0029-80

doi:10.1

� Corr

E-m

journal homepage: www.elsevier.com/locate/oceaneng

Development of MSP430-based ultra-low power expandable underwateracoustic recorder

Chau-Chang Wang a,�, Yu-Hung Hsiao b, Min-Chih Huang b

a Institute of Undersea Technology and the Asian Pacific Ocean Research Center, National Sun Yet-sen University, Kaohsiung 804, Taiwanb Department of Systems and Naval Mechatronic Engineering, National Cheng Kung University, Tainan 701, Taiwan

a r t i c l e i n f o

Article history:

Received 5 August 2008

Accepted 8 January 2009Available online 23 January 2009

Keywords:

Ultra-low power

MSP430 MCU

Master-slave architecture

Underwater acoustic recorder

Long-term deployment

18/$ - see front matter & 2009 Elsevier Ltd. A

016/j.oceaneng.2009.01.008

esponding author. Tel.: +886 7 5252000x5276

ail address: [email protected] (C.

a b s t r a c t

Reducing overall power consumption is core issue in low power, high sampling rate, large storage data

loggers necessary for long-term underwater acoustics research and other applications. A low-power

microprocessor MSP430 offers a solution for the development of long-term deployment remote

systems. In this paper, we present a multi-MSP430, master-slave architecture to resolve the power

limitation issue. The proposed design is scalable in nature. For every additional slave unit installed in

the array, the data sampling and streaming rate can be increased proportionally. We demonstrate the

advantages of this concept using a multi-channel underwater acoustic recorder with a 100 kHz

sampling rate. The performance of the system is demonstrated by a field acoustic experiment in which

the reflection coefficient of the seafloor is measured. The proposed architecture will be applicable to

many underwater long-term deployment systems. With its flexibility in configuration and synchroniza-

tion of multi-channel sampling, it also provides a simple architecture for the construction of

hydrophone arrays.

& 2009 Elsevier Ltd. All rights reserved.

1. Introduction

When studying underwater acoustics in an indoor laboratorysetup, signal acquisition generally does not pose problemsbecause many off-the-shelf products are available for a rangeof configurations and applications. These solutions are generallyimplemented on a PC or a rugged industrial chassis. Moreover,electric power supply, data storage and communications areassumed to be handy and unlimited. However, when investigatingacoustics in the underwater environment, all these conditions areeither too expensive or impossible. A feasible approach forunderwater instruments must overcome these constraints.

Ocean environment is full of noises from a variety of sources.A broad band of acoustic signals, from several Hz to severalhundred kHz, can be found (Wenz, 1962). For example, marinemammals make sounds in frequencies ranging from 100 Hz to150 kHz (Au, 1993). Raindrops falling on the sea surface createbubbles which generate loud noises in the range of 1–50 kHz asthey collapse (Nystuen, 2001). Ship traffic radiates noise from 1 to10 kHz (Corcker, 1998). To study these ocean acoustic phenomena,sound is measured in the field and then analyzed in situ or post-processed in the laboratory. For measuring sound in the field,if the site is not far from the shore, a cabled system is generally

ll rights reserved.

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-C. Wang).

adopted. However, deployment and maintenance of cable systemsis costly. Moreover, coastal waters are generally full of humanactivities, subjecting underwater cables to the constant risk ofbeing damaged by trawling and anchoring.

For both cabled or stand-alone systems, the ocean environ-ment poses challenges for power supply, data storage, and systemstability. If the study site is too far from the coast, too deep, or toocostly for a cabled system, stand-alone and self-contained loggingsystems are deployed on the seafloor. Regular service is needed toretrieve data and replace the battery pack.

To address these problems, Ma and Nystuen (2005) developedan autonomous acoustic recorder called Passive Aquatic Listeners(PALs). This instrument consists of a microprocessor, a low-noise10/20 dB amplifier board, a hydrophone, and a battery pack. Themicroprocessor is a low-power Persistor microcontroller whichhas 8 channels of 10-bit AD, 16 I/Os, and a CF card interface fordata storage. The system was designed to record rainfall acousticspectrum in the ocean for up to one year. In order to achieve long-duration measurement, PAL normally stays in ‘‘sleep’’ modeto save power. It wakes up once every one or two minutes(programmable) to measure environment noise at a 100 kHzsampling rate for 4.5 s to obtain the spectrum. If the spectrumcontains the signature of rainfall, the system will pick up thehydrophone signal, calculate, and store the spectrum continuouslyuntil the rainfall signature vanishes from the spectrum. To reducethe size of the memory storage needed, the system does not savethe signal time series but only the spectrum. The 10/20 dB

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C.-C. Wang et al. / Ocean Engineering 36 (2009) 446–455 447

amplifier board also provides options to capture the signal withappropriate scale. Taking this project as an example, we can seethe issues of power and memory management are core issues forlong-term deployment instruments.

To record acoustic signals continuously in the ocean, Wiggins(2003) developed a low-power, high-data capacity autonomousacoustic recorder called the Autonomous Acoustic RecordingPackage (ARP). ARP consists of an OS500 data logger manufac-tured by Ocean Sensor Corporation, a hydrophone, two 36 GB SCSIdisks for data storage and battery packs. Given the large capacityof the SCSI hard disk drives, memory constraints are not an issue.The power consumption of the OS500 and hydrophone areapproximately 600 mW without the SCSI disk drives. The batterypacks consist of two lithium batteries, a 580 A h (ampere-hour)/10 V for the OS500 data logger, and a 135 A h/17 V for the SCSI diskdrives. The system provides a 1000 Hz sampling rate, and supportslong-term deployments of up to one year.

Burgess et al. (1998) developed a low-power autonomousrecording system, called CAP, 36 cm long and 10 cm diameter. It iscapable of withstanding depths of 2000 m and records acousticsignals at 5 kHz for up to 10 h, along with temperature and depthlogging. This device is so compact that it can be tagged on marinemammals to study their behavior. Later, CAP was upgraded to aneven more compact and power-efficient version called Bioprobe.The acoustic sampling rate of the new model can be set to anynumber between 100 Hz and 20 kHz with 16-bit resolution. Thesystem uses flash-memory as the data storage medium, and isthus more power efficient. With a 1.5 Ah/3.6 V alkaline cell, it canoperate at a 2 kHz acoustic sampling rate for up to 41 h. Thodeet al. (2006) used the design of the Bioprobe as the core of loggingdevices in a four-element vertical array to record and track marinemammals.

Recently, other projects have applied the Bioprobe architecturein developing a new generation of compact and ultra-low poweracoustic loggers for marine mammal protection (Johnson andTyack, 2003; Madsen and Wahlberg, 2007).

For marine mammal monitoring, Wiggins and Hilderbrand(2007) used a 32-bit, 20 MHz microcontroller as the platform toconstruct a long term (months) and broadband (200 kHz)autonomous underwater acoustic recorder. Because the monitor-ing needs to record continuously at a high sampling rate,data storage volume and battery power pack capacity are twochallenging engineering problems. Their solution was an arrayof laptop 2.500 disk drives (1.9 TB) as the storage medium. Tomanage power efficiently, the data are stored in a 32 MB RAMbuffer prior to streaming to the disk drives. Using this technique,only one drive in the array is activated for a short period of writingtime. Power consumption is thus reduced substantially.

A recent development is Ecological Acoustic Recorder (EAR)of Lammers et al. (2008), which monitors biological activityon coral reefs and in surrounding waters. This microprocessor-based autonomous recorder samples the ambient sound fieldperiodically and automatically detects sounds which meet certaincriteria. With several power packs (each power pack consistsof seven high-capacity alkaline D-cell in series), the system canoperate up to one year. With its programmable recording dutycycle and power pack module arrangement, the system can beeasily configured to meet different needs of environmentmonitoring projects.

The aforementioned projects show that engineers must tradeoff among long-term deployment, sampling rate, and data storagecapacity when constructing stand-alone, non-cabled underwaterlogging systems. High sampling rates and long operating periodsrequire greater data storage and high-performance microproces-sors. This in turn creates demand for large disk drives thatconsume more power. The resulting large battery packs increase

the size and weight of the system, impairing its portability.Fortunately, ongoing developments in microprocessors and flash-memory based storage have created new possibilities for thedevelopment of stand-alone, non-cabled underwater loggingsystems.

One of the new generation of ultra-low power microcontrollersis the MSP430 MCU (Micro Controller Unit) from Texas Instru-ments. It is specifically designed for battery-operated productslike MP3 players, hand-held meters, and medical equipment.Its architecture significantly reduces both power consumptionand the complexity of peripheral circuits. In this research we usethe MSP430 MCU to design an architecture which is scalableand expandable in sampling rate, data storage, and numberof digitizing channels, at milliwatt power levels. We call it theUltra-Low Power Expandable Acoustic Recorder (UPEAR).

2. Hardware architecture

The performance of data logging systems is usually limited bythe bottlenecks of AD conversion speed and data streaming rate.Our design strategy is to fully exploit a single ultra-low powerMCU, rather than using a more powerful microprocessor or DSP.To overcome the challenges of high-speed data acquisition andstreaming, not only a fast AD conversion circuit, but also aneffective way to continuously stream data into a storage mediumwithout interrupt is needed. Streaming large quantities of datainto a storage medium is generally achieved by adoptinga powerful CPU and a high-speed data bus. This inevitablyintroduces complicated architecture and consumes more power.Such an approach is not an optimum solution for low powerstand-alone systems.

The MSP430 MCU has a series of models with different numberof AD channels, digital I/Os, buffer and flash-memory sizes, andoptional peripherals such as LCD drivers. Compact in size, theyare extremely low in power consumption, ranging from roughly10 mW in the active mode to less than a fraction of a mW in sleepmode. All models come in different packaging formats, includingQFN, LQFP, SSOP, and DIP. They can be as small as 12�12�1.5mm. Many MSP430 models have a 100 kHz AD sampling rate,sufficient to meet the requirement for underwater acousticrecording, since ocean environmental noise is generally lowerthan 50 kHz (Wenz, 1962). The unit cost for an MSP430 MCU isalso low, less than 10 USD a piece for most models. The MSP430 isthus very cost-effective compared with PC- or DSP-based solu-tions. However, a single MSP430 MCU does not have the capacityto execute all the tasks (multi-channel AD conversion, real-timeclock stamping, and data streaming) needed for a data acquisitionsystem running at a high sampling rate. We thus use multipleMSP430 MCUs to construct a master-slave architecture which isboth scalable and expandable.

2.1. Slave unit

A slave unit consists of a MSP430-F169 MCU and a SecureDigital (SD) memory card. Its schematic is shown in Fig. 1. Thesignal is digitized using the MSP430’s built-in 12-bit Analog-to-Digital converter and then streamed to an SD card (TexasInstruments Corporation, 2003). The SD card is a removableflash-based storage device (SanDisk Corporation, 2003). Itsspecifications were originally defined by Toshiba Corporation,SanDisk Corporation, and Matsushita Electric Company for variousconsumer electronics such as digital cameras, PDA, mobile phonesand portable music devices. It is compact, simple, large incapacity, low in power consumption and low cost, an idealsolution for our design (Hsiao, et al., 2006, 2007). MSP430’s

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Hydrophone

SamplingTrigger

Time Tag

Block Serial Number

Dat

a B

us f

rom

Mas

ter

Uni

t

StoringTrigger

AD converter Digital Data

BufferSD Memory

card

Slave Unit

SPI

MemoryUsage Table

Data

MSP430MCU

Pre-ampfier board(filters, gain)

Fig. 1. Functional block diagram of a single slave unit.

SD Card

Vcc

123456789

50KMSP430

SSMOSI

MISO

SCK

−

Fig. 2. Wiring diagram for MSP430 USART and SD card.

C.-C. Wang et al. / Ocean Engineering 36 (2009) 446–455448

Universal Synchronous/Asynchronous Receive/Transmit (USART)communicates with the SD card via Serial Peripheral Interface(SPI). SPI is a synchronous serial protocol for interfacingperipheral devices with microcontrollers in a simple manner.As shown in Fig. 2, only four pins are needed for transferringdata between the MCU and the SD card (Texas InstrumentsCorporation, 2006).

Upon power up, the MSP430 reads the first 512 bytes (definedas a block) of the SD card to retrieve the memory usage prior tothe current power cycle. This information is used to allocate freememory space for storing the upcoming new recording event.In other words, during each power cycle, the system will initiatea new clip automatically. The MSP430 then switches to sleepmode to preserve electricity. It stays in this low power mode untilawakened by sampling/storing trigger commands coming fromthe master unit, described in the next subsection.

To ensure the success of simultaneous A/D conversion and datastreaming, a double-buffer structure is adopted along with DirectMemory Access (DMA). DMA is a module component of MSP430microcontroller family. It can transfer data between MCU memoryand peripherals without CPU intervention. MSP430-F169 has 2 kbytes of random access memory (RAM). One kilo bytes are used toconstruct two buffers, denoted as Buffer I and Buffer II, 512 byteseach. MSP430 digitizes the signal and stores the results intothe buffer sequentially. A subprogram monitors the growth of thebuffers. Once Buffer I is full, its contents will be dumped into theSD card using DMA while the digitization continues streamingresults into Buffer II. Tasks are thus rotated between Buffers Iand II. With this arrangement, the acoustic signal is sampledcontinuously in each slave device which serves as a basic digitalrecorder that works on simple tasks (sample/store) by itself.According to our test, the slave unit takes 0.02 ms to stream thedata buffer into the SD card, meaning a single slave unit canhandle digitization and logging up to 50 k samples per second.Each SD card is enabled by pulling down its ‘‘SELECT’’ pin toground. With proper multiplexing circuitry and data storagemanagement, multiple SD’s can thus easily be daisy chained toexpand the data storage capacity.

2.2. Master unit

A master unit consists of two MSP430-F169’s, denoted as M1and M2, and an Real-Time Clock (RTC) chip DS1302 (shown inFig. 3). The DS1302 operates on very low power consumption.With a single 3.3 V coin battery cell, it can run for years withoutlosing time (Dallas Semiconductors Corporation, 2005). When thepower is turned on, M1 starts communicating with the RTC viathree I/Os to retrieve the current clock time. M1 sends the clock tothe slave units via general I/O ports. In total 26 I/O ports are used.For example, the month is represented by a number between 1and 12, requiring four ports. Similarly, it takes 5 ports for the day,5 ports for the hour, 6 ports for the minute and 6 ports for thesecond. The year is skipped because we ran short of I/O ports onthe MSP430-F169. However the year can be easily managed inthe user’s experiment logbook. For the next generation, we mayuse another MSP430 model which provides more I/O ports toaccommodate the year information in the time stamp. The RTCDS1302 is an inexpensive product, very popular in consumerelectronics. It is synchronized to GPS before deployment but it

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Time Tag

SamplingTrigger

Block SerialNumber

StoringTrigger

MSP430MCU2

DS1302Real-Time Clock

Master Unit

Dat

a B

us to

Sla

ve U

nit

MSP430MCU1

Start

Fig. 3. Functional block diagram of the master unit.

Fig. 4. Prototype circuit boards: master (left, 15 cm�9.5 cm) and slave units (right,

15 cm�9.5 cm).


drifts several seconds per day. For this prototype, we only useits clock to have an approximate time of the recording. In thenext generation of development, we will use SeaScan Real TimeClock (SEASCAN INC.) which drifts less than 1 second per year.Nevertheless, with the master-slave configuration, all the recei-vers get the same sample-and-hold command from the master I/Oport. The difference in actual sampling time between channels isless than 125 nano-seconds, accurate enough for the beamform-ing of the array.

M2 is in charge of the overall coordination and synchronizationof the slave units. It can operate in either standby mode, delay-time mode. For the former, it waits for the start command from anexternal trigger; for the latter, it wakes up to work at a pre-programmed time. For diver deployment, the system does notneed to be turned on until all the preparations have beencompleted, to conserve battery power. For anchor-drop free falldeployment, if we can estimate the time of descent, a pre-setdelayed time can be used to conserve battery power.

Upon startup, M2 sends sampling commands sequentially toeach of the slave units one at a time along with a block serialnumber. This serial number, cycling between 0 and 255, willbe used to align the time line when the data from all slave unitsare merged together during post-processing. The details of thisprocess will be further elaborated in Section 3. For both modes,the duty cycle (sampling duration versus sleeping duration) canbe set to any value the user desires. In sum, M2 controls when aspecific slave unit samples and stores data.

2.3. Assembly

In Fig. 4, we show a basic configuration of the system. Itconsists of one master unit and two slave units. The prototypeboards, not minimized for its circuit layout yet, are small already(15 cm�9.5 cm). A single slave unit is very compact, so two unitsare laid out on one PCB board. The master unit board and the dual-slave board are stacked together to reduce the space required forthe housing. The master unit communicates with the slave unitsvia a 40-pin ribbon cable. If more slave unit boards are added, allwe need to do is to put more inline connectors in the ribbon cable.More slave unit boards can be added to have either moresynchronized AD channels or to achieve higher sampling rate.

The number of slave unit boards (channels in an array) is limitedby the fan-out current of the MSP430’s output port. According tothe specifications of MSP430-F169, each IO port is capable ofdriving six slave unit boards. If more channels are needed, we mayuse a buffer IC or a pull-up resister from V+ to increase the fan-out. The reconfiguration of the resources will be described in thenext section in greater detail.

We use ITC 6050C hydrophones which have a built-in 20 dBgain with an output sensitivity of �157 dB//1 V/mPa. Anotheramplifier board, designed by Applied Physics Lab, University ofWashington, is added between the hydrophone and AD to act as a45 kHz anti-aliasing filter. The original design of this boardprovides 20/40 dB gain but we use only the signal after the anti-aliasing filter.

3. Software architecture

A single slave unit is capable of digitizing and streaming datato the SD card at up to 50 k samples per second. The main goal of

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this paper is to design a flexible architecture to overcome thislimitation with minimum hardware effort. By ‘‘flexible’’ we meanthe change of configuration is only a matter of downloading a newprogram and changing the jumper settings.

3.1. Single-slave mode

Fig. 5 illustrates how the subsystem works. The master unitsends out a sampling command regularly at the desired samplingrate. At the rising edge of the command, the slave unit digitizesthe signal and augments the results with a time tag and a serialnumber provided by the master unit and then stores it in thebuffer. The master unit keeps track of the sample counts it hasissued. When the sample count reaches 250, the master unittriggers the slave unit to stream the data in Buffer I to the SD card.While streaming data, the upcoming AD result will be redirectedto Buffer II until it is full and the master unit will trigger anotherdata transfer. Basically, the two buffers take turns saving theirdata to the SD card. With this configuration, a single slave unit iscapable of digitizing and streaming data into the SD card atsampling rates of up to 50 kHz.

Time

Buffer I250 triggers

Sampling

Storing

Buffer II250 triggers

Single Slave Unit w

Stream Buffer I to SD Stream B

Fig. 5. Coordinating clock for sam

Two Slave Units with

T

Sampling

Storing



Saving S2 Buffer I to SD

Saving S1 Buffer I to SD

Time aS

Sampling

Storing

Slave 1

Slave 2

S1 AD Idle

Fig. 6. Coordinating clock for sampling and storing comma

3.2. Multiple-slave mode

When a sampling rate higher than 50 kHz is required, eventhough the slave unit can execute the master unit’s samplingcommand promptly, data streaming becomes a bottleneck whichstalls the performance (the specification of the MSP430 ADsampling rate is as high as 200 kHz, but that is under thecondition that no other tasks are executed except AD sampling).This bottleneck is a result of the limitation of the SPI throughputbandwidth and size of the buffer. We solve this problem by addingadditional slave units to share the data streaming task. Twoconfigurations are proposed, alternating mode and interlacingmode.

3.2.1. Alternating mode

In Fig. 6, a scenario in which a master unit (denoted as M)coordinates two slave units (denoted as S1 and S2) in alternatingmode is depicted. M starts by commanding S1 to sample data first.250 samples are collected and stored in Buffer I of S1 before Mtriggers S2 to take over the sampling task. At this moment,S1 streams data to the SD card. Then the same task is shifted to

ith Dual Buffers



uffer II to SD Stream Buffer I to SD

pling and storing commands.

Dual Buffers (Alternating mode)

ime

Buffer II250 triggers S1 AD Idle

S2 AD IdleBuffer II

250 triggers

Time available for saving S2 Buffer I

vailable for saving 1 Buffer I

Saving S1 Buffer II to SD

nds for two slave units operating in alternating mode.

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S2/Buffer I, S1/Buffer II, and S2/Buffer II, in that order, cyclically. Inother words, instead of shifting the task back and forth betweentwo buffers within a single slave unit, now it is alternated amongfour buffers in two slave units. The time available for streamingdata is thus extended from one buffer time to two buffer times, asFig. 6 makes clear. Therefore, the sampling rate can be increasedto 100 kHz and slave units can still finish the data streamingpromptly. Generally speaking, the sampling rate improves roughlylinearly with the number of slave units adopted.

3.2.2. Interlacing mode

Another approach to utilize the resources of the two slave unitsis to interlace their duty cycle. As illustrated in Fig. 7, the masterunit commands and coordinates the two slave units with using ahalf cycle shift. The master runs on a clock that is twice as fast thebase clock of the slave units. When the clock is odd-numbered, thecommand goes to S1, and when it is even, the command goes toS2. Each slave unit executes the task independently of the other.Thus, the system closely resembles the single slave mode, but theoverall performance of the system is doubled.

Two Slave Units with

T

Sampling

Storing





S2 Buffer I to SD S2 Buffer II to SD


Sampling

Storing

Slave 1

Slave 2

Dt Dt

Fig. 7. Coordinating clock for sampling and storing comma

Address 0

000h

010h

020h

030h

...

1D0h

1E0h

1F0h

1 2 3 4 5 6 7

No. of Clips

Mon Day Hour Min Sec

Mon ceSniMruoHyaD

Mon ceSniMruoHyaD

Mon ceSniMruoHyaD

Mon ceSniMruoHyaD

Mon ceSniMruoHyaD

Memory Size

No. of Ch

No. of Slave

NA/N A/NA/NN/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

Fig. 8. Definition of the header block (the fi

4. SD card memory structure

4.1. Header block

Most consumer electronics use the FAT file system to store datain the SD card (Microsoft Corporation, 1999). For our application,to simplify the read/write tasks for the MSP430, we define ourown file structure to access the SD card in raw memory mode.There are several reasons this format was chosen. First, theMSP430 reads and writes to the SD card most efficiently in a blockof 512 bytes. Therefore, 512 bytes is the basic unit of datamanagement in our system. However, this constrains the design ofthe buffer size. Second, in multiple-slave mode, the data fromeach SD card needs to be integrated after downloading. To preventinconsistencies in the content of the SD cards, a non-repeatedauxiliary tag (Block Serial Number) will be embedded in each datablock to expedite data merging. Third, under all circumstances, wewant to preserve the timing information of each individual datablock as accurately as possible. Thus, each data block will be givenan individual time tag. Given these considerations, we designed astructure for the SD card as shown in Fig. 8.

Dual Buffers (Interlacing mode)

ime





S2 Buffer I to SD


S2 Buffer II to SD

nds for two slave units operating in interlacing mode.

98 A B C D E F

Start address End address

sserddadnEsserddatratS


...




Record number

1

2

3

...

29

30

31

A/ A/N A/NN/A N/A N/A N/A N/A

rst 512 bytes) of the SD card raw data.

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BLOCK 1 BLOCK 2

512 Byte

Header Block

Acoustic Data ( 500 Bytes for 250 sampling )

512 Byte

BLOCK i ... BLOCK N...

Data Block

RTC Information(5 Byte)

Serial Number(1 Byte)

Reserved(6 Byte)

Fig. 9. Definition of data block (trailing blocks after header block).

0.8 0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 1.25 1.30.8

1

1.2

1.4

1.6

1.8

2

2.2

millisecond

Volta

ge (V

)

Pre-calibration

SD/MCU AD 1SD/MCU AD 2

Fig. 10. Reconstructing a sine wave recorded in interlacing mode (partially

shown). Note that there is a high frequency, small amplitude jittering on the sine

wave.

0


As mentioned in Section 2.1, the header keeps track of thememory usage in the SD card. The header block is further dividedinto 32 records of 16 bytes each. The first record is called theSystem Tag (ST), while the remaining 31 records are called ClipTags (CT). The definitions of ST and CT are illustrated in Fig. 8. For anew SD card, the clip count of the ST is padded with zeros, and thefields for memory size, channel number and slave unit number areconfigured accordingly. Upon power-on, the system uses the clipcount in the ST as an index to locate the CT of the previousoperation and retrieve information of the available memory.For any upcoming logging, a new CT will be appended with thestarting time and starting memory address. As the AD samplingproceeds, the memory address of the trailing data block in the CTwill be updated accordingly.

4.2. Data block

Data blocks, which come after the header block, occupy therest of the SD card memory. A data block is formatted as shown inFig. 9. We do not fill the entire 512 byte block with the AD resultsbut instead reserve the leading 12 bytes for the time stamp, serialblock number (SN), and system status flags. System status flagsare used to log auxiliary signals from the master unit which willbe used for data merging or post-processing. The MSP430’s built-in AD converters are 12-bit, so a single sample is two bytes. Theremaining 500 bytes can accommodate 250 samples.

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5

x 104

-150

-100

-50

Frequency (Hz)

dB (1

VR

MS)

Fig. 11. Spectrum of the merged data shown in Fig. 10. Note that there is a spectral

component at frequency near 50 kHz.

5. Calibration

With multiple slave units adopted, the signal is sampled bydifferent AD converters. Ideally, all AD converter circuits areidentical and the results should be the same for a specific voltagelevel. However, due to the differences in wiring configuration andresponse of electronic components, there is always a discrepancybetween different AD readouts. To observe the degree of thisdiscrepancy, we feed a 1 kHz, 1.5 Vp-p sine wave into the recorder.The blowup of the signal is shown in Fig. 10. On the 1 kHzsine wave, there is a higher frequency small amplitude jittering.This flaw can also be observed on the spectrum as a spectralcomponent appearing in the neighborhood of 50 kHz in additionto the 1 kHz signal (Fig. 11). To mitigate this variation, we come upwith a calibration curve which fine tunes the two AD convertercharacteristics to give a smooth sampling. We feed different levelsof voltage into the slave units and plot them together as shown inFig. 12. The results show that the difference between the two ADsis not a constant but a level-dependent variation. The variation inthe readings (S2 with respect to S1) at different voltage levels, asshown in Fig. 13, is used to construct a calibration curve (the blueline in Fig. 13). The S2 readings are adjusted according to thiscurve. The efficacy of this approach can be demonstrated byplotting the calibrated sine wave and the power spectrum, Figs. 14and 15, respectively. The extra spectral component is removed.

6. Operational tests

As mentioned in the introduction, the duration of theoperation is constrained by two factors: storage capacity andpower. In the current setup (one master unit coordinating two

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Fig. 12. Voltage level reading comparison between two AD channels.

Fig. 13. Linear regression of the difference between two AD channels for

calibration.

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5

x 104

-350

-300

-250

-200

-150

-100

-50

0

Frequency (Hz)

dB (1

VR

MS)

Fig. 15. Spectrum of the merged data in Fig. 14. Note that abnormal spectral

component at frequency near 50 kHz has vanished.

0.8 0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 1.25 1.30.8

1

1.2

1.4

1.6

1.8

2

2.2

millisecond

Volta

ge (V

)

Post-calibration

SD/MCU AD 1SD/MCU AD 2

Fig. 14. Reconstructing the sine wave shown in Fig. 10 (post-calibration).


slave units), each slave device is installed with a 1 GB SD cardwhich provides data storage for up to 2.7 h at a 100 kHz samplingrate. SD cards have now reached 32 GB in size, enabling about 89 hsampling time. The performance is likely to be limited bythe power supply. We used four Panasonic oxyride AA cellsconnected in series to provide 6 V as the power source for the 3.3 Vregulator. The average current levels measured by multi-meterwere approximately 4 and 36 mA for the master and slave units,respectively. We ran a power exhaustive test and found thatthe system fills up the SD cards (total 2G Bytes) long beforeexhausting the batteries. With these numbers as references, we canconfigure the system with SD card capacities and power packsaccording to the mission requirements. In field operations certainapplications, such as ocean background noise monitoring, do notrequire continuous recording. The system can be programmed toduty-cycle mode. For example, for every hour only 3 min ofrecording is executed, and operates in sleep mode to save energyfor the remainder of the hour. In other words, the system can be

easily applied to long-term operations of several months or evena year.

To verify the performance of the recording system, we built adual-channel logger with two ITC-6050C hydrophones as thereceivers and used it in a field experiment. The prototype is shownin Fig. 16. The battery pack was replaced with two 2.2 A h/7.2 Vlithium polymer batteries connected in parallel which can supportmore than 12 h of operation. As illustrated in Fig. 17, the ITC-6050Chydrophones and an autonomous source ITC-1032 were mountedon an instrument frame to maintain a height of 1.53 m from theseafloor. The idea is to drive the source to send out a packetof signals repeatedly and the reflection signal would be picked upby the two hydrophones. The packet consists of a 15 ms chirp(sweeping from 5 kHz to 18 kHz) and eight 1 ms monotonetapered sine waves (5, 8, 10, 12, 14, 16, 18 and 20 kHz, respectively).The chirp was used to align the starting time of each packetduring post-processing. A 100 ms pause was inserted betweenmonotone signals to make sure that its direct arrival and the

ARTICLE IN PRESS

Fig. 16. Prototype of dual-channel hydrophone recorder.

Fig. 17. Schematic of the instrument frame used for the reflection experiment.

0.216 0.2165 0.217 0.2175 0.218

-0.25

-0.2

-0.15

-0.1

-0.05

0

0.05

0.1

0.15

0.2

0.25

t [sec]

Volts

� t

Channel 1Channel 2

Fig. 18. Comparison of arrival times for dual-channel recorder used in field

reflection coefficient experiment.

Table 1Possible configurations with one master unit/two slave unit system. The sampling

frequency specified in the table is the upper limit of the performance.

Case Number of

signals

digitized

Sampling rate

Slave unit A Slave unit A

AD S1

(kHz)

AD S2

(kHz)

AD S1

(kHz)

AD S2

(kHz)

1 4 50 50 50 50

2 3 100 50 50

3 2 100 100

4 1 200


reflection from the seafloor did not overlap. Therefore a packet isabout 1000 ms long. The geometry illustrated in Fig. 17 shows thatChannels I and II picked up the reflections of incident waves withgrazing angles of 85.71 and 74.11, respectively. The reflectioncoefficient at a station was assessed by comparing the amplitudeof the direct arrival and that of the reflection with propercompensation of the transmission loss. One minute of signalwas recorded at one station to obtain a temporal average, andrecordings at 40 different locations were taken for the spatialaverage. In Fig. 18, a sample clip of the signals recorded by the twochannels is shown. Assessing the reflection coefficient does notrequire synchronization of the two channels. However, the tworeceivers were coordinated by the same master unit so that thedifference in the signal arrival time can be estimated. With chirpsignal compression technique, the delay time dt is estimated to be0.251 ms. According to the CTD measurement, the sound speedwas 1531 m/s, so the distance between the two hydrophones is

38.428 cm, a difference of less than 0.45 cm, very close to thedistance obtained with a tape measure, 38.0 cm. This resultconfirms the efficacy of the synchronization.

ARTICLE IN PRESS

Table 2Comparison of features across different recording systems.

Project Year Duration Resolution Operation Sampling rate Medium

BioProbe ‘98 41 h (2 kHz) 16-bit C/D 100 Hz–20 kHz Flash

ARP ‘03 1 year 16-bit C/E/D 1 kHz Hard disk array

PAL ‘05 41 year 10-bit E/D 100 kHz CF

UPEAR ‘08 5 h (1G SD) 12-bit C/D 100 kHz SD

EAR ‘08 1 year 16-bit E/D 25–64 kHz Hard disk

HARP ‘08 55 days (200 kHz) 16-bit C/E/D 2–200 kHz Hard disk array

1 year (30 kHz)

Notes: C ¼ continuous, D ¼ duty cycle, E ¼ event driven.


7. Discussion and conclusion

The proposed master-and-multiple-slave architecture providesus the flexibility of system configuration to fully utilize itsresources according to the requirement of the mission. Byresources we mean the hardware components, available samplingrate budget and data storage. For example, given one master unitand two slave units, we have four AD channels (two on each slaveunit), each able to sample up to 50 kHz with 16G storage. For anexperiment which requires a sampling rate of less than 50 kHz(the sampling and storage limit of a single stand-alone AD unit),the four AD channels can be programmed with individualsampling rates independently to record four channels of hydro-phones. For a long-term deployment scenario in which more datastorage is needed, the slave AD units can be concatenated asalternating mode for 16�n G of data storage, where n is thenumber of slave AD units.

Once the desired sampling frequency exceeds 50 kHz, the slaveAD units need to be configured as interlacing mode or alternatingmode with the inputs wired together to perform the AD sampling.Both modes can achieve the desired performance. However, in theformer configuration all the slave AD units stay active throughoutthe recording, but in the latter configuration, only one of the slaveAD units executes the sampling task at a time. Therefore, thealternating mode is more efficient in power consumption than theinterlacing mode. On the other hand, interlacing mode is betterin terms of preserving the continuity of the signal. For example,if one of the AD units fails for any reason, the interlacing modestill yields a continuous signal at a lower sampling rate while thealternating mode loses a block of data cyclically.

Theoretically for each AD unit added to the system, the samplingrate budget can be increased by 50 kHz. However, in alternatingmode this increase is limited to 200 kHz, the highest sampling rateof the MSP430. The interlacing mode does not suffer from thisproblem as long as the master can generate the synchronizationsignal fast enough to coordinate the sampling task among themultiple-slave AD units. The possible combinations of the config-uration are listed in Table 1, showing the flexibility of thearchitecture. An additional advantage of the system is its simplicityof operation. In each power cycle the system will automatically starta new file for the new recording event. Users do not need to setupany settings until a new mission plan is needed. This is convenientfor repeated tasks in field experiments.

Certain disadvantages are associated with the MSP430 MCUremain. Basically, we did a trade-off between the powerconsumption and the function of the microprocessor. Therefore,for the current stage of the development, we used the built-inA/D 12-bit converters which are less than ideal for resolvingsophisticated complex signals. The computing power of theMSP430 is insufficient for performing real time spectral analysisor filtering, and smart detection algorithm cannot be implemen-ted on the same MSP430 MCU. In Table 2, we list and compare thefeatures of different systems described in the Introduction.

This paper presents the design of a master/multi-slave,distributed sampling/storing architecture for an expandable datarecorder. A Texas Instruments MSP430 ultra-low power MCU isused as the core of the platform. With the superior performance ofthe MSP430 MCU in power consumption and versatility in built-inperipherals, this architecture serves as an ideal platform for long-term deployment, stand-alone underwater recording system.The flexibility of the architecture enables users to allocate theresources of the system according to the nature of the missionwith just a change of software. The efficacy of the system isdemonstrated with the quality of data collected by a prototypedual-channel acoustic logger used in a field experiment.

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Documents

Development of MSP430-based ultra-low power expandable underwater acoustic recorder