Double-Stage Taper for Coupling Between SOI Waveguides and Single-Mode Fiber

3860 JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 26, NO. 24, DECEMBER 15, 2008

Double-Stage Taper for Coupling Between SOIWaveguides and Single-Mode Fiber

Assia Barkai, Ansheng Liu, Daewoong Kim, Rami Cohen, Nomi Elek, Hsu-Hao Chang,Bilal H. Malik, Member, OSA, Rami Gabay, Richard Jones, Member, IEEE, Member, OSA, Mario Paniccia, and

Nahum Izhaky

Abstract—A low-loss polarization-independent and wavelength-insensitive mode converter is demonstrated for coupling betweenstandard single-mode fiber (SMF) and 1.5- m-thick silicon waveg-uides. This mode converter consists of a double-stage taper fabri-cated using planar processing. Optical testing results show facetloss of approximately �1.5 dB/facet, for TE and TM polarizationsacross a wide wavelength range.

Index Terms—Mode converter, silicon photonics, SMF coupling.

I. INTRODUCTION

S ILICON-ON-INSULATOR (SOI) provides an attractiveplatform for the monolithic integration of optical and elec-

trical devices. The infrastructure used by the microelectronicsindustry is suitable for fabricating silicon photonic opticaldevices in high volume at low cost, and all the componentsrequired for an optical link have been demonstrated fromSOI, or CMOS-compatible materials [1]. The large differencebetween the refractive indices of a silicon core and its oxidecladding enables highly confined waveguides with micronand submicron dimensions allowing bends with tight radiusresulting in small footprint optical devices. One challenge withworking with thin waveguides is coupling light to and fromthem using standard telecommunication fibers. As an examplethe calculated loss when coupling a standard single-mode fiber(SMF) with mode field of 9 to a 1.5- -thick single-mode SOIrib waveguide is at least 14 dB/facet.

Many different solutions have been suggested for couplinglight from SMF to SOI waveguides. Second-order gratingsmay be etched onto the surface of the waveguide to provide

Manuscript received November 4, 2007; revised May 18, 2008. Current ver-sion published January 28, 2009.

A. Barkai, R. Cohen, N. Elek, and R. Gabay are with Numonyx, Ltd.,Qiryat Gat 82109, Israel (e-mail: [email protected]; [email protected]; [email protected]; [email protected]).

A. Liu, D. Kim, R. Jones, and M. Paniccia are with Intel Corporation,Santa Clara, CA 95054 USA (e-mail [email protected]; [email protected]; [email protected]; [email protected]).

H.-H. Chang is with the ECE Department, University of California, SantaBarbara, CA 93106 USA (e-mail: [email protected]).

B. H. Malik is with the Department of Electrical and Computer Engi-neering, Texas A&M University, College Station, TX 77843 USA (e-mail:[email protected]).

N. Izhaky is with the Elbit Systems Electro-optics-Elop Ltd., 1165 Rehovot76111, Israel (e-mail: [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/JLT.2008.928199

coupling of light out of the waveguide plane [2]–[4]. Inversetapers, composed of high-index-contrast materials, are basedon tapering to nanometer-sized dimensions [5]–[7]; and selfaligned polymer waveguides, using photosensitive polymer[8], [9]. The disadvantages of these approaches include beingpolarization or wavelength dependent; and using distinctiveprocessing materials or techniques.

This paper presents a mode converter, based on the InP workof Zengerle [10] which has recently been implemented in sil-icon photonics [11]–[14]. Here, a double-stage taper (DST) ispresented which is required to efficiently transform the mode ofa 1.5 to 9 to efficiently couple to a SMF. Increasing thewaveguide mode at the facet also allows an increase in the toler-ance to misalignment during packaging and assembly. The ad-vantages of this design are low coupling loss from micron-sizedwaveguides to SMF, polarization, and wavelength insensitivityusing CMOS compatible processing.

II. DESIGN AND SIMULATION

Fig. 1(a) shows a schematic of a DST. Light is initially cou-pled from a SMF into the large aperture taper input; the opticalmode is gradually transformed, from the taper input into thebottom taper through the upper taper, into the final waveguide[see Fig. 1(b) for modal transformation]. The total optical cou-pling loss due to the taper consists of two parts: coupling lossbetween the SMF to the input aperture of the taper and tapertransition loss as the mode is converted. The coupling loss de-pends on the mode matching as well as the alignment betweenthe SMF and the taper. Therefore, the taper dimensions shouldbe close to the near field SMF mode dimensions for better lightcoupling. The taper transition loss depends on the modal trans-formation and the tapered waveguide scattering. To ensure anadiabatic taper with small optical loss, the taper length needsto be long enough to ensure a smooth transition from the taperinput to the narrow tip region while the tip width needs to besmall enough to ensure that there is no optical field confined inthe tip region.

As the waveguide confinement is usually polarization depen-dent, for a given tip size, the taper loss is also expected to bepolarization dependent. To understand these effects, we simu-lated the taper transition loss for various tip widths and taperlengths for both TE and TM polarizations. Fig. 2 shows thebeam propagation [15] simulation results of a DST taper lossas a function of taper length at a wavelength of 1.55 byusing commercial software [16]. The input facet was chosen tobe , the taper tip 0.3 and the final waveguidedimensions with slab height of 0.8 . For

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BARKAI et al.: DST FOR COUPLING BETWEEN SOI WAVEGUIDES 3861

Fig. 1. (a) A DST design, lower part 12 �m wide rib waveguide; bottom taper (BT) is the lower taper with 11 �m wide input and upper taper (UT) with a 10 �m

wide input. �L = 150 �m represent the separation of the BT and UT tips and L is the total DST length. H = 1:5 �m, H1 = 2:5 �m and H2 = 6 �m.(b) Simulated mode fields: At the facet, at the upper taper tip and at the bottom taper tip, values given in micron.

this simulation, the loss due to sidewall roughness was assumedto be zero, and the side wall angle was set to 90 . We see fromFig. 2 that both the taper loss and the polarization dependenceare small ( 0.1 dB) when the taper length is around 1000 .For small taper lengths, both the taper loss and polarization de-pendence are relatively large.

We also modeled the effect of the taper tip width on the tapertransition loss. The results are shown in Fig. 3 for a 1 mm longtaper length, with all other details similar to that used for Fig. 2.As can be seen both the taper loss and the polarization depen-dence increase with increasing the tip width. A change in tipwidth from 0.3 to 1 increases the taper loss by 1 dB andthe polarization dependent loss is 1 dB. This suggests thatappropriate control of the taper tip is essential for a good per-formance taper fabrication.

As aforementioned, the total taper loss includes both thetaper transition loss and the SMF-taper coupling loss. For thecurrent taper aperture size, the modeled-mode mismatch is

0.5 dB/facet; assuming the SMF and taper are perfectlyaligned and ARC applied to the silicon taper.

Before closing this section, we note that a so-called singlestage cheese wedge silicon taper has been proposed and devel-oped [11]. Such a taper showed excellent coupling efficiencybetween a SMF to a midsize (3–4 height waveguide) silicon

Fig. 2. Simulation of taper to waveguide transition loss as a function of DSTlength, L, for TE and TM polarization.

waveguide. However, our simulation suggests that this taperscheme is not efficient for a smaller (say 1–1.5 ) size wave-guide with a tip width of because of the large ratiobetween the taper input height and the final waveguide height.However, the DST taper scheme presented in this paper was able


Fig. 3. Simulation results for taper transition loss as a function of UT tip size.For TE and TM modes using the DST dimensions presented in Fig. 1.

Fig. 4. (a) BT etch by using HM. (b) Rib waveguide etch. (c) Silicon dioxidedeposition, polish, and UT seed etch. (d) Silicon nonselective epitaxial growth,UT etch, and clad deposition.

to give good coupling to a small waveguide with a reasonablyachievable tip width and device size.

III. FABRICATION

A schematic of the processing for the DST taper is shown inFig. 4. SOI wafers with a 4– epi-layer, and 1 thick buriedoxide were used for these experiments. All silicon etches weredone using an ECR dry etch tool (Hitachi M511) utilizingchemistry. Silicon dioxide etches were done on dry etch tool(LRC, Rainbow 4500), using chemistry. The first step intaper processing is to fabricate the bottom taper (BT), Fig. 4(a).Silicon dioxide is used as a hard mask (HM) for this step witha target for the BT etch depth of 2.5 ( 0.08 ) with90 deg side wall angle. Next the rib waveguide is defined asshown in Fig. 4(b), which was done using an additional sil-icon dioxide HM deposition, silicon dioxide etch and silicon dryetch of 0.7 ( 0.025 um). At this stage, low stress silicondioxide was deposited, and used for the upper cladding and toserve as waveguide and BT protection during the UT processing.After silicon dioxide chemical mechanical polishing to regain a

Fig. 5. 1.5-�m straight waveguide propagation loss versus different BT dryetch recipes: 1 is SF etch chemistry, 2 is SF , Ar etch chemistry. And a, in-dicates postetch smoothing oxidation. No etch is measured on an unpatternedblank silicon wafer for references.

flat wafer surface a seed area is opened on the top of the BT asshown in Fig. 4(c) and epitaxial silicon is grown at 1000 . Sil-icon growth uses a nonselective recipe, meaning crystalline sil-icon is grown directly above the seed region and amorphous sil-icon grown above the silicon dioxide layer; growth time is 30minutes/wafer. This amorphous silicon is etched away duringthe final step of UT etch, as shown in Fig. 4(d).

The critical processing step in the DST flow is the BT cre-ation. This BT etch defines the top surface of the rib waveguideand potentially causes surface damage due to ion bombardment,changing the silicon quality and increasing the waveguide loss.Several silicon etch recipes with different chemistries were in-vestigated to achieved low loss waveguides, , and Ar,(1, 2 respectively, Fig. 5), with and without postetch smoothingoxidations [smoothing oxidation denoted as in Fig. 5(a)]. Fig. 5reveals AFM roughness measurement, taken on the surface ofthe BT etched area, with the waveguide propagation loss mea-surements. As can be seen waveguide losses of 0.5 dB/cmwere obtainable after BT processing. The final oxidation processis important as it consumes the high loss damaged silicon cre-ated during the dry etch process, leaving smooth waveguide sidewalls and single crystal silicon at the upper surface of the wave-guide.

SEM images of the final fabricated DST taper are shown inFig. 6. As can be seen there is a 0.1- taper to waveguidemisalignment; which had no impact on taper loss as shown in[15].

IV. EXPERIMENTAL RESULTS

As described earlier, the BT etch was optimized to reduce theroughness and loss of the 1.5- -wide SOI waveguides. Thepropagation loss was measured for both TE and TM polariza-tions at wavelengths of 1310 and 1550 nm using the Fabry-Perotmethod [1]. The propagation loss for TE mode was measured tobe 0.39 dB/cm and 0.46 dB/cm at 1550 nm and 1310 nm,respectively, while the loss for TM mode is 0.3 dB/cm and

0.25 dB/cm at 1550 nm and 1310 nm. The result shows TMmode has slightly lower propagation loss than TE mode. Errorsfor these measurements are 0.1 dB/cm.

The facet loss [defined here as coupling loss + taper transitionloss] of the DST tapers was determined by first measuring the in-


Fig. 6. DST SEM tilt and cross section of DST wide area.

sertion loss of tapered waveguides and subtracting the propaga-tion loss due to the straight 1.5- waveguide using the abovepropagation loss numbers. A superluminescent light emittingdiode (SLED) was used as the light source, a standard SMF(Corning SMF-28) was used for coupling, and a linear polar-izer and polarization controller were interleaved between thelight source and input fiber to set the desired polarization. Aphotodetector was used to measure the output power. All taperswere antireflection coated on both end facets. Fig. 8 shows facetloss as a function of taper length.

It can be seen in Fig. 7 that the measured total facet lossesshow relatively low polarization dependence for a wide rangeof taper lengths. Taper having a taper length (L) of 950shows the best results in terms of facet loss and polarization-dependent loss (PDL): with a facet loss of 1.7 dB/facetand PDL of 0.03 dB/facet around 1310 nm and facet loss of

1.3 dB/facet and PDL of 0.03 dB/facet around 1550 nm.The facet loss when coupling to a straight waveguide withouttaper was measured to be about 12.5 dB/facet. Approximately11-dB improvement in facet loss was achieved using the opti-mized taper. Fig. 8 shows the total facet loss of the taper with

as a function of wavelength. An optical spectrumanalyzer (OSA) was employed to obtain the spectral output ofwaveguide with tapers.

The spectral uniformities of the facet loss over a 100-nmwavelength range are about 1 dB/facet and 0.1 dB/facet at1300 nm and 1550 nm, respectively. The larger nonunifor-mity at 1300 nm is due to etalon effects between the fiberand waveguide facet due to unoptimized ARC coating on thetaper which were designed for 1550 nm. For both wavelengthwindows, the taper shows low wavelength dependence and verylow polarization dependence over the wide wavelength range,compared to other, grating-based mode converters.

Fig. 9 shows the misalignment tolerance of the DST taper tofiber position. Here the input fiber was mounted on a piezocon-trolled micropositioner and scanned over a distance of 20 inthe vertical and horizontal plane. The distance between the input

Fig. 7. Total facet loss (dB/facet) versus Taper length (�m) for TE and TMpolarization modes around wavelength of: (a) 1310 nm and (b) 1550 nm.

fiber and taper facet was fixed at 10 . The 3-dB tolerance formisalignment of the fiber is measured to be , similar tothe core radius of the fiber and to the taper. The 1-dB tolerancewas achieved in the area surrounded by a centered contour withapproximately 2- radius.

V. CONCLUSION

This paper demonstrates a dual stage 9- taper for couplingfrom a SMF to a 1.5- waveguide. The dual stage taper com-


Fig. 8. Total facet loss over a wavelength range of: (a) 1250 to 1350 nm and(b) 1500 to 1600 nm.

Fig. 9. Contour diagram of the total facet loss for off-aligned input fiber posi-tions; Centered circle area with about 5-�m radius shows less than 3-dB toler-ance of fiber to taper coupling misalignment.

prises two layers of tapers, comprised of a bottom taper and anupper taper. The facet loss for the optimized mode converterhas been improved by 12 dB/Facet compared to coupling di-rectly to a 1.5- waveguide, achieving up to 1.3-dB/facettotal facet loss. Our results show that the dual stage taper designis polarization insensitive, and can operate over a wide wave-length range at 1.31 and 1.55 , our results being limited bythe single layer AR-coating used on the taper facets. The polar-ization and spectral properties of this taper are much improvedcompared to other mode converters suggested for coupling tosmall SOI waveguides.

This double-stage taper can be used as a conventional-modeconverter to couple the SOI chip to a single or an array of SMF

pigtails. Moreover, the double stage nature of the taper may beconfigured to couple efficiently to different devices on one chip,such as allowing the wafer level integration of edge emittinglasers, coupled using the bottom taper, and SMF in v-grooves,coupled using the DST taper.

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[16] BeamPROP RSoft Design Group, Inc.

Assia Barkai received the Ph.D. degree in physical chemistry from the HebrewUniversity of Jerusalem, Jerusalem, Israel, in 1995.

In 1996, she joined Intel Corporation, Jerusalem, as a Process Engineer,where she was engaged in sputter and dry etch process development focuson deep silicon etch. Since 2002, she has been a Senior Process Engineerfor Photonics Technology Development with the Technology DevelopmentDepartment of the Intel Corporation. Her current research interests includesilicon photonics, WDM, silicon optical bench, and optical packaging.


Ansheng Liu received the B.S. degree in semiconductor physics from SichuanUniversity, Chengdu, China, in 1982; the M.S. degree in semiconductor physicsfrom Zhongshan University, Guangzhou, China, in 1985; and the Ph.D. degreein physics from the University of Aalborg, Aalborg, Denmark, in 1992.

He is currently a Principal Engineer with the Corporate Technology Group,Intel Corporation, Santa Clara, CA, where he is developing silicon photonicdevices and photonic integrated circuits for high-speed optical interconnect andcommunications. His interests include nonlinear optics of nanostructures, near-field optics, optoelectronics, and photonics.

Dr. Liu is a member of OFC/NFOEC 2007 and the 2008 program committee.

Daewoong Kim, photograph and biography not available at the time of publi-cation.

Rami Cohen received the B.Sc. and M.Sc. degrees in physical chemistry fromthe Hebrew University of Jerusalem, Jerusalem, Israel, in 1997 and 1999, re-spectively.

During 2000–2003, he was an Experimental Physicist with Trellis-Photonics,Jerusalem, where he was engaged in developing optical switches. Since 2004, hehas Photonics Development Engineer in the Photonics Group, Intel Corporation,and currently is with Numonyx, Qiryat Gat, Israel. His current research interestsinclude integrated optics, SiGe photodetector, and optical packaging.

Nomi Elek received the B.Sc. degree in material engineering from the JerusalemCollege of Engineering Jerusalem, Israel, in 2006.

She is currently working toward the M.Sc. degree at the Hebrew Universityof Jerusalem, Israel. In 2003, she joined Intel Corporation, Jerusalem, as an in-tern in the Engineering Department, where she was engaged in lithography andCVD process development. Since 2006, she has been an intern in the PhotonicsTechnology Development Department, Intel Corporation. Her current researchinterests include silicon photonics, WDM.

Hsu-Hao Chang was born on July 2, 1978, in Taiwan. He received the bach-elor’s degree in electrical engineering from the National Taiwan University in2000. After serving in the military for two years, he received the master’s de-gree from the Institution of Electro-Optical Engineering at the National TaiwanUniversity in 2004.

He worked for Intel in 2006 as an Optical Testing Engineer through an in-ternship. He is now pursuing the Ph.D. degree in electrical and computer engi-neering at the University of California, Santa Barbara. His research is focusingon the silicon-based optoelectronic device (triplexer) for communication.

Bilal H. Malik received the B.S. degree in engineering science in 2002 fromGIK Institute, Topi, Pakistan, and the M.S. degree in electrical engineering in2006 from Texas A&M University (TAMU), College Station. He is currentlypursuing the Ph.D. degree in biomedical optics at the Optical Bionsensing Lab-oratory, Department of Biomedical Engineering, TAMU.

His primary research interests focus on the applications of polarized light fornoninvasive optical biosensing and medical diagnostics.

Mr. Malik is a member of the Optical Society of America, Biomedical Engi-neering Society, and SPIE.

Rami Gabay worked at Intel in 1992 as a Senior Process Technician in lithog-raphy and defect metrology. From 2001 to 2007, he worked in the R&D pho-tonics department, developing plasma etch and lithography processes. Since2007, he has worked at the Nano Fabrication Centre at the Hebrew University ofJerusalem (HUJI). In his current position, he is developing nano layers growth,utilizing evaporation and plasma techniques for university research.

Richard Jones (M’05) received the B.Sc. and Ph.D. degrees in physics fromImperial College, London University, U.K., in 1993 and 1998, respectively, andthe M.Sc. degree in microwaves and optoelectronics from University College,London University, U.K., in 1994.

He has been working as a Senior Optical Researcher with the Photonic Tech-nology Laboratory, Intel Corporation, Santa Clara, CA, since 2001. His researchinterests include silicon photonics, hybrid integration, and optical sensing.

Mario Paniccia received the B.S. degree in physics in 1988 from the State Uni-versity of New York at Binghamton and the Ph.D. degree in solid-state physicsfrom Purdue University, West Lafayette, IN, in 1994.

He is an Intel Fellow and Director of the Photonic Technology Lab, Intel Cor-poration, Santa Clara, CA. He currently directs a research group with activitiesin the area of silicon photonics. The team is focused on developing silicon-basedphotonic building blocks for future use in enterprise and data center communi-cations. He has worked in many areas of optical technologies during his careerat Intel, including optical testing for leading edge microprocessors, optical com-munications, and optical interconnects.

Nahum Izhaky received the Ph.D. degree in physical electronics in 1998 fromTel-Aviv University, Israel.

From 1998 to 2004, he was the Director of Physics with Lynx PhotonicNetworks leading R&D of optical switch matrices, VOAs, filters, OADM, andOXC—based on guided wave optics (silica on silicon and LiNbO3). From2004 to 2007, he was the Photonics Technology Development Group Leader ofthe MEMS and Photonics Department, Fab8, Intel. In 2007, he joined ELOP ofElbit Systems Electro-Optics, Rehovot, Israel, as the Laser Physics Departmentmanager. His research interests include integrated optoelectronics, lasers, non-linear optics, silicon photonics, optical switching, and optical communication.

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Double-Stage Taper for Coupling Between SOI Waveguides and Single-Mode Fiber