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Energy Procedia 00 (2013) 000–000 www.elsevier.com/locate/procedia

SiliconPV: March 25-27, 2013, Hamelin, Germany

Uniform plating of thin nickel layers for silicon solar cells Yu Yao*, John Rodriguez, Jie Cui, Alison Lennon, Stuart Wenham

School of Photovoltaic and Renewable Energy Engineering, University of New South Wales, Sydney, Australia, 2052

Abstract

This paper describes a galvanic deposition method for the formation of uniformly thin nickel seed layers for silicon solar cells. Unlike the previously-reported electroless and light-induced plating methods, where the thickness of nickel seed layers can be vary significantly due to non-uniform nucleation of metal which can be exacerbated by variations in surface dopant concentrations and roughness, this method saturates resulting in Ni seed layers of uniform thicknesses in the range of 250-400 nm depending on the plating time and patterning process. The method was successfully used in the fabrication of nickel/copper plated homogeneous 100 Ω/□ emitter Si solar cells and laser-doped selective emitter (LDSE) cells, both with screen-printed, Al-alloyed back surface fields. Average cell efficiencies of 18.4% and 18.9% were achieved for the homogeneous emitter cells and LDSE cells, respectively, with the best LDSE cell having an efficiency of 19.2%. © 2013 The Authors. Published by Elsevier Ltd. Selection and/or peer-review under responsibility of the scientific committee of the SiliconPV 2013 conference Keywords: Galvanic displacement; Ni plating; Direct etching; Laser doping; Solar cells.

* Corresponding author. Tel.: +61 434210327. E-mail address: yuyao.pv@gmail.com.

Author name / Energy Procedia 00 (2013) 000–000

1. Introduction

To reduce the cost per watt of manufactured silicon (Si) solar cells, the PV industry has been exploring technologies that reduce material usage and/or increase cell efficiencies. The screen-printed silver (Ag) front contacting scheme that has dominated the industry for decades, poses challenges with regard to the use of thinner wafers and increased cell efficiencies despite improvements in screen designs and paste formulations [1, 2]. The escalating price of Ag also negatively affects the cost reduction, therefore cheaper metals such as nickel (Ni) and copper (Cu) have attracted interest in both research [3-8] and production [9] environments in PV. Their potential to replace the front side Ag contacts has been greatly promoted by the advancements in dielectric patterning technologies [10-12], in conjunction with metal plating technologies [3, 4, 13, 14].

In the recent years, despite the reported high efficiencies of various Si solar cell designs using self-aligned Ni/Cu contacts [8, 15, 16], obstacles to incorporating metal plating into large scale production include: (i) the relatively lower adhesion strength of Ni/Cu plated contacts compared to the conventional screen printed contacts [7, 15]; and (ii) sub-optimal Ni silicide formation caused by the non-uniform Ni deposition that can result from using electroless or light-induced plating methods [17]. It has been demonstrated that thin Ni layers deposited by plasma vapor deposition can result in more uniform Ni seed layers [7, 17], however although cell efficiencies of 19.6% have been reported on 120 Ω/□ homogeneous emitter p-type Cz Si PERC type solar cells [7], this process requires that Ni be deposited over the entire cell surface and then be removed after the sintering process, a process that is clearly undesirable from perspective of material usage and waste management.

In this paper, we show how the saturating property of the described galvanic Ni displacement plating method can be used to control the uniformity of the plated Ni seed layer and hence result in low contact resistance in Si solar cells. The method was successfully demonstrated in the fabrication of homogeneous 100 Ω/□ emitter Si solar cells and laser-doped selective emitter (LDSE) cells, both with screen-printed, full area Al-alloyed back surface fields. Average cell efficiencies of 18.4% and 18.9% were achieved for the homogeneous emitter cells and LDSE cells, respectively, with the best LDSE cell having an efficiency of 19.2%.

2. Galvanic displacement plating mechanism

Galvanic displacement of Ni on a Si substrate occurs due to a local oxidation/reduction reaction in a Ni-loaded aqueous electrolyte in the absence of reducing agent in the solution. This differentiates the process from reported electroless plating processes [11, 13, 18, 19] where plating is dependent on a reducing agent (e.g., hypophosphite) in the solution. In the galvanic displacement reaction reported in this paper, the Si surface is oxidised and Ni ions in the electrolyte are reduced to form Ni metal on the Si surface [20]. When a Si electrode is immersed in a fluoride-based electrolyte, the Si surface is easily oxidized and the oxidation products are readily dissolved in the presence of fluoride ions. However, the potential advantage of this plating method is that the reaction is limited by the Si surface’s access to electrolyte. Once a uniform coating of Ni has been deposited, the Si oxidation reaction will self-limit and the reaction will stop. With both electroless plating and light-induced plating, sustained plating occurs and so if non-uniform Ni nucleation occurs (due to variations in the properties of the exposed Si surface), it is very difficult to achieve Ni deposits of uniform thickness across a 156 mm wafer.

The Si oxidation reaction is represented as [21, 22]:

Si-H→ Si+H++e- (1)

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Si+H2O→ Si-OH+H++e- (2)

Si-OH+3H2O→ SiH(OH)3 (3)

For an n-type Si surface immersed in a Ni-loaded alkaline electrolyte, both hydrogen evolution and Ni deposition occur as cathodic reactions, although the competing hydrogen reduction reaction is minimized by the use of an electrolyte of high pH. For the purpose of Si solar cell metallization, the reaction rate can be limited by either the Si oxidation (anodic) reaction or the Ni reduction (cathodic) reaction. The Ni deposition reaction can occur as a valence band (VB) process (Eqn. 4) or a conduction band (CB) process (Eqn. 5) [21, 22]:

Ni2++Si→Si-Ni+2h+ (4)

Ni2++Si+2e-→Si-Ni (5)

Experiments were designed to understand the effects of: i) plating duration; and ii) temperature on the galvanic Ni displacement reaction.

2.1. Experimental

P-type 1 Ω.cm Cz Si wafers with a surface area of 15.6 cm2 were alkaline-textured and diffused in a POCl tube furnace to form emitters with sheet resistivities of 10 Ω/□ and 85 Ω/□. The phosphosilicate glass (PSG) layer was removed after diffusion by immersion in 1% (w/v) HF for 1 min and the rear surfaces of the samples were etched in an HF/HNO3 solution to remove the diffused phosphorus emitter. Subsequently, the non-diffused surfaces of the wafers were protected against anodic processes by spin-coating a layer of novolac resin on the surface. The novolac resin was used because it is resistant to the chemicals in the plating electrolyte studied.

The immersion plating arrangement used for the experiments is illustrated in Fig. 1. The depth of the electrolyte above the surface of the wafers was maintained at 5 mm for all the immersion plated wafers. To correlate the deposition conditions with the rate of reaction, inductively-coupled plasma optical emission spectroscopy (ICP-OES) was employed to quantify the amount of Ni deposited on each of the Si wafers. The aqueous samples for ICP-OES measurements were prepared by using 35% (w/v) HNO3 to dissolve the Ni metal from the plated Si wafers as described in [23]. The immersion plating solution used for the experiments comprised 10% (w/v) NH4F and 100 mM NiSO4 with the pH adjusted to a value of 9.

Fig. 1 Schematic showing the immersion plating arrangement

Wafers that were doped to 10 Ω/□ were used to study the effect of plating duration on the rate of Ni deposition. They were plated at a temperature of 50 °C under illumination provided by compact

Immersion plating electrolyte

Si wafer with resist coating

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fluorescent lights (CFLs) with an intensity of 30k lux at the electrolyte/air interface. Wafers with the 85 Ω/□ emitters were plated at various temperatures for 20 min under room light, to determine the temperature dependence of the galvanic displacement plating mechanism.

2.2. Results and discussion

The average rate of Ni deposition (in Å/s) by galvanic displacement plating on wafers with 10 Ω/□ emitters was calculated using Eqn. 6:

Rate of Ni deposition = (t2 - t1) / (d2 - d1) , (6)

where t1 and t2 (t2 > t1) represent the thickness of the plated Ni layers determined from ICP-OES measurements obtained from two consecutive samples with respect to plating duration, and d1 and d2 (d2 > d1) are the plating durations corresponding to t1 and t2 , respectively.

Fig. 2 (a) illustrates the relationship between the Ni deposition rate and the plating duration for the textured wafers with 10 Ω/□ emitters plated under CFLs at 50 °C. The trend displays an exponential decay in the rate of Ni deposition for this type of sample under the tested plating conditions, suggesting that the plating process saturates with the deposition rate approaching zero. This most likely occurs because both cathodic reactions (Eqn. 4 and 5) are rate-limited by the supply of Si, which is the product of anodic reaction (Eqn. 1) and is also affected by the charge transfer processes (Eqn. 2 and 3). As the Ni deposits, the exposed Si surface area is reduced, which results in a decreased supply of Si, and consequently the Ni deposition rate decreases.

Fig. 2 (b) is an Arrhenius plot showing a linear correlation between the Ni deposition rate and the plating temperature, suggesting that the rate of the reaction is dependent on the Si oxidation process under the test conditions. However, the deposition of Ni on the Si surface can act as catalyst to lower the activation energy required for the process [21, 24], resulting in non-linear relationships or more than one linear lines with different slopes and intercepts. The reason this transitional behavior is not observed in Fig. 2 (b), may be due to a relatively short plating duration (20 min) that the amount of deposited Ni is not enough to make a significant contribution to the rate-limiting reaction.

Fig. 2 (a) Average rate of Ni deposition as a function of the plating durations for textured wafers with 10Ω/□ emitters plated under CFLs at 50 °C; and (b) Arrhenius plot showing the logarithm of reaction rate constant (ln (k)) graphed against inverse temperature

(1/T) for wafers with 85 Ω/□ emitters plated under various temperatures for 20 min under room light.

y = 5.92 e-0.11 x 0.001

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2 1/345 1/333 2/645 2/625 1/303 1/294

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1/T (1/K)

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3. Ni Galvanic Displacement Plating for Silicon Solar Cells

Two batches of Si solar cells were fabricated with Ni seed layers formed by galvanic displacement plating process, to verify that this Si etching-Ni deposition process is suitable for solar cells with i) shallow junctions; and ii) laser doped junctions.

3.1. Experimental

P-type 1 Ω.cm alkaline-textured Cz Si wafers with 100 Ω/□ phosphorus-diffused emitters were used for experiments reported in this section. An industrial plasma-enhanced chemical vapor deposition (PECVD) system was used to deposit 75 nm SiNx with a refractive index of 2.0 on to the emitter surface for anti-reflection and passivation purposes. The rear surface of the samples was etched in an HF/HNO3 solution to remove the diffused phosphorus emitter. Subsequently, aluminium (Al) paste was screen printed on the rear of the solar cells, followed by a fast firing process carried out in a belt furnace at a peak temperature of 850 °C for 1 s to form a full area back surface field (BSF) and p-type metal contact.

Two groups of six solar cells were fabricated, with the front grid pattern either defined by: (A) direct etching [10]; or (B) laser doping [11, 25]. For Group A, a solution of 10% (w/v) NH4F was aerosolized using the ultrasonic atomiser of an OPTOMEC Aerosol Jet Printer (AJP) on to the SiNx surface that had been coated with 20% (w/v) polyacrylic acid (PAA) to remove the SiNx layer in a grid pattern, thus exposing the n-type Si. The fingers were spaced 1.2 mm apart on a 6.5 cm2 cell. For Group B, a continuous wave laser was used to scribe on the SiNx surface, which was coated with 85% w/v H3PO4, to define the grid pattern and incorporate dopants to the patterned regions simultaneously. The fingers were spaced 1mm apart on a 5 cm2 cell. These cells are subsequently referred to as laser-doped selective emitter (LDSE) cells. The finger spacing was chosen for the two groups to have the same metal shading loss.

The Ni seed layer plating for the two groups was performed slightly differently, since the plating rate varied with the surface dopant concentration and morphology [14, 26]. For both groups, the plating was performed at a temperature of 50 °C, however a plating duration of 5 min and 1 min was used for cells in Group A and B, respectively. In all cases only the front surface of the cell contacted the plating solution. Due to the design constraints of the lab setup, only minimal illumination was possible (see Fig. 3). The rear surface of screen-printed Al remained dry during the seed layer formation process thus eliminating any possible contribution of the cell’s light-induced current to the plating process. After Ni plating, a typical Ni sintering process was performed at 350 °C for 1 min to form the silicides. The presence of a Ni silicide not only reduces the contact resistance but also forms a barrier to Cu diffusion [9]. Finally, the conducting layer of Cu was plated for 12 min on top of the silicide via LIP from a Technisol Cu plating solution (obtained from Technic, Inc.), resulting in average finger widths of 40 μm for cells in Group A and 30 μm for cells in Group B.

Fig. 3 Schematic showing the Ni galvanic displacement plating arrangement for solar cell fabrication

Galvanic displacement plating electrolyte Si wafer supported by Teflon blocks, the rear surface is kept dry in air Illumination source

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3.2. Results and discussion

Fig. 4 shows scanning electron microscope (SEM) images of Ni seed layers on the Si surface of a sample cell from Group A (Fig. 4a) and Group B (Fig. 4b) after galvanic Ni displacement plating for 5 min and 1 min respectively, using the arrangement shown in Fig. 3. For the homogeneous emitter solar cells in Group A, the exposed Si surface is textured after using the direct etching method to pattern the dielectric layer, but the variation in Ni layer thickness is small compared to the size of the textures. The plating duration could in the future be shortened to achieve a thinner seed layer without compromising the uniformity of the plated layer. However, for laser doped solar cells in Group B, a shorter plating duration may decrease the layer uniformity, because the rate of Ni deposition may be affected by the differences in localized doping profile and the surface morphology.

Fig. 4 SEM images showing the Ni seed layer deposited by galvanic displacement plating on: (a) direct etched solar cells; and (b) LDSE cells.

The IV data recorded for cells in Groups A and B are presented in Table 1. The highest efficiencies obtained from cells in Group A and B were 18.6% and 19.2% respectively. Their light IV curves are shown in Fig. 5. The Voc is about 5 mV higher for the LDSE cells due to the shielding of minority carriers from the metal contact regions by the laser-doped regions. The LDSE cells also demonstrate higher FFs than the homogeneous emitter solar cells, due to their lower series resistances (Rs) as estimated from IV measurements. The low Rs value is attributed to: (i) a smaller resistive loss in the emitter due to narrower spacing between fingers; (ii) a heavily-doped Si surface underneath the metal contacts; and/or (iii) the formation of a Ni silicide layer that has lower sheet resistivity. Although the wider finger spacing used for the homogeneous emitter cells would have contributed to their higher Rs values, spacing the fingers more closely would have resulted in increased shading and hence reduced Jsc values due to the fact that the direct etched cells had finger widths of 40 µm compared to the 30 µm wide fingers for the LDSE cells.

Si Si

Pt Pt

Ni Ni

a b

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Table 1 IV data of cells fabricated using the galvanic Ni displacement method to form the Ni seed layer. A total of 6 cells were fabricated for each group. Group A were homogeneous emitter cells patterned using the direct etching method [10] and Group B were LDSE cells.

Jsc (mA/cm2) Voc (mV) FF (%) Efficiency (%) Rs (ohm.cm2)

Group A 37.8±0.2 629±2 77.1±0.4 18.4±0.2 0.46±0.05

Group B 38.0±0.2 633±2 78.5±0.4 18.9±0.3 0.28±0.05

Fig. 5 IV curves for an 18.6% efficient direct etched solar cell (━) and a 19.2% efficient LDSE cell (━). Direct etched solar cell: Jsc: 38.2 mA/cm2, Voc: 628.6 mV, FF: 77.6%; LDSE cell: Jsc: 38.3 mA/cm2, Voc: 635.9 mV, FF: 79.0%.

Conclusion In this paper, we presented a Ni seed layer deposition process that has the potential to be adapted for

the fabrication of Si solar cells with either shallow junctions or selective emitters. The method has the advantage of plating a thin (~ 300 nm), continuous and uniform Ni layer. Very low resistance Ni silicide can form after sintering these layers [27] as evidenced by the low series resistance of the fabricated cells, enabling cells with lightly-doped homogeneous emitter and Al-alloyed back surface contact to be fabricated with an efficiency exceeding 18.5%. For LDSE cells, an efficiency of 19.2% was obtained.

Further research will focus on understanding the value of thin Ni seed layers in the formation of low contact resistance silicides and improved adhesion. Excellent metal-silicon adhesion has been observed for the cells metallised in this study, however further work is required to quantify both the contact resistance and adhesion of the formed Ni/Cu contacts.

Acknowledgements

This Program has been supported by the Australian Government through the Australian Renewable Energy Agency (ARENA). The Australian Government, through ARENA, is supporting Australian research and development in solar photovoltaic and solar thermal technologies to help solar power

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become cost competitive with other energy sources. The views expressed herein are not necessarily the views of the Australian Government, and the Australian Government does not accept responsibility for any information or advice contained herein. The authors would like to thank Rabeya Akter and Dorothy Yu of ICP laboratory in the Analytical Centre of the University of New South Wales for their expert guidance of the ICP instruments and analyses of some samples. Also, the first author Yu Yao would like to thank the Australian Government for providing the International Postgraduate Research Scholarship.

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