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Improved Current Control Technique of VSIPWM Inverters with Constant ModulationFrequency and Extended Voltage Range

Luigi Malesani, Member, IEEE, Paolo Tenti, Memb er , IEEE, Elena Gaio, and Roberto PiovanA bstract-A hysteresis control method for three-phase, current-con-trolled, VSI PWM inverters is presented, characterized by constantswitching frequency. It is based on the phase-interference minimizationtechnique presented in a previous paper but avoids the need to knowload parameters.Moreover, it minimizes commutation losses and current ripple whileallowing maximum output ac voltage to be obtained from the inverter.The method exhibits all the favorable characteristics of hysteresis con-trols: fast response, go od accuracy, and robustness.

INTRODUCTIONURRENT control of voltage-fed PWM inverters supplyingC hree-phase ac loads can be achieved by means of three

main techniques, i.e., ramp comparison, predictive control andhysteresis control.Hysteresis control [2]- 7] gives accurate and fast responsewhile requiring minimum hardware. The main limitations of thistechnique are interference among phases and wide variations inswitching frequency, which cause irregular inverter operationand uneven output current waveforms.These limitations can be overcome by suppressing phaseinterference, according to a method that allows separate modula-tions to be performed on each phase. As a result, regularinverter operation and reduced current ripple are obtained.Moreover, by means of a PLL, the hysteresis-band amplitudewithin the output waveform period may be controlled in order toobtain constant modulation frequency.A first application of the method was presented in a previouspaper [ 5 ] . There, however, estimation of passive load parame-ters was needed to eliminate phase interference. Here, a substan-tial improvement of the interference suppression principle ispresented, which keeps all the previous advantages but does notrequire any knowledge of load. The only condition is loadsymmetry.Such a result can be achieved by performing modulations onlyby two inverter legs at a time while keeping the third standing atthe positive or negative dc supply voltage. This kind of opera-tion gives the following additional advantages: Commutationlosses are substantially reduced, and the output voltage capabil-

Paper IPCSD 90-36, approved by the Industrial Power Conversion Com-mittee of the Industry Applications Society for presentation at the 1988Industry Applications Society Annual Meeting, Pittsburgh, PA, October2-7. Manuscript released fo r publication August 16, 1990. This researchwas supported by the Italian Ministry of Public Education and by GruppoMacchine Elettriche of the National Research Council.L. Malesani and P. Tenti are with the Department of Electrical Engineer-ing, University of Padova, Padova, Italy.E. Gaio and R. Piovan are with Istituto Gas Ionizzati, CNR, Padova,IEEE Log Number 9041935.Italy.

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Fig. 1. Three-phase inverter with motor load.ity of the inverter is increased by about 15% in comparison withthe usual inverters, where the load midpoint voltage is kept atthe midpoint of the dc supply.

PRINCIPLEF OPERATIONFig. 1shows a VSI PWM inverter together with the equiva-lent scheme of a symmetric three-phase load including symmet-rical emf _e.In order to describe the interference suppression method,consider the load equations:

U, = ( U , + U 2 + 4 3 ( 2 )where all voltages are referred to the supply midpoint. Instanta-neous phase voltages _U,hich are produced by the inverter, canonly assume values H/2 . Because the load has no neutralconnection, the instantaneous sum of currents i is always zero.Let i* be the load reference currents; the reference phasevoltages that should be applied to obtain the desired currents I*are:

d i*dt_U* RI* + L- + _e + ~ $ 1

24: = (UT + u ; - U 3 ) / 3 .d i*dt_U* RI* + L- + _e + ~ $ 1

24: = (UT + u ; - U 3 ) / 3 .(3 )(4 )

Because the sum of reference currents I* , like actual currentsi , must be zero, (3) and (4 ) are not independent. Thus, there isone degree of freedom in determining reference voltages _U*corresponding to given currents j * .The differences between actual phase voltages _U and referencevoltages g* produce current deviations _S defined asFrom the above relations, it results in

dlidtR_S+ L - = _U - _U* (U, - u $)J

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which shows that due to terms U, and U:, the current deviationin each phase is affected by other phases.In order to suppress the interference, a particular modulationtechnique can be adopted, according to which only two inverterlegs at a time perform the modulation, whereas one of the twoswitches of the third phase is kept closed. Thus, the correspond-ing phase voltage U, is maintained at supply value + E / 2 or- E / 2 . The choice of the standing phase and output polarityvaries according to modulation needs, as will be discussed later.The absence of modulation in standing phase s can be inter-preted in the previous equations by assuming that actual voltageU, and its reference uf coincide. Thus, also uf must be given avalue of + E / 2 or - E / 2 , which can be done in principle.With this assumption, from ( 2 ) , (4), and ( 6 ) , by substitutingthe values of U, and uf and taking into account load symmetry,current errors 6, and U, of modulating phases p and q derive

d6, 2 1R 6 , + L - = -(U, - U;) - -(U, - U*,)dt 3 3d6 2 1dt 3 " 3~ 6 , L L -(U - U* ) - - .) (7)

Errors 6, and 6, can be split as follows:6, = (2u , - u,)/36, = (2u , - u p ) / 3 . (8)

Error components up and U, only depend on correspondingphase voltages u p and U,. In fact, from 7 and 8, one can derivedu,Rap+ L -dt = (U, -4

duR u , + L A (U , - U*,)dt (9)This holds irrespective of load parameters and f.e.m., pro-vided they are symmetric.Signals up and U, are immediately obtained from actualerrors 6, and 6,. Taking into account that the instantaneous sumof 6 6 and 6, is also zero, (8) gives

Hysteresis control can be performed on these signals instead oferrors 6, as usual, thus allowing each inverter phase to behaveindependently. Regular, interference-free operation results.A further advantage is that a PLL can be adopted to controlcommutation frequency by varying dead-band amplitude. Theswitching times of one phase are not, in fact, affected by otherphases. The choice of standing phase must satisfy some condi-tions. In fact U, is the highest voltage that can be generated if itassumes the value of + E / 2 and lowest if it assumes the value of- E / 2 . Thus, uf corresponds at any instant to the highest orlowest of references _U*.This condition is illustrated, without any loss of generality, inFig. 2 , which refers to the case of sinusoidal and symmetricalvoltages to be applied to the load. For example, in time intervalt, , only phase 1 can be kept at + E / 2 voltage, or phase 3 can bekept at - E / 2 . If, in intervals t , , t? , t,, phases 1, 2 , 3,respectively, are kept at + E / 2 , and in intervals t,, t,, t,,phases 3 , 1, 2 are kept at - E / 2 , reference voltages E* result, asis shown in Fig. 2(b).

+$0

E2-

t l

$3

t , ts t4 t5

(b)Fig. 2. Inverter reference voltages for sinusoidal operation: (a) Loadvoltages; (b) inverter output voltag es.

I, .-

I- %fr sFig. 3. Basic scheme of hysteresis control.If the blocked phase is not properly chosen, modulation is nolonger able to ensure that load currents follow references withthe desired accuracy. For instance, in the case of Fig. 2 , if phase1 is kept at + E / 2 even after the end of interval t , he hysteresiscontrol of phase 2 turns on the positive switch of the correspond-ing inverter leg, but the resulting voltage is lower than needed;soon, current error U corresponding to phase 2 exceeds thelower boundary of the hysteresis band.CONTROLMPLEMENTATION

The basic configuration of the proposed hysteresis control isshown in Fig. 3 .Phase current errors _S are obtained, accordingto ( S ) , from actual currents i and references j*.Interference-free error terms up and U, are calculated, ac-cording to (lo), in the multiplexer-adder (MA) under control ofP, signals. They indicate the phase, which is kept standing, andits polarity (1+ , 1- , 2 + , - , 3 + , 3 - ). The correspon-dence used is summarized in Table I.

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TABLE Iblocked phase

1 + 3 - 2 + 1 - 3 + 2 -op 6 - 6, 6 - 6 6 - 6 6 - 6, 6, - 6 6, - 6,aq 6 - 6, 6, - 6 6, - 6 6 - 6, 6 - 6 6 - 6QI + Qq Qq Qp Q ,0" + 0" 0"

TABLE XIblocked phase

1 + 3 - 2 + 1 - 3 + 2 -K p - I 3 - x 1 - x 2 - xK p+ I x 1 + x 2 + x 2 +I K q - 2- x 3 - x 1 - xI K , + x 2 + x 3 + x 1 +K p - K q - 1 - x 2- x 3 - xKp - K q + x X X X X XK p + K q + x 3 + x 1 + x 2 fK , + K O - x X X X X X

Hysteresis modulation is performed on signals up and U, inPLL-HC blocks. Dead-band amplitudes 0 and 0 are varied bythe PL L controls, which ensure synchronization of modulationfrequencies with a reference frequency f,,. The structure ofthese blocks is of the type described in [5].Modulator outputs, which are logic signals Q, and Q,,determine the states Q,, 2 ,Q3 of the inverter legs (high statuscorresponds to positive switch S' closed and negative switch S"open), together with their complements. This is done in theoutput multiplexer (OM) under the control of P , according tothe choice made in the MA. The correspondence is shown inTable I.In the OM, the blocking of one phase to high (+ ) or low ( - )status is also performed in dependence of P, . Signals up and U,are compared in blocks CP with dead bands of increased ampli-tudes in order to detect the occurrence of any excess with respectto the hysteresis band of modulators PLL-HC.To this end, amplitudes 0 and P, are fed to blocks CP andadded to suitable fixed quantities to determine the increaseddeadbands. When signal up exceeds the upper or lower bound-ary of the relative increased band, signals K,+ or K , - gohigh. This is the same for U, and K q + or K,-.This happens whenever the choice of the standing phase is notproper and must be changed. For this purpose, the standingphase selector (SPS) senses signals K, and K , and, dependingon the actual status of P,, selects a new status. The latter ismaintained until a new excess error occurs.The operating rules adopted for the SPS are summarized inTable 11, which indicates the new status in dependence of signalsK and of the previous status. An x indicates that no change inthe previous status is performed for the corresponding situation.

Table II also shows the cases of simultaneous excess signalsfrom both up and U,. These cases correspond to overmodulationconditions of the inverter.IMPLEMENTATIONRITERIA

The above implementation involves several choices, which arediscussed here. First, only two interference-free error terms U,

4

and U, are used; these are derived from the different phasesaccording to the choice of the standing phase. The modulatedsignals are then fed to the corresponding phases.As an alternative solution, three error-free signals could beused, one for each phase, performing three separate modula-tions. This would reduce the complexity of multiplexers MA andOM . However, in this instance, PL L performance would beseverely disturbed due to the time intervals where the corre-sponding phase is blocked. In fact, during these times, thedead-band amplitude would increase to its maximum, and longrecovery transients would result.Second, adoption of the excess error as an index, whichdetermines the commutation of the standing phase, is a simpleand safe way of ensuring proper system operation both in steadystate and in transients. In fact, current errors are easily obtained,and any improper operating condition is immediately detected.Moreover, the amplitude of the band that causes the commuta-tion is usually reduced with respect to its maximum, as is shownin Fig. 7 . This happens because the corresponding phase voltageapproaches one of the dc supply voltage limits, and PL L controlnarrows the band in order to maintain constant modulationfrequency. The excess error, therefore, does not appreciablyaffect overall current deviation.If, similarly to [5], a lower limit is put to the band amplitude,a more regular operation is obtained, as is demonstrated byexperimental tests. In fact, this reduces the transient of the bandamplitude, which, although limited, occurs after commutation.In any case, as the PL L loses synchronization when the requiredvoltage exceeds dc supply limits, a lower limit to the bandamplitude does not appreciably worsen PLL operation at phasecommutations.The phase commutation criterion, which is summarized inTable 11, derives from the following considerations. As thedesired voltage of one phase exceeds that of the standing phaseand, thus, the dc supply limits, two choices are possible: transferof the standing status to the phase exceeding the limits ortransfer of it to the third phase. In the first instance, properoperating conditions are ensured. However, as may be easilyverified in the case of periodic output waveforms such as thoseof Fig. 2(a), unsymmetric behavior results; the blocked status istransferred from the positive (or negative) switch to another ofthe same sign, where each phase is kept still for a third of theperiod.If, according to the Table 11, the third phase is chosen, thepolarity of the standing switch is changed at every phase commu-tation. The resulting output voltage reference waveforms (for thecase of Fig. 2(a)) are shown in Fig. 2(b), with one phasecommutation every sixth of the period.Both choices ensure a sufficient voltage margin, provided thatthe desired maximum line-to-line voltage does not exceed the dcsupply value E . This requirement is less demanding than that ofusual methods, which keep reference load midpoint voltage U*,at the supply midpoint. For symmetric, sinusoidal voltage wave-forms like those of Fig. 2, the benefit is about 15%.When the desired maximum line-to-line voltage is greater thanthe dc supply limits, errors U and U, can simultaneously exceedthe boundaries of the hysteresis band. In these cases, no changesare profitably made on the existing status, except when bothnonblocked phases require a voltage of the same sign of thestanding phase; the latter has the wrong polarity, which is thusreversed.It can be easily shown that with the above strategy, when thedesired voltage increases, inverter operation gradually enters

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Fig. 4. Inverter output: Top-ph ase voltage (200 V/div, 1 ms/div);bottom-phase current (6.6 A/div). Fig. 5 . Inverter output currents (6.6A/div, 2 ms/div).

overmodulation conditions, eventually reaching square-wave op-eration, as is required by full exploitation of the inverter capabil-ity. The operating rules of the MA and OM blocks, which aresummarized in Table I, are derived from the above criteria withthe aim of minimizing the changes in error signals up and U*.With this kind of control, switching frequency is only approxi-mately constant. In fact, switching stops when the correspondingphase is blocked. Moreover, there are appreciable frequencyvariations near the phase commutations, which call for suitablemargins in the maximum switching rate.Nevertheless, average frequency is maintained constant byPLL control within narrow limits, which allows good exploita-tion of switch capability. Moreover, the total number of commu-tations is reduced, typically by a third, by blocked-phase opera-tion. Thus, total switching losses are greatly reduced in compari-son with usual methods.

EXPERIMENTALESULTSAn inverter prototype, controlled according to the describedhysteresis method, was built. The inverter was rated for a 400-Vdc supply and a 10-A r.m.s. output current. The load, aninduction motor, was rated for 220-V r.m.s., 50 Hz, 1500

r/min, and 2 kW. It was operated at variable speed from zero to2000 r/min. Measured equivalent motor parameters were R = 2Q and L = 12 mH. A 5-kHz modulation reference frequencywas adopted.System behavior was tested in the whole operating range, bothin steady state and in transient conditions, demonstrating theexcellent performance of the proposed method. Benefits in termsof output voltage capability and commutation losses were evalu-ated, showing good accordance with theoretical forecasts.Fig. 4 shows typical output voltage and current waveforms.The time interval during which the phase voltage is blocked isevident. Fig. 5shows typical output current waveforms for allthree phases. Fig. 6reports the total current error 6 of one phaseand, on a reduced scale, one interference-free signal U. Theeffectiveness of the method in eliminating the influence of phaseinterference is evident from a comparison of the two waveforms.Fig. 7illustrates the commutation between the phases. For thispurpose, one error U is shown together with its band limits.As band amplitude decreases, which occurs when phase volt-age approaches the supply limit, the lower limit of the amplitudebecomes effective, and the PL L loses synchronization. The errorsignal does not reach the opposite band limit, and an excesserror takes place on the same side on which the last commutation

Fig. 6 . Error signals: Top-tota l phase error 6 (0.66 A/div, 1 ms/div);bottom-interference-free error U (1.33 A/div).

Fig. 7 . Phase comm utation: Top-un der band limit (0.66 A/div, 1 ms/div);center-error signal U (0.66 A/div); bottom-lower band limit (6.6 A/div).was produced. Immediately, phase commutation is commanded,and within a few commutation cycles, the PLL resumes control.Switching frequency is quite uniform throughout the period,except near the phase commutations.Fig. 8demonstrates the system response to transients, whichis peculiar to hysteresis controls. A three-phase step in referencecurrent was applied; the current rises at the maximum rateallowed by the supply voltage and load parameters as errorsignal U saturates. N o current overshoot is produced. Fig. 9shows the system behavior in overmodulation. With the increasein output voltage, the system ensures a gradual transition tosquare-wave operation.

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Fig. 8 Phase current transient response: Top-phase current (6.6 A/div, 2ms/div); bottom-error signal U (1.33 A/div).

Fig. 9. Overmodulation: Top-phase voltage (200 V/div, 2 ms/div),bottom-phase current (13.3 A/div ).CONCLUSIONS

A method for PWM hysteresis current control of three-phasevoltage source inverters is presented. It is based on substantialimprovement of the principle of minimization of interferenceamong modulations of the various phases, which does not re-quire any knowledge of load parameters or e.m.f., provided theload is symmetric.Interference minimization allows PLL control of switchingfrequency. The inherent benefits of the proposed technique arefull exploitation of inverter voltage capabilities and definitereduction in commutation losses. The method exhibits the goodaccuracy and excellent dynamic response, which is typical ofhysteresis techniques. Experimental tests confirmed theoreticalforecasts, showing excellent performance of the control.

ACKNOWLEDGEMENTSThe authors would like to thank M. onetto for his invaluablehelp in implementing the system prototype and R. Sartorello forhis experienced supervision and effective support of experimen-tal work.

REFERENCES[ l ] G. Pfaff, A. Weschta, and A. Vick, Design and experimentalresults of a brushless AC servo-drive, presented at IEEE-IASA n n . M t g . , 1982, pp. 692-697.A. Kawamura and R. G . Hoft, Instantaneous feed-back con-trolled PWM inverters with adaptive hysteresis, IEEE Trans.Industry Applications, vol. IA-20, no. 4, pp. 769-775, 1984.D. M . Brod and D. W . Novotny, Current control of VSI-PWMinverters, IEEE Trans. Industry Applications, vol. IA-21,no . 4 , pp. 562-570, 1985.

[2 ]

[3]

[4] A. Nabae, S . Ogasawara, and H. Akagi, A novel controlscheme of current-controlled PWM inverters, presented atIEEE-IAS Ann. M tg. , 1985, pp. 473-478.L. Malesani, and P. Tenti, A novel hysteresis control methodfor current-controlled VSI PWM inverters with constant modula-tion frequency, presented at IEEE-IAS Ann. Mtg. , Atlanta,E. Gaio, R. Piovan, and L. Malesani, Comparative analysis ofhysteresis modulation methods for VSI current control, pre-sented at Third Int. Conf. Power Electron. Variable-SpeedDrives, London, July 1988.E. Gaio, R. Piovan, and L. Malesani, Evaluation of currentcontrol methods for voltage source inverters, presented at ICEM88, Pisa, Sept. 1988.

[ 5]

Oct. 1987, pp. 851-855.[6 ]

[7]

Luig i Malesani (M63) was born in Lonigo(Vicenza) Italy, on Sept. 18, 1933. He receivedthe doctor degree in electrical engineering, withhonors, from the University of Padova in 1962.From 1963 to 1964, he was employed as aresearcher in the Centro Gas Ionizzati of CNR.From 1964 to 1975, he was an Assistant Profes-sor of electrical engineering, and from 1968 to1975, he was an Associate Professor of Elec-tronic Components at the University of Padova.Since 1975, he has been Professor of AppliedElectronics at the same University. His interests are in power eleciron-ics, circuit design, electrical machines, and automatic control. He haswritten a number of papers on these subjects.Dr. Malesani is member of AEI.

P a o l o Te nt i (M85) was born in Bolzano, Italy,in 1951, and in 1975, he graduated with honorsin electrical engineering in the State Universityof Padova.He started work at the Institute of Electricand Electronic Engineering of the same univer-sity as a lecturer of electrotechnics and was acontract researcher of the National ResearchCouncil of Italy (CNR). In 1979, he beganteaching in Power Electronics as contract pro-fessor and in 1981 became a permanent re-searcher. Since 1985, he has been an associate professor of powerelectronics in the Department of Electrical Engineering of the Univer-sity of Padova. His main research interests concern industrial electron-ics, static power conversion, and industrial drives. Current activitiesregard PWM rectifiers, power filters and compensators, SMPSs forspace and industrial applications, and advanced control techniques.Dr. Tenti is member of AEI.

converter systems. Innumerical simulation

Elena Gaio was born in Lendinara (Rovigo),Italy, on August 8, 1958. She received the Dr.degree in electronics engineering from the Uni-versity of Padova in 1983. In 1985, she re-ceived the Post-Degree diploma from the Schoolof Plasma and Controlled Thermonuclear Fu-sion Engineering from Padova University.Since 1984, she has been with the Istituto GasIonizzati of C.N.R., working with the PowerSupply Group of the RFX thermonuclear fusionexperiment. Her field of interest is in dc/dcparticular, her experience covers the analysis andof power circuits and control systems.Roberto Piovan was born in Megliadino S .Vitale (Padova), Italy, on November 30, 1955.He obtained the Dr. degree in electrical engi-neering from the University of Padova in 1980.He has been working, since 1980, at IstitutoGas Ionizzati of CNR in the power supply fieldfor nuclear fusion research plants. His experi-ence covers supply systems based on capacitoibanks, acldc, and dc/dc converters. Presently,he is working on the power supply commission-ing of the RFX thermonuclear fusion experi-ment.