8/3/2019 01179014

1/4

A DESIGN OF SIM CARD INTERFACE FOR GENERA L PURPOSE +Ping Wu , WenDu , Huijuan Cui

State Key Lab on Microw ave an d Digital Communications, Department of Electronic Engineering,Tsing hua Univers ity, Beijing, 100084, China.,

Abstract A simple and stable SIM card interface designfor general purpose is presented in this paper. This designis strictly according to specification [1][2] and solves themain technical problem of power supply, initializationand data input/output of class A and class B SIM. Withits friendly user interface, som e convenient SIM serviceis provided for extending its application to PersonalCom puter and the Internet.Keywords : SIM card; data input/output, CMOS switch,User Interface

I. IntroductionSIM card (Subscribe Identity Mod ule card) is an

important part in the digital mobile communicationsystem. It records data and information with embeddedLarge Scale Integrated Circuits. Services are provided byth e inputloutpu t of the data through Mobile Equipment.A SIM card readerlwriter is necessary for any

application design based on SIM service. The SIMinterface equipment is seldom found except MobileTelephone, which makes the SIM application designdifficult. There is trouble in some operation like settingup an address book with many entries in a SIM . It shouldbe more convenient i f a more friendly UI (User Interface)is provided. The SIM readerlwriter design presented inthis paper is simple and stable with a CY7C63221 ofCypres s Semiconductor Corp. a s the main controller chipand C MO S switches as controllers o f periphery circuits.

+ Supported by National Natural Science Foundation of China(699720201, in part by the National Fundamental ResearchProgram (G1998030406), and by State Key Lab on Microwaveand Digital Communications, Department of ElectronicEngineering,TSINGHUA University.* Correspondingauthor, Email: wuo00~~aiIs . t s inehua .edu .cn

It connects to PC with a USB (Universal Serial Bus) anda friendly UI is provided.

II. Hardware DesignA SIM card accords with IS07816 specification[l]

a s an IC an d GSMl1.11 specification[2] as a SIM. Sothese two specifications are the main according of ourdesign.

The hardware includes three blocks: the power block,the clock block and main control block.

The power block adopts the REG1117 chip of TI Inc.A standard 5V power is obtained from the USB interface,which can directly act as the power supply for class ASIM. It also plays a role of the input of the power block.The block outputs a standard power of 3.3V. The powerpasses the CMO S switc hes and supplies for the clock andthe SIM card. It depresses a Little to be about 3.0V andjust meets the requirement of class B SIM.

SIM clock is required to be L6MHz. An internal6MHz c lock output of CY7C63221 is used to be theinput of the clock block. In the block, it i s turned downtwice by a clock trigger chip 74HC109, outputting theISMHz SIM clock. Such a clock frequency is alsoselected co nsidering the comm unication rate of USB.Signal CLKin is the clock output of CY7C63221, whoseamplitude is 5V. When SIM-VCC is 5V , the amplitude ofCLKout is 5V . Wh en SlM-VCC is 3.3V, the amplitude ofCLKout is clamped to 3.3V. So the requirement that thehigh level of SIM clock not exceed SIM power supply issatisfied.

The main control block is figured in Fig.]. TheMC14066 chip of MOTOROLA Inc. that has fourindependent CMO S switches isapplied. The switches arecontrolled by four 10s of the main controller. Throughthe work of IO1 and 102, adaptive 5V/3.3V power issupplied to SIM. Meanwhile, the proper RST and CLKsignals are prov ided. They h ave the sam e requirement on

0-7803-7547-5/02/$17.002 0 0 2 IEEE 1271

8/3/2019 01179014

2/4

I/O port that no high level can exceed power supply, sosignal 10 4 and 105must work together to co ntrol high orlow voltage level when inputting data to SIM. When theSIM outputs data, we simply turn off S WITC H4 and readdata in 105. It is a main character in hardware design ofthe skillful and cooperative work of CMOS switches,which substitutes the traditional complex powerconversion circuits composed of triodes and diodes. Itmakes the.hardware explicit and stable, simplifies thefirmware in the main controller chip and appends littlecos t to the whole design.

~

3 v - T c ~ :l o c k Block Sn cardclx*.A

Pov r Blockun.m

lm Iig.1 Main Block of the hardware

UI. FirmwareImplementThe time requirement of SIM signal during

initialization is in Fig.2, where f is the SIM clock. Theflow chart of SIM reset is in Fig.3. Supp ose a SIM cardis in class B and power it up at 3.3V, if success thencontinuing normal operation; otherwise suppose it inclass A, power it up at 5V through approximateapproach.

T he SIM outputs ATR at default baud rate of f/372,where f is the SIM clock. The first byte ofATR is TS(Fig.4). State Z/A represents H igh/Low vo ltage level. m lis the synchronous bit. m 2 m 9 is the data bits and m10 isthe parity bit. TS can be one of two possibilities:ZZAZZZAA or ZZAAAAAA. The former sets up thedirect convention where state Z represents logical value 1and m2 conveys the least significant bit (Isb first). Thefirst byte TS is decoded as 38 n this case. The later setsup the inverse convention where state A representslogical value I and m2 conveys the most significant bit(msb first). The T S is decoded as 3F in this case. ATR is

The definition and format of A TR refers to 1907816-3.

regarded right if TS is decoded right. Decode of ATR cantell SIM parameters like the communication rate itsupports. PPS (Protocol and Parameter Select) procedurecan he taken to configure Enhanced Speed. Use PPScommand FF-OC-FF or just skip PPS to configure allparameters as default value.The procedure of receiving one byte is as follows.First the I 0 5 port of the main con troller is configured asa falling-edge-trigged intermp t input. Every byte has asynchronous bit ml=A and the state of IO port should beZ when no data is conveyed. H ence, the synchronous bitwould trigger an intermpt. In the interrupt serviceprocedure, th e interrupt input on I 0 5 is closed. In default,letu (element time unite, that is, time ofe ve ry bit) equals372/f Delay proper time and read IO at the mid of eachbit. Repeat to receive a whole byte. Decodes the byteaccording to TS . If parity error occurs, set 10 low during0.5- I .S etu after the parity bit. Th us th e SI M will send thebyte repeatedly. If the parity check successes, configure10 5 as the interrupt input for the next byte.

i iTa f b 4om

fw s res-c0 4 fb -o I Ita s7Fig.? Requirement on time of SIM signal during initialization

Fig.4 The first byte of ATRWhen we wite data to SIM, expecting the output on

the SIM IO port to be low, the low v oltage output on I 0 4turns off SWITCH4. The output of I 0 5 is also low. Whenit is desired to output high voltage on the SIM 1 0 port,

1272

8/3/2019 01179014

3/4

configure 1 05 as the input port So it will not influence thevoltage on the port . The high voltage output on I0 4 no wturns on SWITCH4.

We are supposed to know the architecture of data(Fig.5) in SIM when it is reading. MF is the Master Fileat the root position. DF1,DFZ ... re the dedicated files assubdirectory under which an: EFs (Element Files). Everyfile is identified with an ID. The file for address bookADN (Abbreviated Dialing Number) EF in the examplegiven following is in the subdirectory of TE LECOM DF.It is a data set of linear fixed structure that has a tileheader and a number of records (Fig.6). Parameters liketile properties, tile length and record length are includedin the file header. The records, which include formattedinformation like name and telephone number, are storedone by one and indexed for its record number.

The commands for SIM are mapped to APDU(Application Protocol Data Units, Fig.7). The first byteCLA is the class of instruction. AV is used in the GSMapplication. The secon d byte INS is the instruction codefor command. PI, P2 and P3 are parameters forcommand; Data is the body of data. The last two bytesSNI and SN2 in response APDU are the statu s word sindicating the successful or unsuccessful outcom e of thecommand.

,EP2 EP3 El74 EP5

Fig.5 File Structure of S NHeader

Record 1Record2

Fig.6 Data Structure for AD N File

ICLAIINS]Pl(P2(P3 Data 1Ia)~ .

Data 1 SN1 SN2(b)

Fig.7 (a) General F o n a t forCommand APDU (b) GeneralFormat for Response APDUAn application example is given following to show a

whole communication process for the SIM, in which onerecord in the address book is read out, edited and writtenback. D ata stream is in Table.1, all data is hexadecimal.First, send SELECT FlLE command to select MF,TELECOM DF and ADN EF sequentially. Le is thelength of ADN EF file header. Send GET RESPONSEcommand, SIM returns ADN EF file header, in the 15thbyte of which record length RI is indicated. Send READRECO RD command, and S IM returns a complete record.An example record is given in Table.2. 1 14 bytes are forthe name coded in ASCII, ABC in the example, withunused bytes stuffed with ff. The 15th byte is the lengthof the telephone number, w hich is from the 16th byte tothe en d of the record. Th e first byte of the telephonenumber 81 means it is coded in extended BCD format,1234567890 in the exam ple. M odify the record, forexample, change name to CBA and number to0987654321 in Table.2 (b), and send UPDATA RECORDcommand to write the modified record back to SIM.

Table.1 Whole Communication Prmess of Read and Write aRecord in SIM Address Book

+SIM:CSIM A4 00+ S IM : 0 23 F 0 0 / M F I DCSM 9 F L e+SIM : A0 A4 0000 //SELECT FILEC-SIM A4 00+SIM: 027F 10 IITELECOM D F IDC-SIM: 9 F L e3 SIM: A0 A4 00 00 //SELECT FILEC-SIM: A 4 0 03 S I M : 02 6F 3A NADN EF IDtS M 9FL e3S IM : A0 CO 0000 Le //GET RESPONSECSIM: Data 90 00

A0 A4 00OO//SELECT FILE CO MM AN D

1273

8/3/2019 01179014

4/4

+SIM: A0 8 2 0104RI //READ RECORDH I M : Data 90 00J S I M : A0 DC 0104 IRmDATE RECORDCSM D C 0 0+SIM: Data /h ew recordH I M : 9 0 0 0

Table.2 (a)One Record (b)The Record ModifiedData:6587 09 f ff ff ff ff ff ff

41 42 43 ff ffff ff ff ff ff ff ff ff ff 06 81 21 43

(a)Data:5634 12ffff f f f f f f f f f f

43 42 41 ff f f f f ff ff ff ff ff ff ffff 06 81 90 78

(b )The UI is an ordinary Personal Computer.

Communication between SIM and PC is easily fulfilledthrough USB, for the excellent support for USBcommunication on C YlC63 22 I chip. Plenty of functionsare provided in the main controller chip for all kinds ofread/write commands for the client program of U1 to call,which performs as a hardware platform for generalpurpose. The quality is satisfying from the test for SIMcards of China M obile Inc., China Unicorn Inc. and someother companies in Hong Kong.

V. ConclusionA SIM card interface design with good performance is

FirmwvareLoadcdSIM i n ~ i o a d i ~ ete

Power SIM up at 3.3VDslaytime tb,RtretSIM

presented in this paper. Involved techniqu e detai ls arespecified. Th is design m akes the operation s like settingup and sharing of an address book of SIM veryconvenient. The communication of SI M with PC throughUSB extends the application of SIM services to PC andthereby the Internet. The design could perform as ahardware platform for the SIM service applicationdevelopment for general purpose, as well as a referencefor IC readedwriter hardware design.

References[ I ] International Organization For Standardization,International Standard ISO/IEC 7816, First edition,1998-10-15, http://www.iso.ch.[2] European Telecommunications Standards Institute,3GPP TS 11.1 I , version 8.5.0, Release 1999,htto://www.etsi.org.[3] L. Zongxiang, Subscribe Identity Module For GSMSystem, Mobile Communication, China, pp. 4 2 4 6 , Jun.1996.[4] L. Hongyi, Ch. Mading, Interface Design BetweenIC An d Singlechip, Electronic Technology Application,China, pp , 18-19, Oct. 1998.[5] Zh. Xing, ValueAdded Service For ShortMessage, Telecom Science, China, pp. 71-72, Jan.2001.

3,-A I

llutializc SYCCC IS . C 0 n t b C normal operation I d i a l b e f a i l de-active SIM

Fig.3 Flow chart of SIM reset, ( I ) ATR, Answer To Reset

1274

http://www.iso.ch/http://htto//www.etsi.orghttp://htto//www.etsi.orghttp://www.iso.ch/