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    Pseudorandom Clock Signal Generation for

    Data Conversion in a Multistandard Receiver

    Manel BEN-ROMDHANE1,2, Chiheb REBAI1, Adel GHAZEL1, Patricia DESGREYS2 and Patrick LOUMEAU2

    1 CIRTA’COM Research Unit, SUP’COM Tunis, Tunisie2 LTCI-CNRS UMR 5141, TELECOM Paris, France

    [email protected], [email protected]

     Abstract  — In previous work, a Non-Uniform Sampling (NUS)technique to control Analog-to-Digital Conversion (ADC) in amultistandard Radio receiver was proposed. In this context ofwide band radio signals, the NUS-based ADC offers theadvantages of relaxing antialiasing filter (AAF) constraints,decreasing the sampling frequency average and reducing ADCdynamic power consumption. In this paper, we focus ongenerating non-uniform clock for the sample and hold block of theADC. The proposed non-uniform clock is based on quantifiedclock timing. Non-uniform clock is generated from Digital ControlUnit (DCU). The DCU is composed of a Gray counter, a LinearFeedback Shift Register (LFSR) and a multiplexer to generatespecified signals and to select the required clock phase. Simulationresults show that performances are similar for conventionaluniform sampling (US), Additive Random Sampling (ARS) andTime Quantized Additive Random Sampling (TQ-RS) fordifferent quantizing factors.

     Index Terms — Radio Receivers, Signal sampling,Antialiasing, Digital Control Unit.

    I. I NTRODUCTION

    Today, the new commercial challenge to enhance mobiletechnologies business, need the development of multi-standardwireless mobile equipments offering to end users multi-modeand multi-services facilities by using a single low-cost, low-

     power and highly integrated devices. Software Defined Radio(SDR) is the ultimate approach to reach this goal.

    In previous work, a novel concept of Non-Uniform

    Sampling technique for controlling Analog-to-DigitalConversion was proposed to relax constraints of receivercircuits supporting multistandard broadband WiMax/WiFi

     processing [1]. This NUS technique is used to eliminatespectral replicas at integer multiples of sampling frequency

     produced by conventional uniform sampling technique [2, 3,4]. NUS-based ADC will deliver non-uniform samples datastream that need to be converted into uniform samples adaptedto DSP stage data stream. A Reconstruction Algorithm (RA) isrequired at the output of the ADC to achieve this operation. Toachieve the required processing, a Digital Control Unit (DCU)is proposed to provide non-uniform clock to the ADC. Themain contribution presented in this paper is DCU developmentand non-uniform timing signal generation to control the ADC

    clocking. Signal delivered by DCU will be used in the DSPstage to define sampling occurrences for the RA.

    The paper is organized as following. Section 2 presents themultistandard receiver architecture for WiMAX

    (IEEE802.16[5]) and WiFi (IEEE802.11a[6]). NUS technique

    formulation used in this work is given in section 3. Building

     blocks of proposed DCU are detailed in section 4. Section 5 isdedicated to simulation results and performances analysis in

    terms of SNR for proposed Time quantized random sampling

     processing.

    II. MULTISTANDARD NUS-BASED HOMODYNE R ECEIVER 

    It is proposed for the WiMAX and WiFi receiver design to usea homodyne topology as illustrated in figure 1. This topology

    has the advantage of shifting all radio signals processing at base band. It is the most adapted, among analog down

    conversion topologies, to SDR and multistandard processing.

    It also reduces the number of discrete components and

    improves flexibility [7]. Image problem is solved by zero-IFquadrature downconversion. Digital algorithms can be

    implemented in the DSP stage to compensate I/Q mismatch

    [8] and the DC-offset [9] produced in the homodyne receiver.

    Figure 1. Multistandard NUS-based Homodyne Receiver

    Designed receiver is composed of one RF filter because

    WiMAX and WiFi have the same band. This filter is followed by a wide-band LNA, two mixers and two ADCs.

    Conventional uniform sampling on the ADC requires selectiveAAF to suppress alias spectral bins (in case of using Nyquist

    converter) or relaxed AAF (in case of using over-sampling

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    converter). A trade-off could be achieved between relaxing

    AAF selectivity and decreasing sampling frequency ratethanks to non-uniform sampling [1]. Such trade-off implies

    reconstruction algorithm filter in digital domain to recover

    uniform sampled signal. This digital filter could be easily

     performed by Digital Signal Processing since the average ofsamples arrival times is equal to the Nyquist rate relative to

    the channel bandwidth. This architecture offers advantages ofrelaxing AAF constraints and reducing ADC dynamic

    consumption.

    III. NUS PROCESSING FORMULATION

     Non-uniform sampling process converts a continuousanalog bandpass signal x(t) into its discrete representation x s(t)as indicated in equation (1).

    ( ) ( ) ( )+∞

    −∞=

    −=

    k  s t t t  xt  x δ  (1)

    The sampling instant sequence {t k } is defined as t k 

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    • Linear Feedback Shift Register (LFSR) to generate a pseudorandom number, and finally,• Multiplexer which acts as a selective combiner between different phases and LFSR result to select thesignal corresponding to the pseudorandom number

    generated each period of the principal clock.

    The clock controlling the DCU has to be as fast as theresolution needed for the TQ-RS schema.

     B. Gray counter and combiner

    To overcome overlap, we propose to use a gray counteroutputs combined to deliver the needed phases for the non-uniform sampling. The sampling time is the rise edge of theavailable phases. The Gray counter is controlled by CLK and is based on a shift register with log 2(qT  ) flip-flops.

     Non-uniform sampling using TQ-RS schema with a factorqT  equal to 8 requires 3 flip-flops, 7 gates 'NAND', 4 gates

    'NOR' and one gate 'XOR'. In this case, the resulting generated phases for non-uniform sampling are presented in figure 4.

    Φ0

    Φ1

    Φ2

    Φ3

    Φ4

    Φ5

    Φ6

    Φ7

    CLK

    Figure 4. Modified clock phases for non-uniform sampling

    C. LFSR

    Phases generated, from the Gray counter and combiner, areselected according to a random number. A Linear FeedbackShift Register (LFSR) with n length characteristic polynomialG[x] generates a binary pseudorandom sequence each period p=2n-1 when initial state is nonzero. LFSR synthesis requires

    at least n flip-flops. Here we propose to generate pseudorandom numbers using an LFSR composed of log 2(qT  )flip-flops at CLK/qT rate. In our previous example, we need anLFSR as represented in figure 5. The characteristic polynomialis given by (7).

    31][  x x xG ++= (7)

    0V0V

    0V

    SD

    CP

    R

    Q_Q

    SD

    CP

    R

    Q_Q

    SD

    CP

    R

    Q_Q

    Init

    CLK

     x0 x1   x2

    Figure 5. LFSR Architecture

     D. Selective combiner

    Having the different sampling phases and the pseudorandom number, we have to introduce a selectivecombiner to select the phase according to the delay i∆ where iis the pseudorandom number generated by the LFSR being inthe set {0,1,…, qT -1}. The selective combiner is a multiplexer qT  inputs to one output controlled by log 2(qT  ) signals.

     E. General results

    In figure 6, phases generated by the Gray counter andcombiner (Φ0,Φ1,...,Φ7), pseudorandom numbers "L2L1L0" andthe result pseudorandom clock CLK  NUS are given.

    The mean sampling frequency corresponds to the frequencyof 

    T CLK  s q f  f  /=  where CLK  f   is the reference clock frequency.

    Sampling frequency takes values betweenCLK T T   f qq ))12/(( −

    andCLK  f  . ADC should be able to convert at all these rates to

    finally deliver data at mean sampling frequency and sodiminush his dynamic power consumption.

    Φ0

    Φ1

    Φ2

    Φ3

    Φ4

    Φ5

    Φ6

    Φ7

    CLK

    Init

    L0

    L1

    L2

    CLKNUS

    Figure 6. Non-uniform clock signal (DCU output)

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    V. PERFORMANCE R ESULTS

    WiMAX and WiFi have channel bandwidth (BW) equal to15,75 MHz and 16.6 MHz respectively and channel spacing of20 MHz. When signal test x(t) is sinusoidal and has a frequency

     f in in the range [DC,BW/2], the mean sampling frequency  f  s is16.6 MHz. In this case of non-uniform sampling, antialiasingrequires a 3rd order filter. However, Nyquist sampling needs an25th AAF order [1]. The NUS sequence used is TQ-RS for atime quantization ∆=1/(qT .f  s ), where qT   the quantization timefactor is an integer.

    Simulation results are performed for cubic splineinterpolation. Simulation cases are conventional uniformsampling US, additive random sampling ARS and timequantized random sampling TQ-RS for different values ofquantification factor (qT=8, 16, 32) using the pseudorandomclock generated from a reference clock frequency 132.8MHz.Figure 7 gives simulation results for WiMAX/WiFi signals

     processed for 12-bit signal quantization.

    0 0.05 0.1 0.15 0.2 0.25 0.3 0.3570

    71

    72

    73

    74

    75

    76

    77SNR reconstruction for some sampling schemes

       S   N   R

       (   d   B   )

    sm

    ARS

    TQ-RS qT=8

    TQ-RS qT=16

    TQ-RS qT=32

    US

    Figure 7. Performances versus sm=σ /T  s : Comparison between conventionaluniform sampling (US), Additive Random sampling (ARS) and Time

    Quantized Additive Random Sampling (TQ-RS)for different casesof qT (8, 16, 32)

    According to results of figure 7, performances in terms ofSNR are simular for all cases. All of simulation cases return anSNR reconstruction between 70 dB and 77 dB obtained fordifferent σ /T  s  values. Therefore, we can satisfy the dynamic

    ranges required by the WiMAX and WiFi standards using theADC controlled by the pseudorandom clock defined in the present work.

    VI. CONCLUSION

    In previous works, a system analysis of a basebandmultistandard wide-band receiver architecture time-controlled by Non-Uniform Sampling technique was proposed. The main

    motivation of proposed radio design is to reduce ADC andAAF circuit complexities observed for SDR and multistandardradio design comparing with conventional uniform samplingtechnique. In this paper, authors proposed a pseudorandomclock signal generation to be applied to digitizing circuit. The

     proposed clock deliver quantized timing and is generated fromdigital control unit requiring gray counter, LFSR, decoder andsome combiner blocs. Quantizing resolution corresponds to thereference clock period. Obtained simulations show that randomsampling and time quantized random sampling for somequantization time factors return similar SNR performanceswhen applying cubic spline interpolation for reconstructionalgorithm. Conventional sampling returns the same SNRhowever the required AAF order is widely higher.

    ACKNOWLEDGMENT

    The authors would like to thank the CMCU organization

    (Comité Mixte de Coopération Universitaire) to financiallysupport this project.

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