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KIN TRC MY TNH &
HP NG
04 Lp trnh hp ng (Phn 2)
ThS V Minh Tr [email protected]
Gii thiu 2
Nhim v c bn nht ca CPU l phi thc
hin cc lnh c yu cu, gi l instruction
Cc CPU s s dng cc tp lnh (instruction
set) khc nhau c th giao tip vi n
Kch thc lnh 3
Kch thc lnh b nh hng bi:
Cu trc ng truyn bus
Kch thc v t chc b nh
Tc CPU
Gii php ti u lnh:
Dng lnh c kch thc ngn, mi lnh ch nn c
thc thi trong ng 1 chu k CPU
Dng b nh cache
B lnh MIPS 4
Chng ta s lm quen vi tp lnh cho kin trc MIPS
(PlayStation 1, 2; PSP; Windows CE, Routers)
c xy dng theo kin trc (RISC) vi 4 nguyn tc:
Cng n gin, cng n nh
Cng nh gn, x l cng nhanh
Tng tc x l cho nhng trng hp thng xuyn xy ra
Thit k i hi s tha hip tt
Cu trc c bn ca 1 chng trnh hp ng trn MIPS
5
.data # khai bo cc data label (c th hiu l cc bin)
# sau ch th ny
label1:
label2:
.text # vit cc lnh sau ch th ny
.globl
.globl main # y l text label ton cc bt buc ca program
main: # im text label bt u ca program
Hello.asm 6
.data # data segment
str: .asciiz Hello asm !
.text # text segment
.globl main
main: # starting point of program
addi $v0, $0, 4 # $v0 = 0 + 4 = 4 print str syscall
la $a0, str # $a0 = address(str)
syscall # excute the system call
B lnh MIPS Thanh ghi 7
L n v lu tr data duy nht trong CPU
Trong kin trc MIPS:
C tng cng 32 thanh ghi nh s t $0 $31
Cng t cng d qun l, tnh ton cng nhanh
C th truy xut thanh ghi qua tn ca n (slide sau)
Mi thanh ghi c kch thc c nh 32 bit
B gii hn bi kh nng tnh ton ca chip x l
Kch thc ton hng trong cc cu lnh MIPS b gii hn
32 bit, nhm 32 bit gi l t (word)
Thanh ghi ton hng 8
Nh chng ta bit khi lp trnh, bin
(variable) l khi nim rt quan trng khi
mun biu din cc ton hng tnh ton
Trong kin trc MIPS khng tn ti khi nim
bin, thay vo l thanh ghi ton hng
Thanh ghi ton hng 9
Ngn ng cp cao (C, Java): ton hng = bin (variable)
Cc bin lu trong b nh chnh
Ngn ng cp thp (Hp ng): ton hng cha trong cc thanh ghi
Thanh ghi khng c kiu d liu
Kiu d liu thanh ghi c quyt nh bi thao tc trn thanh ghi
So snh:
u: Thanh ghi truy xut nhanh hn nhiu b nh chnh
Khuyt: Khng nh b nh chnh, thanh ghi l phn cng c s lng
gii hn v c nh Phi tnh ton k khi s dng
Mt s thanh ghi ton hng quan tm 10
Save register:
MIPS ly ra 8 thanh ghi ($16 - $23) dng thc hin cc php
tnh s hc, c t tn tng ng l $s0 - $s7
Tng ng trong C, cha gi tr bin (variable)
Temporary register:
MIPS ly ra 8 thanh ghi ($8 - $15) dng cha kt qu trung
gian, c t tn tng ng l $t0 - $t7
Tng ng trong C, cha gi tr bin tm (temporary
variable)
Bnh danh sch thanh ghi MIPS 11
Thanh ghi 1 ($at) dnh cho assembler. Thanh ghi 26 27 ($k0 - $k1) dnh cho OS
B lnh MIPS 4 thao tc chnh 12
Phn 1: Php ton s hc (Arithmetic)
Phn 2: Di chuyn d liu (Data transfer)
Phn 3: Thao tc lun l (Logical)
Phn 4: R nhnh (Un/Conditional branch)
Phn 1: Php ton s hc 13
C php:
opt opr, opr1, opr2
opt (operator): Tn thao tc (ton t, tc t)
opr (operand): Thanh ghi (ton hng, tc t ch)
cha kt qu
opr1 (operand 1): Thanh ghi (ton hng ngun 1)
opr2 (operand 2): Thanh ghi / hng s
(ton hng ngun 2)
V d 14
Gi s xt cu lnh sau:
add a, b, c
Ch th cho CPU thc hin php cng
a b + c
a, b, c c gi l thanh ghi ton hng
Php ton trn ch c th thc hin vi ng 3
ton hng (khng nhiu cng khng t hn)
Cng, tr s nguyn 15
Cng (Add):
Cng c du: add $s0, $s1, $s2
Cng khng du: addu $s0, $s1, $s2 (u: unsigned)
Din gii: $s0 $s1 + $s2
C/C++: (a = b + c)
Tr (Subtract):
Tr c du: sub $s0, $s1, $s2
Tr khng du: subu $s0, $s1, $s2 (u: unsigned)
Din gii: $s0 $s1 - $s2
C/C++: (a = b - c)
Nhn xt 16
Ton hng trong cc lnh trn phi l thanh ghi
Trong MIPS, lnh thao tc vi s nguyn c du c biu din
di dng b 2
Lm sao bit 1 php ton c bin dch t C (v d a = b + c) l
thao tc c du hay khng du? Da vo trnh bin dch
C th dng 1 ton hng va l ngun va l ch
add $s0, $s0, $s1
Cng, tr vi hng s? $s2 s ng vai tr l hng s
Cng: addi $s0, $s1, 3 (addi = add immediate)
Tr: addi $s0, $s1, -3
V d 1 17
Chuyn thnh lnh MIPS t lnh C:
a = b + c + d e
Chia nh thnh nhiu lnh MIPS:
add $s0, $s1, $s2 # a = b + c
add $s0, $s0, $s3 # a = a + d
sub $s0, $s0, $s4 # a = a e
Ti sao dng nhiu lnh hn C?
B gii hn bi s lng cng mch ton t v thit k bn trong cng
mch
K t # dng ch thch trong hp ng cho MIPS
V d 2 18
Chuyn thnh lnh MIPS t lnh C:
f = (g + h) (i + j)
Chia nh thnh nhiu lnh MIPS:
add $t0, $s1, $s2 # temp1 = g + h
add $t1, $s3, $s4 # temp2 = i + j
sub $s0, $t0, $t1 # f = temp1 temp2
Lu : Php gn ? 19
Kin trc MIPS khng c cng mch dnh ring
cho php gn
Gii php: Dng thanh ghi zero ($0 hay $zero)
lun mang gi tr 0
V d:
add $s0, $s1, $zero
Tng ng: $s0 = $s1 + 0 = $s1 (gn)
Lnh add $zero, $zero, $s0 c hp l ?
Php nhn, chia s nguyn 20
Thao tc nhn / chia ca MIPS c kt qu
cha trong cp 2 thanh ghi tn l $hi v $lo
Bit 0-31 thuc $lo v 32-63 thuc $hi
Php nhn 21
C php:
mult $s0, $s1
Kt qu (64 bit) cha trong 2 thanh ghi
$lo (32 bit) = (($s0 * $s1) > 32
$hi (32 bit) = ($s0 * $s1) >> 32
Cu hi: Lm sao truy xut gi tr 2 thanh ghi $lo v $hi?
Dng 2 cp lnh mflo (move from lo), mfhi (move from
hi) - mtlo (move to lo), mthi (move to high)
mflo $s0 ($s0 = $lo)
mfhi $s0 ($s0 = $hi)
Php chia 22
C php:
div $s0, $s1
Kt qu (64 bit) cha trong 2 thanh ghi
$lo (32 bit) = $s0 / $s1 (thng)
$hi (32 bit) = $s0 % $s1 (s d)
Thao tc s du chm ng 23
MIPS s dng 32 thanh ghi du phy ng
biu din chnh xc n ca s thc. Cc
thanh ghi ny c tn l : $f0 $f31.
biu din chnh xc kp (double
precision) th MIPS s dng s ghp i ca 2
thanh ghi c chnh xc n.
Vn trn s 24
Kt qu php tnh vt qua min gi tr cho php Trn s
xy ra
Mt s ngn ng c kh nng pht hin trn s (Ada), mt
s khng (C)
MIPS cung cp 2 loi lnh s hc:
add, addi, sub: Pht hin trn s
addu, addiu, subu: Khng pht hin trn s
Trnh bin dch s la chn cc lnh s hc tng ng
Trnh bin dch C trn kin trc MIPS s dng addu, addiu, subu
Phn 2: Di chuyn d liu 25
Mt s nhn xt:
Ngoi cc bin n, cn c cc bin phc tp th hin
nhiu kiu cu trc d liu khc nhau, v d nh array
Cc cu trc d liu phc tp c s phn t d liu
nhiu hn s thanh ghi ca CPU lm sao lu ??
Lu phn nhiu data trong RAM, ch load 1 t vo
thanh ghi ca CPU khi cn x l
Vn lu chuyn d liu gia thanh ghi v b nh ?
Nhm lnh lu chuyn d liu (data transfer)
26
B nh chnh 27
C th c xem nh l array 1 chiu rt ln, mi phn
t l 1 nh c kch thc bng nhau
Cc nh c nh s th t t 0 tr i
Gi l a ch (address) nh
truy xut d liu trong nh cn phi cung cp a
ch nh
Cu trc lnh 28
C php:
opt opr, opr1 (opr2)
opt (operator): Tn thao tc (Load / Save)
opr (operand): Thanh ghi lu t nh (word)
opr1 (operand 1): Hng s nguyn
opr2 (operand 2): Thanh ghi cha a ch vng nh
c s (a ch nn)
Hai thao tc chnh 29
lw: Np 1 t d liu, t b nh, vo 1 thanh ghi trn
CPU (Load Word - lw)
lw $t0, 12 ($s0)
Np t nh c a ch ($s0 + 12) cha vo thanh ghi $t0
sw: Lu 1 t d liu, t thanh ghi trn CPU, ra b nh
(Store Word sw)
sw $t0, 12 ($s0)
Lu gi tr trong thanh ghi $t0 vo nh c a ch ($s0 + 12)
Lu 1 30
$s0 c gi l thanh ghi c s (base register)
thng dng lu a ch bt u ca mng
/ cu trc
12 gi l di (offset) thng dng truy
cp cc phn t mng hay cu trc
Lu 2 31
Mt thanh ghi c lu bt k gi tr 32 bit no, c
th l s nguyn (c du / khng du), c th l
a ch ca 1 vng nh trn RAM
V d:
add $t2, $t1, $t0 $t0, $t1 lu gi tr
lw $t2, 4 ($t0) $t0 lu a ch (C: con tr)
Lu 3 32
S bin cn dng ca chng trnh nu nhiu
hn s thanh ghi ca CPU?
Gii php:
Thanh ghi ch cha cc bin ang x l hin hnh
v cc bin thng s dng
K thut spilling register
V d 1 33
Gi s A l 1 array gm 100 t vi a ch bt u (a ch
nn base address) cha trong thanh ghi $s3. Gi tr cc
bin g, h ln lt cha trong cc thanh ghi $s1 v $s2
Hy chuyn thnh m hp ng MIPS:
g = h + A[8]
Tr li:
lw $t0, 32($s3) # Cha A[8] vo $t0
add $s1, $s2, $t0
V d 2 34
Hy chuyn thnh m hp ng MIPS:
A[12] = h - A[8]
Tr li:
lw $t0, 32($s3) # Cha A[8] vo $t0
sub $t0, $s2, $t0
sw $t0, 48($s3) # Kt qu vo A[12]
Nguyn tc lu d liu trong b nh 35
MIPS thao tc v lu tr d liu trong b nh
theo 2 nguyn tc:
Alignment Restriction
Big Endian
Alignment Restriction 36
MIPS lu d liu trong b nh theo nguyn tc Alignment
Restriction
Cc i tng lu trong b nh (t nh) phi bt u ti a
ch l bi s ca kch thc i tng
M mi t nh c kch thc l 32 bit = 4 byte = kch thc
lu tr ca 1 thanh ghi trong CPU
Nh vy, t nh phi bt u ti a ch l bi s ca 4
Big Endian 37
MIPS lu tr th t cc byte trong 1 word trong b nh
theo nguyn tc Big Endian (Kin trc x86 s dng Little
Endian)
V d: Lu tr gi tr 4 byte: 12345678h trong b nh
a ch byte Big Endian Little Endian
0 12 78
1 34 56
2 56 34
3 78 12
Lu 38
truy xut vo 1 t nh sau 1 t nh th cn
tng 1 lng 4 byte ch khng phi 1 byte
Do lun nh rng cc lnh lw v sw th di
(offset) phi l bi s ca 4
Tuy nhin b nh cc my tnh c nhn ngy nay
li c nh a ch theo tng byte (8 bit)
M rng: Load, Save 1 byte 39
Ngoi vic h tr load, save 1 t (lw, sw), MIPS cn
h tr load, save tng byte (ASCII)
Load byte: lb
Save byte: sb
C php lnh tng t lw, sw
V d:
lb $s0, 3 ($s1)
Lnh ny np gi tr byte nh c a ch ($s1 + 3) vo
byte thp ca thanh ghi $s0
Nguyn tc 40
Gi s np 1 byte c gi tr xzzz zzzz vo thanh ghi trn
CPU (x: bit du ca byte )
Gi tr thanh ghi trn CPU (32 bit) sau khi np c dng:
xxxx xxxx xxxx xxxx xxxx xxxx xzzz zzzz
Tt c cc bit t phi sang s c gi tr = bit du ca gi
tr 1 byte va np (sign-extended)
Nu mun cc bit cn li t phi sang c gi tr khng
theo bit du (=0) th dng lnh:
lbu (load byte unsigned)
M rng: Load, Save 2 byte (1/2 Word) 41
MIPS cn h tr load, save 1/2 word (2 byte) (Unicode)
Load half: lh (np 2 byte nh vo 2 byte thp ca thanh ghi $s0)
Store half: sh
C php lnh tng t lw, sw
V d:
lh $s0, 3 ($s1)
Lnh ny np gi tr 2 byte nh c a ch ($s1 + 3) vo 2
byte thp ca thanh ghi $s0
Phn 3: Thao tc lun l 42
Chng ta xem xt cc thao tc s hc (+, -, *, /)
D liu trn thanh ghi nh 1 gi tr n (s nguyn c du /
khng du)
Cn thao tc trn tng bit ca d liu Thao tc lun l
Cc thao tc lun l xem d liu trong thanh ghi l dy 32 bit
ring l thay v 1 gi tr n
C 2 loi thao tc lun l:
Php ton lun l
Php dch lun l
Php ton lun l 43
C php:
opt opr, opr1, opr2
opt (operator): Tn thao tc
opr (operand): Thanh ghi (ton hng ch)
cha kt qu
opr1 (operand 1): Thanh ghi (ton hng ngun 1)
opr2 (operand 2): Thanh ghi / hng s
(ton hng ngun 2)
Php ton lun l 44
MIPS h tr 2 nhm lnh cho cc php ton lun l trn bit:
and, or, nor: Ton hng ngun th 2 (opr2) phi l thanh ghi
andi, ori: Ton hng ngun th 2 (opr2) l hng s
Lu : MIPS khng h tr lnh cho cc php lun l NOT,
XOR, NAND
L do: V vi 3 php ton lun l and, or, nor ta c th to ra
tt c cc php lun l khc Tit kim thit k cng mch
V d:
not (A) = not (A or 0) = A nor 0
Php dch lun l 45
C php:
opt opr, opr1, opr2
opt (operator): Tn thao tc
opr (operand): Thanh ghi (ton hng ch)
cha kt qu
opr1 (operand 1): Thanh ghi (ton hng ngun 1)
opr2 (operand 2): Hng s < 32 (S bit dch)
Php dch lun l 46
MIPS h tr 2 nhm lnh cho cc php dch lun l
trn bit:
Dch lun l
Dch tri (sll shift left logical): Thm vo cc bit 0 bn phi
Dch phi (srl shift right logical): Thm vo cc bit 0 bn tri
Dch s hc
Khng c dch tri s hc
Dch phi (sra shift right arithmetic): Thm cc bit = gi tr
bit du bn tri
V d 47
sll $s1, $s2, 2 # dch tri lun l $s2 2 bit
$s2 = 0000 0000 0000 0000 0000 0000 0101 0101 = 85
$s1 = 0000 0000 0000 0000 0000 0001 0101 0100 = 340 (85 * 22)
srl $s1, $s2, 2 # dch phi lun l $s2 2 bit
$s2 = 0000 0000 0000 0000 0000 0000 0101 0101 = 85
$s1 = 0000 0000 0000 0000 0000 0000 0001 0101 = 21 (85 / 22)
sra $s1, $s2, 2 # dch phi s hc $s2 2 bit
$s2 = 1111 1111 1111 1111 1111 1111 1111 0000 = -16
$s1 = 1111 1111 1111 1111 1111 1111 1111 1100 = -4 (-16 / 22)
Phn 4: R nhnh 48
Tng t lnh if trong C: C 2 loi
if (condition) clause
if (condition)
clause1
else
clause2
Lnh if th 2 c th din gii nh sau:
if (condition) goto L1 // if Lm clause1
clause2 // else Lm clause2
goto L2 // Lm tip cc lnh khc
L1: clause1
L2:
R nhnh trong MIPS 49
R nhnh c iu kin
beq opr1, opr2, label
beq: Branch if (register are) equal
if (opr1 == opr2) goto label
bne opr1, opr2, label
bne: Branch if (register are) not equal
if (opr1 != opr2) goto label
R nhnh khng iu kin
j label
Jump to label
Tng ng trong C: goto label
C th vit li thnh: beq $0, $0, label
V d 50
Bin dch cu lnh sau trong C thnh lnh hp ng MIPS:
if (i == j) f = g + h;
else f = g h;
nh x bin f, g, h, i, j tng ng vo cc thanh ghi: $s0, $s1, $s2, $s3, $s4
Lnh hp ng MIPS:
beq $s3, $s4, TrueCase # branch (i == j)
sub $s0, $s1, $s2 # f = g h (false)
j Fin # goto Fin label
TrueCase: add $s0, $s1, $s2 # f = g + h (true)
Fin:
X l vng lp 51
Xt mng int A[]. Gi s ta c vng lp trong C:
do {
g = g + A[i];
i = i + j;
} while (i != h);
Ta c th vit li:
Loop: g = g + A[i];
i = i + j;
if (i != h) goto Loop;
S dng lnh r c iu kin biu din vng lp!
X l vng lp 52
nh x bin vo cc thanh ghi nh sau:
g h i j base address of A
$s1 $s2 $s3 $s4 $s5
Trong v d trn c th vit li thnh lnh MIPS nh sau:
Loop: sll $t1, $s3, 2 # $t1 = i * 22
add $t1, $t1, $s5 # $t1 = addr A[i]
lw $t1, 0 ($t1) # $t1 = A[i]
add $s1, $s1, $t1 # g = g + A[i]
add $s3, $s3, $s4 # i = i + j
bne $s3, $s2, Loop # if (i != j) goto Label
X l vng lp 53
Tng t cho cc vng lp ph bin khc trong C:
while
for
dowhile
Nguyn tc chung:
Vit li vng lp di dng goto
S dng cc lnh MIPS r nhnh c iu kin
So snh khng bng ? 54
beq v bne c s dng so snh bng (== v != trong C)
Mun so snh ln hn hay nh hn?
MIPS h tr lnh so snh khng bng:
slt opr1, opr2, opr3
slt: Set on Less Than
if (opr2 < opr3)
opr1 = 1;
else
opr1 = 0;
So snh khng bng 55
Trong C, cu lnh sau:
if (g < h) goto Less; # g: $s0, h: $s1
c chuyn thnh lnh MIPS nh sau:
slt $t0, $s0, $s1 # if (g < h) then $t0 = 1
bne $t0, $0, Less # if ($t0 != 0) goto Less
# if (g < h) goto Less
Nhn xt: Thanh ghi $0 lun cha gi tr 0, nn lnh
bne v bep thng dng so snh sau lnh slt
Cc lnh so snh khc? 56
Cc php so snh cn li nh >, , th sao?
MIPS khng trc tip h tr cho cc php so
snh trn, tuy nhin da vo cc lnh slt, bne,
beq ta hon ton c th biu din chng!
a: $s0, b: $s1 57
a < b
slt $t0, $s0, $s1 # if (a < b) then $t0 = 1
bne $t0, $0, Label # if (a < b) then goto Label
# else then do something
a > b
slt $t0, $s1, $s0 # if (b < a) then $t0 = 1
bne $t0, $0, Label # if (b < a) then goto Label
# else then do something
a b
slt $t0, $s0, $s1 # if (a < b) then $t0 = 1
beq $t0, $0, Label # if (a b) then goto Label
# else then do something
a b
slt $t0, $s1, $s0 # if (b < a) then $t0 = 1
beq $t0, $0, Label # if (b a) then goto Label
# else then do something
Nhn xt 58
So snh == Dng lnh beq
So snh != Dng lnh bne
So snh < v > Dng cp lnh (slt bne)
So snh v Dng cp lnh (slt beq)
So snh vi hng s 59
So snh bng: beq / bne
So snh khng bng: MIPS h tr sn lnh slti
slti opr, opr1, const
Thng dng cho switchcase, vng lp for
V d: switchcase trong C 60
switch (k) {
case 0: f = i + j; break;
case 1: f = g + h; break;
case 2: f = g - h; break;
}
Ta c th vit li thnh cc lnh if lng nhau:
if (k == 0) f = i + j;
else if (k == 1) f = g + h;
else if (k == 2) f = g h;
nh x gi tr bin vo cc thanh ghi:
f g h i j k
$s0 $s1 $s2 $s3 $s4 $s5
V d: switchcase trong C 61
Chuyn thnh lnh hp ng MIPS:
bne $s5, $0, L1 # if (k != 0) then goto L1
add $s0, $s3, $s4 # else (k == 0) then f = i + j
j Exit # end of case Exit (break)
L1: addi $t0, $s5, -1 # $t0 = k 1
bne $t0, $0, L2 # if (k != 1) then goto L2
add $s0, $s1, $s2 # else (k == 1) then f = g+ h
j Exit # end of case Exit (break)
L2: addi $t0, $s5, -2 # $t0 = k 2
bne $t0, $0, Exit # if (k != 2) then goto Exit
sub $s0, $s1, $s2 # else (k == 2) then f = g - h
Exit: .
Trnh con (Th tc) 62
Hm (fucntion) trong C (Bin dch) Trnh con (Th tc) trong hp ng
Gi s trong C, ta vit nh sau:
void main()
{
int a, b;
sum(a, b);
}
int sum(int x, int y)
{
return (x + y);
}
Hm c chuyn thnh lnh hp ng nh th no ?
D liu c lu tr ra sao ?
63
sum (a, b); /* a: $s0, b: $s1 */
[Lm tip thao tc khc]
}
int sum (int x, int y) {
return x + y;
}
a ch Lnh
1000 add $a0, $s0, $zero # x = a
1004 add $a1, $s1, $zero # y = b
1008 addi $ra, $zero, 1016 # lu a ch lt sau quay v vo $ra = 1016
1012 j sum # nhy n nhn sum
1016 [Lm tip thao tc khc]
.
2000 sum: add $v0, $a0, $a1 # thc hin th tc sum
2024 jr $ra # nhy ti a ch trong $ra
C
M
I
P
S
Thanh ghi lu tr d liu trong th tc 64
MIPS h tr 1 s thanh ghi lu tr d liu cho th tc:
i s input (argument input): $a0 $a1 $a2 $a3
Kt qu tr v (return ): $v0 $v1
Bin cc b trong th tc: $s0 $s1 $s7
a ch quay v (return address): $ra
Nu c nhu cu lu nhiu d liu (i s, kt qu tr v, bin
cc b) hn s lng thanh ghi k trn?
Bao nhiu thanh ghi l ?
S dng ngn xp (stack)
Nhn xt 65
65
sum (a, b); /* a: $s0, b: $s1 */
[Lm tip thao tc khc]
}
int sum (int x, int y) {
return x + y;
}
a ch Lnh
1000 add $a0, $s0, $zero # x = a
1004 add $a1, $s1, $zero # y = b
1008 addi $ra, $zero, 1016 # lu a ch lt sau quay v vo $ra = 1016
1012 j sum # nhy n nhn sum
1016 [Lm tip thao tc khc]
.
2000 sum: add $v0, $a0, $a1 # thc hin th tc sum
2024 jr $ra # nhy ti a ch trong $ra
C
M
I
P
S
Ti sao khng dng lnh j cho n gin, m li
dng jr ?
Th tc sum c th c gi nhiu ch
khc nhau, do vy v tr quay v mi ln gi s
khc nhau
Lnh mi: jr
NHN XT 1
Nhn xt 66
66
sum (a, b); /* a: $s0, b: $s1 */
[Lm tip thao tc khc]
}
int sum (int x, int y) {
return x + y;
}
a ch Lnh
1000 add $a0, $s0, $zero # x = a
1004 add $a1, $s1, $zero # y = b
1008 addi $ra, $zero, 1016 # lu a ch lt sau quay v vo $ra = 1016
1012 j sum # nhy n nhn sum
1016 [Lm tip thao tc khc]
.
2000 sum: add $v0, $a0, $a1 # thc hin th tc sum
2024 jr $ra # nhy ti a ch trong $ra
C
M
I
P
S
Thay v dng 2 lnh lu a ch quay v vo
thanh ghi $ra v nhy n th tc sum:
1008 addi $ra, $zero, 1016 # $ra = 1016
1012 j sum # goto sum
MIPS h tr lnh mi: jal (jump and link)
thc hin 2 cng vic trn:
1008 jal sum # $ra = 1012, goto sum
Ti sao khng cn xc nh tng minh a
ch quay v trong $ra ?
NHN XT 2
Cc lnh nhy mi 67
jr (jump register)
C php: jr register
Din gii: Nhy n a ch nm trong thanh ghi register thay v nhy n 1 nhn nh lnh j (jump)
jal (jump and link)
C php: jal label
Din gii: Thc hin 2 bc:
Bc 1 (link): Lu a ch ca lnh k tip vo thanh ghi $ra (Ti sao khng phi l a ch ca lnh hin ti ?)
Bc 2 (jump): Nhy n nhn label
Hai lnh ny c s dng hiu qu trong th tc
jal: t ng lu a ch quay v chng trnh chnh vo thanh ghi $ra v nhy n th tc con
jr $ra: Quay li thn chng trnh chnh bng cch nhy n a ch c lu trc trong $ra
Bi tp 68
Chuyn on chng trnh sau thnh m hp ng MIPS:
void main()
{
int i, j, k, m;
i = mult (j, k);
m = mult (i, i);
}
int mult (int mcand, int mlier)
{
int product = 0;
while (mlier > 0)
{
product = product + mcand;
mlier = mlier 1;
}
return product;
}
Th tc lng nhau 69
Vn t ra khi chuyn thnh m hp ng ca on lnh sau:
int sumSquare (int x, int y)
{
return mult (x, x) + y;
}
Th tc sumSquare s gi th tc mult trong thn hm ca n
Vn :
a ch quay v ca th tc sumSquare lu trong thanh ghi $ra s b ghi
bi a ch quay v ca th tc mult khi th tc ny c gi!
Nh vy cn phi lu li (backup) trong b nh chnh a ch quay v ca
th tc sumSquare (trong thanh ghi $ra) trc khi gi th tc mult
S dng ngn xp (Stack)
Ngn xp (Stack) 70
L ngn xp gm nhiu nh kt hp (vng nh) nm trong b nh chnh
Cu trc d liu l tng cha tm cc gi tr trong thanh ghi
Thng cha a ch tr v, cc bin cc b ca trnh con, nht l cc bin c cu trc (array,
list) khng cha va trong cc thanh ghi trong CPU
c nh v v qun l bi stack pointer
C 2 tc v hot ng c bn:
push: a d liu t thanh ghi vo stack
pop: Ly d liu t stack chp vo thanh ghi
Trong MIPS dnh sn 1 thanh ghi $sp lu tr stack pointer
s dng Stack, cn khai bo kch vng Stack bng cch tng (push) gi tr con
tr ngn xp stack pointer (lu tr trong thanh ghi $sp)
Lu : Stack pointer tng theo chiu gim a ch
71
int sumSquare (int x, int y) { return mult (x, x) + y; }
/* x: $a0, y: $a1 */
sumSquare:
addi $sp, $sp, -8 # khai bo kch thc stack cn dng = 8 byte
sw $ra, 4 ($sp) # ct a ch quay v ca th tc sumSquare a vo stack
sw $a1, 0 ($sp) # ct gi tr y vo stack
add $a1, $a0, $zero # gn tham s th 2 l x (ban u l y) phc v cho th tc mult sp gi
jal mult # nhy n th tc mult
lw $a1, 0 ($sp) # sau khi thc thi xong th tc mult , khi phc li tham s th 2 = y
# da trn gi tr lu trc trong stack
add $v0, $v0, $a1 # mult() + y
lw $ra, 4 ($sp) # khi phc a ch quay v ca th tc sumSquare t stack, a li vo $ra
addi $sp, $sp, 8 # khi phc 8 byte gi tr $sp ban u mn, kt thc stack
jr $ra # nhy n on lnh ngay sau khi gi th tc sumSquare trong chng
# trnh chnh, thao tc tip cc lnh khc.
mult:
# lnh x l cho th tc mult
jr $ra # nhy li on lnh ngay sau khi gi th tc mult trong th tc sumSquare
C
M
I
P
S
init
free
push
push
pop
pop
Tng qut: Thao tc vi stack 72
Khi to stack (init)
Lu tr tm cc d liu cn thit vo stack (push)
Gn cc i s (nu c)
Gi lnh jal nhy n cc th tc con
Khi phc cc d liu lu tm t stack (pop)
Khi phc b nh, kt thc stack (free)
C th ha 73
u th tc:
Procedure_Label:
addi $sp, $sp, framesize # khi to stack, dch chuyn stack pointer $sp li
sw $ra, framesize 4 ($sp) # ct $ra (kch thc 4 byte) vo stack (push)
Lu tm cc thanh ghi khc (nu cn)
Thn th tc:
jal other_procedure # Gi cc th tc khc (nu cn)
Cui th tc:
lw $ra, frame_size 4 ($sp) # khi phc $ra t stack (pop)
lw # khi phc cc thanh ghi khc (nu cn)
addi $sp, $sp, framesize # khi phc $sp, gii phng stack
jr $ra # nhy n lnh tip theo Procedure Label
# trong chng trnh chnh
Mt s nguyn tc khi thc thi th tc 74
Nhy n th tc bng lnh jal v quay v ni trc
gi n bng lnh jr $ra
4 thanh ghi cha i s ca th tc: $a0, $a1, $a2, $a3
Kt qu tr v ca th tc cha trong thanh ghi $v0 (v
$v1 nu cn)
Phi tun theo nguyn tc s dng cc thanh ghi (register
conventions)
Nguyn tc s dng thanh ghi 75
$0: (Khng thay i) Lun bng 0
$s0 - $s7: (Khi phc li nu thay i) Rt quan trng, nu
th tc c gi (callee) thay i cc thanh ghi ny th n phi
khi phc li gi tr cc thanh ghi ny trc khi kt thc
$sp: (Khi phc li nu thay i) Thanh ghi con tr stack phi
c gi tr khng i trc v sau khi gi lnh jal, nu khng
th tc gi (caller) s khng quay v c.
Tip: Tt c cc thanh ghi ny u bt u bng k t s !
Nguyn tc s dng thanh ghi 76
$ra: (C th thay i) Khi gi lnh jal s lm thay
i gi tr thanh ghi ny. Th tc gi (caller) lu li
(backup) gi tr ca thanh ghi $ra vo stack nu cn
$v0 - $v1: (C th thay i) Cha kt qu tr v ca
th tc
$a0 - $a1: (C th thay i) Cha i s ca th tc
$t0 - $t9: (C th thay i) y l cc thanh ghi tm
nn c th b thay i bt c lc no
Tm tt 77
Nu th tc R gi th tc E:
R phi lu vo stack cc thanh ghi tm c th b s dng trong E
trc khi gi lnh jal E (goto E)
E phi lu li gi tr cc thanh ghi lu tr ($s0 - $s7) nu n
mun s dng cc thanh ghi ny trc khi kt thc E s khi
phc li gi tr ca chng
Nh: Th tc gi R (caller) v Th tc c gi E (callee) ch cn
lu cc thanh ghi tm / thanh ghi lu tr m n mun dng,
khng phi tt c cc thanh ghi!
Bng tm tt 78
System call 79
Hello.asm 80
.data # data segment
str: .asciiz Hello asm !
.text # text segment
.globl main
main: # starting point of program
addi $v0, $0, 4 # $v0 = 0 + 4 = 4 print str syscall
la $a0, str # $a0 = address(str)
syscall # excute the system call
81
82
Temporary values
More temporaries
Operands
Global pointer
Stack pointer
Frame pointer
Return address
Saved
Saved Procedure arguments
Saved across
procedure calls
Procedure results
Reserved for assembler use
Reserved for OS (kernel)
$0 $1 $2 $3 $4 $5 $6 $7 $8 $9 $10 $11 $12 $13 $14 $15 $16 $17 $18 $19 $20 $21 $22 $23 $24 $25 $26 $27 $28 $29 $30 $31
0
$zero
$t0
$t2
$t4
$t6
$t1
$t3
$t5
$t7
$s0
$s2
$s4
$s6
$s1
$s3
$s5
$s7
$t8
$t9
$gp
$sp
$fp
$ra
$at
$k0
$k1
$v0
$a0
$a2
$v1
$a1
$a3
Ph lc 1: 40 lnh c bn MIPS 83
Instruction Usage
Move from Hi mfhi rd
Move from Lo mflo rd
Add unsigned addu rd,rs,rt
Subtract unsigned subu rd,rs,rt
Multiply mult rs,rt
Multiply unsigned multu rs,rt
Divide div rs,rt
Divide unsigned divu rs,rt
Add immediate unsigned addiu rs,rt,imm
Shift left logical sll rd,rt,sh
Shift right logical srl rd,rt,sh
Shift right arithmetic sra rd,rt,sh
Shift left logical variable sllv rd,rt,rs
Shift right logical variable srlv rd,rt,rs
Shift right arith variable srav rd,rt,rs
Load byte lb rt,imm(rs)
Load byte unsigned lbu rt,imm(rs)
Store byte sb rt,imm(rs)
Jump and link jal L
System call syscall
Instruction Usage
Load upper immediate lui rt,imm
Add add rd,rs,rt
Subtract sub rd,rs,rt
Set less than slt rd,rs,rt
Add immediate addi rt,rs,imm
Set less than immediate slti rd,rs,imm
AND and rd,rs,rt
OR or rd,rs,rt
XOR xor rd,rs,rt
NOR nor rd,rs,rt
AND immediate andi rt,rs,imm
OR immediate ori rt,rs,imm
XOR immediate xori rt,rs,imm
Load word lw rt,imm(rs)
Store word sw rt,imm(rs)
Jump j L
Jump register jr rs
Branch less than 0 bltz rs,L
Branch equal beq rs,rt,L
Branch not equal bne rs,rt,L
Ph lc 2: Pseudo Instructions 84
Lnh gi: Mc nh khng c h tr bi MIPS
L nhng lnh cn phi bin dch thnh rt nhiu cu
lnh tht trc khi c thc hin bi phn cng
Lnh gi = Th tc
Dng h tr lp trnh vin thao tc nhanh chng
vi nhng thao tc phc tp gm nhiu bc
V d: Tnh $s1 = |$s0| 85
tnh c tr tuyt i ca $s0 $s1, ta c lnh gi l: abs $s1, $s0
Thc s MIPS khng c lnh ny, khi chy s bin dch lnh ny thnh cc lnh tht
sau:
# Tr tuyt i ca X l X nu X < 0, l X nu X >= 0
abs:
sub $s1, $zero, $s0
slt $t0, $s0, $zero
bne $t0, $zero, done
add $s1, $s0, $zero
done:
jr $ra
Mt s lnh gi ph bin ca MIPS 86
Name instruction syntax meaning
Move move rd, rs rd = rs
Load Address la rd, rs rd = address (rs)
Load Immediate li rd, imm rd = 32 bit Immediate value
Branch greater than bgt rs, rt, Label if(R[rs]>R[rt]) PC=Label
Branch less than blt rs, rt, Label if(R[rs]=R[rt]) PC=Label
branch less than or equal ble rs, rt, Label if(R[rs]
Ph lc 3: Biu din lnh trong ngn ng my
87
Chng ta hc 1 s nhm lnh hp ng thao tc trn CPU tuy nhin
CPU c hiu cc lnh hp ng hc ny khng?
Tt nhin l khng v n ch hiu c ngn ng my gm ton bit 0 v 1
Dy bit gi l lnh my (machine language instruction)
Mi lnh my c kch thc 32 bit, c chia thnh cc nhm bit, gi l
trng (fiedld), mi nhm c 1 vai tr trong lnh my
Lnh my c 1 cu trc xc nh gi l cu trc lnh (Instruction Format)
MIPS Instruction Format 88
C 3 format lnh trong MIPS:
R-format: Dng trong cc lnh tnh ton s hc (add, sub, and, or, nor, sll, srl, sra)
I-format: Dng trong cc lnh thao tc vi hng s, chuyn d liu vi b nh, r nhnh
J-format: Dng trong cc lnh nhy (jump C: goto)
R-format 89
6 bits 5 5 5 5 6
opcode rs rt rd shmat funct
opcode (operation code): m thao tc, cho bit lnh lm g
funct (function code): kt hp vi opcode xc nh lnh lm g (trng
hp cc lnh c cng m thao tc vi opcode)
rs (source register): thanh ghi ngun, thng cha ton hng ngun th 1
rt (target register): thanh ghi ngun, thng cha ton hng ngun th 2
rd (destination register): thanh ghi ch, thng cha kt qu lnh
shamt: cha s bit cn dch trong cc lnh dch, nu khng phi lnh dch
th trng ny c gi tr 0
Nhn xt 90
Cc trng lu a ch thanh ghi rs, rt, rd c kch thc 5 bit
C kh nng biu din cc s t 0 n 31
biu din 32 thanh ghi ca MIPS
Trng lu s bit cn dch shamt c kch thc 5 bit
C kh nng biu din cc s t 0 n 31
dch ht 32 bit lu tr ca 1 thanh ghi
V d R-format (1) 91
Biu din machine code ca lnh: add $t0, $t1, $t2
Biu din lnh vi R-format theo tng trng:
opcode = 0
funct = 32
rs = 9 (ton hng ngun th 1 l $t1 ~ $9)
rt = 10 (ton hng ngun th 2 l $t2 ~ $10)
rd = 8 (ton hng ch l $t0 ~ $8)
shmat = 0 (khng phi lnh dch)
opcode rs rt rd shmat funct
0 9 10 8 0 32
000000 01001 01010 01000 00000 100000
Xc nh thao tc cng
(tt c cc lnh theo cu trc R-format u c opcode = 0)
V d R-format (2) 92
Biu din machine code ca lnh: sll $t2, $s0, 4
Biu din lnh vi R-format theo tng trng:
opcode = 0
funct = 0
rs = 0 (khng dng trong php dch)
rt = 16 (ton hng ngun l $s0 ~ $16)
rd = 10 (ton hng ch l $t2 ~ $10)
shmat = 4 (s bit dch = 4)
opcode rs rt rd shmat funct
0 0 16 10 4 0
000000 00000 10000 01010 00100 000000
Xc nh thao tc dch tri lun l
(tt c cc lnh theo cu trc R-format u c opcode = 0)
Vn ca R-format 93
Lm sao gii quyt trng hp nu cu lnh i hi trng dnh cho ton hng phi
ln hn 5 bit?
V d:
Lnh addi cng gi tr thanh ghi vi 1 hng s, nu gii hn trng hng s 5 bit hng
s khng th ln hn 25 = 32
Gii hn kh nng tnh ton s hc!
Lnh lw, sw cn biu din 2 thanh ghi v 1 hng s offset, nu gii hn 5 bit
Gii hn kh nng truy xut d liu trong b nh
Lnh beq, bne cn biu din 2 thanh ghi v 1 hng s cha a ch (nhn) cn nhy, nu gii
hn 5 bit
Gii hn lu tr chng trnh trong b nh
Gii php: Dng I-format cho cc lnh thao tc hng s, truy xut d liu b nh v
r nhnh
I-format 94
6 bits 5 5 16
opcode rs rt immediate
opcode (operation code): m thao tc, cho bit lnh lm g (tng t opcode ca R-
format, ch khc khng cn thm trng funct)
y cng l l do ti sao R-format c 2 trng 6 bit xc nh lnh lm g thay
v 1 trng 12 bit nht qun vi cc cu trc lnh khc (I-format) trong khi
kch thc mi trng vn hp l
rs (source register): thanh ghi ngun, thng cha ton hng ngun th 1
rt (target register): thanh ghi ch, thng cha kt qu lnh
immediate: 16 bit, c th biu din s nguyn t -215 n (215 1)
I-format c th lu hng s 16 bit (thay v 5 bit nh R-format)
V d I-format 95
Biu din machine code ca lnh: addi $s0, $s1, 10
Biu din lnh vi R-format theo tng trng:
opcode = 8: Xc nh thao tc cng hng s
rs = 17 (ton hng ngun th 1 l $s1 ~ $17)
rt = 16 (ton hng ch l $s0 ~ $16)
immediate = 10 (ton hng ngun th 2 = hng s = 10)
opcode rs rt immediate
8 17 16 10
001000 10001 10000 0000 0000 0000 0000 1010
Vn I-format 96
Trng hng s (immediate) c kch thc 16 bit
Nu mun thao tc vi cc hng s 32 bit?
Tng kch thc trng immediate thnh 32 bit?
Tng kch thc cc lnh thao tc vi hng s c
cu trc I-format
Ph v cu trc lnh 32 bit ca MIPS
Vn I-format (tt) 97
Gii php: MIPS cung cp lnh mi lui
lui register, immediate
Load Upper Immediate
a hng s 16 bit vo 2 byte cao ca 1 thanh
ghi
Gi tr 2 byte thp ca thanh ghi gn = 0
Lnh ny c cu trc I-format
V d 98
Mun cng gi tr 32 bit 0xABABCDCD vo thanh
ghi $t0 ?
Khng th dng:
addi $t0, $t0, 0xABABCDCD
Gii php dng lnh lui:
lui $at, 0xABAB
ori $at, $at, 0xCDCD
add $t0, $0, $at
Vn r nhnh c iu kin trong I-format
99
Cc lnh r nhnh c iu kin c cu trc I-format
opcode: xc nh lnh beq hay bne
rs, rt: cha cc gi tr ca thanh ghi cn so snh
immediate cha a ch (nhn) cn nhy ti?
immediate ch c 16 bit ch c th nhy ti a ch t 0 216 (65535)
?
Chng trnh b gii hn khng gian rt nhiu
Cu tr li: immediate KHNG phi cha a ch cn nhy ti
6 bits 5 5 16
opcode rs rt immediate
Vn r nhnh c iu kin trong I-format (tt)
100
Trong MIPS, thanh ghi PC (Program Counter) s cha
a ch ca lnh ang c thc hin
immediate: s c du, cha khong cch so vi a
ch lnh ang thc hin nm trong thanh ghi PC
immediate + PC a ch cn nhy ti
Cch xc nh a ch ny gi l PC-Relative
Addressing (nh v theo thanh ghi PC)
Xem slide Addressing Mode (phn sau) bit thm v
cc Addressing mode trong MIPS
Vn r nhnh c iu kin trong I-format (tt)
101
Mi lnh trong MIPS c kch thc 32 bit (1 word 1
t nh)
MIPS truy xut b nh theo nguyn tc Alignment
Restriction
n v ca immediate, khong cch so vi PC, l t
nh (word = 4 byte) ch khng phi l byte
Cc lnh r nhnh c th nhy ti cc a ch c
khong cch 215 word tnh t a ch lu trong PC (
217 byte)
Vn r nhnh c iu kin trong I-format (tt)
102
Cch tnh a ch r nhnh:
Nu khng r nhnh:
PC = PC + 4 = a ch lnh k tip trong b nh
Nu thc hin r nhnh:
PC = (PC + 4) + (immediate * 4)
V sao cng immediate vi (PC + 4) thay v PC? Khi r
nhnh b delayed 1 lnh k vi lnh r nhnh
Nhn xt: immediate cho bit s lnh cn nhy qua n
c nhn
V d I-format 103
Loop: beq $t1, $0, End
add $t0, $t0, $t2
addi $t1, $t1, -1
j Loop
End:
opcode = 4: Xc nh thao tc ca lnh beq
rs = 9 (ton hng ngun th 1 l $t1 ~ $9)
rt = 0 (ton hng ngun th 2 l $0 ~ $0)
immediate = 3 (nhy qua 3 lnh k t lnh r nhnh c iu kin)
opcode rs rt immediate
4 9 0 3
000100 01001 00000 0000 0000 0000 0000 0011
Vn I-format 104
Mi lnh trong MIPS c kch thc 32 bit
Mong mun: C th nhy n bt k lnh no (MIPS h tr cc hm
nhy khng iu kin nh j)
Nhy trong khong 232 (4 GB) b nh
I-format b hn ch gii hn vng nhy
Dng J-format
Tuy nhin, d format no cng phi cn ti thiu 6 bit cho opcode
nht qun lnh vi cc format khc
J-format ch c th dng 32 6 = 26 bit biu din khong cch
nhy
J-format 105
6 bits 26
opcode target address
opcode (operation code): m thao tc, cho bit lnh lm g
(tng t opcode ca R-format v I-format)
nht qun vi cc cu trc lnh khc (R-format v I-
format)
target address: Lu a ch ch ca lnh nhy
Tng t lnh r nhnh, a ch ch ca lnh nhy tnh
theo n v word
Nhn xt 106
Trong J-format, cc lnh nhy c th nhy ti
cc lnh c a ch trong khong 226
Mun nhy ti cc lnh c a ch ln hn t
227 n 232 ?
MIPS h tr lnh jr (c trong phn th tc)
Tuy nhin nhu cu ny khng cn thit lm v
chng trnh thng khng qu ln nh vy
Bng tm tt Format 107
5 bits 5 bits
31 25 20 15 0
Opcode Source register 1
Source register 2
op rs rt
R 6 bits 5 bits
rd
5 bits
sh
6 bits
10 5 fn
Destination register
Shift amount
Opcode extension
Immediate operand or address offset
31 25 20 15 0
Opcode Destination or data
Source or base
op rs rt operand / offset
I 5 bits 6 bits 16 bits 5 bits
0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0
31 0
Opcode
op jump target address
J
Memory word address (byte address divided by 4)
26 bits
25
6 bits
Ph lc 4: Addressing mode 108
L phng thc nh vi tr (a ch ha) cc ton hng trong kin trc MIPS
C 5 phng php chnh:
Immediate addressing (Vd: addi $t0, $t0, 5)
Ton hng = hng s 16 bit trong cu lnh
Register addressing (Vd: add $t0, $t0, $t1)
Ton hng = ni dung thanh ghi
Base addressing (Vd: lw $t1, 8($t0) )
Ton hng = ni dung nh (a ch nh = ni dung thanh ghi + hng s 16 bit trong cu
lnh)
PC-relative addressing (Vd: beq $t0, $t1, Label)
Ton hng = a ch ch lnh nhy = ni dung thanh ghi PC + hng s 16 bit trong cu lnh
Pseudodirect addressing (Vd: j 2500)
Ton hng = a ch ch lnh nhy = cc bit cao thanh ghi PC + hng s 26 bit trong cu lnh
Addressing mode 109
Homework 110
Sch Petterson & Hennessy: c ht chng 2
Ti liu tham kho: c 08_HP_AppA.pdf