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    5Positive Output Cascade Boost Converters

    Super-lift technique increases the voltage transfer gain in geometric progres-sion. However, these circuits are a bit complex. This chapter introduces anovel approach the positive output cascade boost converter that imple-ments the output voltage increasing in geometric progression, but withsimpler structure. They also effectively enhance the voltage transfer gain inpower-law.

    5.1 Introduction

    In order to sort these converters differently from existing voltage-lift (VL)

    and super-lift (SL) converters, these converters are entitled positive outputcascade boost converters. There are several subseries:

    Main series Each circuit of the main series has one switch S, ninductors, n capacitors, and (2n 1) diodes.

    Additional series Each circuit of the additional series has oneswitch S, n inductors, (n + 2) capacitors, and (2n + 1) diodes.

    Double series Each circuit of the double series has one switch S,

    n inductors, 3n capacitors, and (3n 1) diodes. Triple series Each circuit of the triple series has one switch S, n

    inductors, 5n capacitors, and (5n 1) diodes.

    Multiple series Each multiple series circuit has one switch S anda higher number of capacitors and diodes.

    In order to concentrate the super-lift function, these converters work inthe steady state with the condition of continuous conduction mode (CCM).

    The conduction duty ratio is k, switching frequency isf, switching period

    is T= 1/f, the load is resistive load R. The input voltage and current are Vinand Iin, output voltage and current are VO and IO. Assume no power lossesduring the conversion process, VinIin = VOIO. The voltage transfer gainis G:

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    5.2 Main Series

    The first three stages of positive output cascade boost converters mainseries are shown in Figure 5.1 to Figure 5.3. For convenience they arecalled elementary boost converter, two-stage circuit, and three-stage circuitrespectively, and numbered as n = 1, 2, and 3.

    5.2.1 Elementary Boost Circuit

    The elementary boost converter is the fundamental boost converter intro-duced in Chapter 1 (seeFigure 1.24). Its circuit diagram and its equivalentcircuits during switch-on and switch-off are shown in Figure 5.1. The voltageacross capacitor C1 is charged to VO. The current iL1flowing through inductorL1 increases with voltage Vin during switch-on period kTand decreases withvoltage (VOVin) during switch-off period (1 k)T. Therefore, the ripple of

    the inductor current iL1 is

    (5.1)

    (5.2)

    The voltage transfer gain is

    (5.3)

    The inductor average current is

    (5.4)

    The variation ratio of current iL1 through inductor L1 is

    (5.5)

    GV

    VO

    in

    =

    iV

    LkT

    V V

    Lk TL

    in O in1

    1 1

    1= =

    ( )

    Vk

    VO in= 1

    1

    GV

    V kO

    in

    = =1

    1

    I kV

    RLO

    1 1= ( )

    11

    1 1 1

    2

    1 2 2= =

    =

    iI

    kTV

    k L V R

    k R

    fLL

    L

    in

    O

    /

    ( ) /

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    Usually 1 is small (much lower than unity), which means this converterworks in the continuous mode. The ripple voltage of output voltage vO is

    Therefore, the variation ratio of output voltage vO is

    (5.6)

    Usually R is in k,fin 10 kHz, and C1 in F, the ripple is smaller than 1%.

    5.2.2 Two-Stage Boost Circuit

    The two-stage boost circuit is derived from elementary boost converter byadding the parts (L2-D2-D3-C2). Its circuit diagram and equivalent circuits

    FIGURE 5.1Elementary boost converter.

    VIN

    +

    iIN

    S

    L1

    R

    D1

    C1 VO

    +

    iO

    (a) Circuit diagram

    +

    VC1

    VIN

    +

    iIN L

    1

    RC1 VO

    +

    iO

    (b) Switching-on

    VC1

    +

    VIN

    +

    iIN L

    1

    RC1 VO

    +

    iO

    (c) Switching-off

    VC1

    +

    VL1

    v

    Q

    C

    I k T

    C

    k

    fC

    V

    ROO O

    = =

    =

    1 1 1

    1 1( )

    = =v

    V

    k

    RfCO

    O

    / 2 1

    2 1

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    during switch-on and switch-off are shown in Figure 5.2. The voltage acrosscapacitor C1 is charged to V1. As described in previous section the voltageV1 across capacitor C1 is

    The voltage across capacitor C2 is charged to VO. The current flowing throughinductor L2 increases with voltage V1 during switching-on period kT anddecreases with voltage (VOV1) during switch-off period (1 k)T. There-fore, the ripple of the inductor current iL2 is

    (5.7)

    (5.8)

    The voltage transfer gain is

    FIGURE 5.2Two-stage boost circuit.

    VIN

    +

    iIN

    L1

    C2

    (b) Equivalent circuit during switching-on

    R VO

    +

    iO

    VC2

    +

    C

    1V

    C1

    +

    L2

    V1

    VIN

    +

    iIN

    (c) Equivalent circuit during switching-off

    R VO

    +

    iO

    L1

    C1

    VC1

    +

    VL1

    L2

    C2

    VC2

    +

    VL2

    iIN

    S

    L1 D1

    (a) Circuit diagram

    RC2 V

    O

    +

    iO

    +

    VC2

    D3

    L2

    +

    VC1C1VIN

    +

    D2

    V1

    Vk

    Vin11

    1=

    iV

    LkT

    V V

    Lk TL

    O2

    1

    2

    1

    2

    1= =

    ( )

    Vk

    Vk

    VO in= =

    1

    1

    1

    112( )

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    The voltage across capacitor C3 is charged to VO. The current flowing throughinductor L3 increases with voltage V2 during switching-on period kT anddecreases with voltage (VOV2) during switch-off (1 k)T. Therefore, theripple of the inductor current iL3 is

    (5.13)

    (5.14)

    The voltage transfer gain is

    (5.15)

    Analogously,

    FIGURE 5.3Three-stage boost circuit.

    VIN

    +

    iIN

    L1

    C3

    (b) Equivalent circuit during switching-on

    C1 R VO

    +

    iO

    +

    V

    C1

    +

    L2

    V1

    VC2

    +

    L3

    V2

    C2 VC3

    VIN

    +

    iIN

    (c) Equivalent circuit during switching-off

    L1

    C1

    VL1

    C3 R VO

    +

    iO

    VC3

    +

    VC1

    +

    L2

    VL2

    VC2

    +

    L3

    VL3

    C2

    V1

    V2

    iIN

    S

    L1 D1

    (a) Circuit diagram

    C3

    D4

    L2

    +

    VC1C1

    VIN

    +

    D2

    L3

    D3

    D5

    R VO

    +

    iO

    +V

    C3

    +

    VC2

    C2

    V2

    V1

    iV

    LkT

    V V

    Lk TL

    O3

    2

    3

    2

    3

    1= =

    ( )

    Vk

    Vk

    Vk

    VO in= =

    =

    1

    1

    1

    1

    1

    122

    13( ) ( )

    GV

    V kO

    in

    = =

    ( )1

    13

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    Therefore, the variation ratio of current iL1 through inductor L1 is

    (5.16)

    The variation ratio of current iL2 through inductor L2 is

    (5.17)

    The variation ratio of current iL3 through inductor L3 is

    (5.18)

    and the variation ratio of output voltage vO is

    (5.19)

    5.2.4 Higher Stage Boost Circuit

    Higher stage boost circuit can be designed by just multiple repeating of theparts (L2-D2-D3-C2). For n

    th stage boost circuit, the final output voltage acrosscapacitor Cn is

    The voltage transfer gain is

    iV

    LkTL

    in1

    1

    = II

    kLO

    1 31=

    ( )

    i VL

    kTL21

    2

    = I IkL

    O2 21

    =( )

    iV

    LkTL3

    2

    3

    = II

    kLO

    3 1=

    11

    1

    3

    1

    6

    1

    2 1

    2

    1

    2= = =

    i

    I

    k k TV

    L I

    k k R

    fLL

    L

    in

    O

    / ( ) ( )

    22

    2

    21

    2

    4

    2

    2 1

    2

    1

    2= =

    =

    iI

    k k TV

    L I

    k k R

    fLL

    L O

    / ( ) ( )

    33

    3

    2

    3

    2

    3

    2 1

    2

    1

    2= =

    =

    i

    I

    k k TV

    L I

    k k R

    fLL

    L O

    / ( ) ( )

    = =

    v

    V

    k

    RfCO

    O

    / 2 1

    2 3

    Vk

    VOn

    in= ( )11

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    (5.20)

    the variation ratio of current iLi through inductor Li (i = 1, 2, 3, n) is

    (5.21)

    and the variation ratio of output voltage vO is

    (5.22)

    5.3 Additional Series

    All circuits of positive output cascade boost converters additional series are derived from the corresponding circuits of the main series by adding a

    DEC.The first three stages of this series are shown inFigure 5.4 toFigure 5.6.

    For convenience they are called elementary additional circuits, two-stageadditional circuits, and three-stage additional circuits respectively, and num-

    bered as n = 1, 2, and 3.

    5.3.1 Elementary Boost Additional (Double) Circuit

    This elementary boost additional circuit is derived from elementary boost

    converter by adding a DEC. Its circuit and switch-on and switch-off equiv-alent circuits are shown in Figure 5.4. The voltage across capacitor C1 andC11 is charged to V1 and voltage across capacitor C12 is charged to VO = 2 V1.The current iL1flowing through inductor L1 increases with voltage Vin duringswitching-on period kTand decreases with voltage (V1Vin) during switch-ing-off (1 k)T. Therefore,

    (5.23)

    GV

    V kO

    in

    n= =

    ( )1

    1

    iLi

    Li

    n i

    i

    i

    I

    k k R

    fL= =

    + / ( ) ( )2 12

    2 1

    = =v

    V

    k

    RfC

    O

    O n

    / 2 1

    2

    iV

    L

    kTV V

    L

    k TLin in

    1

    1

    1

    1

    1= =

    ( )

    Vk

    Vin11

    1=

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    The output voltage is

    (5.24)

    The voltage transfer gain is

    (5.25)

    and

    (5.26)

    The variation ratio of current iL1 through inductor L1 is

    FIGURE 5.4Elementary boost additional (double) circuit.

    VIN

    +

    iIN L

    1

    C1

    (b) Equivalent circuit during switching-on

    R VO

    +

    iO

    VC12

    +

    C12

    VC11

    C11

    VC1

    + +

    V1

    VIN

    +

    iIN L

    1

    C1

    (c) Equivalent circuit during switching-off

    VC1

    +

    VL1

    R VO

    +

    iO

    VC12

    C12

    +

    C11

    VC11

    +

    (a) Circuit diagram

    VIN

    +

    iIN

    S

    L1

    R

    D1

    C1

    +

    V

    C1

    VO

    +

    iO

    C11

    VC11

    +

    D11

    C12

    +

    VC12

    D12

    V Vk

    VO in= = 2

    2

    11

    GV

    V kO

    in

    = =2

    1

    i Ik

    Iin L O= = 12

    1

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    (5.27)

    The ripple voltage of output voltage vO is

    Therefore, the variation ratio of output voltage vO is

    (5.28)

    5.3.2 Two-Stage Boost Additional Circuit

    The two-stage additional boost circuit is derived from the two-stage boostcircuit by adding a DEC. Its circuit diagram and switch-on and switch-offequivalent circuits are shown in Figure 5.5. The voltage across capacitor C1is charged to V1. As described in the previous section the voltage V1 acrosscapacitor C

    1

    is

    The voltage across capacitor C2 and capacitor C11 is charged to V2 andvoltage across capacitor C12 is charged to VO. The current flowing throughinductor L2 increases with voltage V1 during switch-on period kT anddecreases with voltage (V2V1) during switch-off period (1 k)T. Therefore,

    the ripple of the inductor current iL2 is

    (5.29)

    (5.30)

    The output voltage is

    (5.31)

    11

    1 1

    2

    1

    2 1

    4

    1

    8= =

    =

    iI

    k k TV

    L I

    k k R

    fLL

    L

    in

    O

    / ( ) ( )

    vQ

    C

    I k T

    C

    k

    fC

    V

    ROO O= =

    =

    12 12 12

    1 1( )

    = =v

    V

    k

    RfC

    O

    O

    / 2 1

    2 12

    Vk

    Vin11

    1=

    iV

    LkT

    V V

    Lk TL2

    1

    2

    2 1

    2

    1= =

    ( )

    Vk

    Vk

    Vin2 121

    1

    1

    1=

    =

    ( )

    V Vk

    Vk

    VO in= = =

    2

    2

    12

    1

    12 12( )

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    The voltage transfer gain is

    (5.32)

    Analogously,

    Therefore, the variation ratio of current iL1 through inductor L1 is

    FIGURE 5.5Two-stage boost additional circuit.

    +

    VIN

    +

    iIN

    (c) Equivalent circuit during switching-off

    C11L

    1

    C1 VC1

    +

    VL1

    R VO

    +

    iO

    VC12

    C12

    +

    VC11

    +V

    L2

    L2

    V

    2

    +C

    2

    V2

    V1

    VIN

    +

    iIN

    L1

    C2

    (b) Equivalent circuit during switching-on

    iO

    R VO

    +V

    C12

    +

    C12

    VC11

    C11

    V2

    + +

    V2

    C1

    VC1

    +

    L2

    V1

    VIN

    (a) Circuit diagram

    iIN

    S

    L1

    R

    D3

    C1

    +

    V

    C1

    VO

    +

    iO

    C11

    VC11

    +

    D11

    C12

    +

    VC12

    D12

    D1

    D2

    C2

    VC2

    +

    L2

    G

    V

    V k

    O

    in

    = =2

    1

    1

    2

    ( )

    iV

    LkTL

    in1

    1

    = Ik

    IL O1 22

    1=

    ( )

    iV

    L kTL21

    2= II

    kLO

    2

    2

    1=

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    (5.33)

    and the variation ratio of current iL2 through inductor L2 is

    (5.34)

    The ripple voltage of output voltage vO is

    Therefore, the variation ratio of output voltage vO is

    (5.35)

    5.3.3 Three-Stage Boost Additional CircuitThis circuit is derived from the three-stage boost circuit by adding a DEC.Its circuit diagram and equivalent circuits during switch-on and switch-offare shown in Figure 5.6. The voltage across capacitor C1 is charged to V1. Asdescribed previously the voltage V1 across capacitor C1 is ,and voltage V2 across capacitor C2 is .

    The voltage across capacitor C3 and capacitor C11 is charged to V3. Thevoltage across capacitor C12 is charged to VO. The current flowing throughinductor L3 increases with voltage V2 during switch-on period kT and

    decreases with voltage (V3V2) during switch-off (1 k)T. Therefore,

    (5.36)

    and

    (5.37)

    The output voltage is

    (5.38)

    11

    1

    2

    1

    4

    1

    2 1

    4

    1

    8= =

    =

    iI

    k k TV

    L I

    k k R

    fLL

    L

    in

    O

    / ( ) ( )

    22

    2

    1

    2

    2

    2

    2 1

    4

    1

    8= =

    =

    iI

    k k TV

    L I

    k k R

    fLL

    L O

    / ( ) ( )

    vQ

    C

    I k T

    C

    k

    fC

    V

    RO

    O O= =

    =

    12 12 12

    1 1( )

    = =v

    V

    k

    RfCO

    O

    / 2 1

    2 12

    V k Vin1 1 1= ( )V k Vin2

    21 1= ( )

    iV

    LkT

    V V

    Lk TL3

    2

    3

    3 2

    3

    1= =

    ( )

    Vk

    Vk

    Vk

    Vin3 22

    131

    1

    1

    1

    1

    1=

    =

    =

    ( ) ( )

    V Vk

    VO in= = 2 2

    1

    133( )

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    The voltage transfer gain is

    (5.39)

    Analogously:

    FIGURE 5.6Three-stage boost additional circuit.

    C1 VC1

    D1

    +

    _

    R

    Vin

    +

    _

    V

    +

    _

    I in L1IO

    D2

    O

    L2

    C3VC3

    +

    _

    SC2 VC2

    D3

    +

    _

    D4

    D5L3

    V1

    V2 D11 D12

    C12 +

    _VC12

    C11+

    _VC11

    V3

    C12

    VC12+

    _ RVin

    +

    _

    +

    _

    I in

    L1 VO

    IO

    L2

    C1 VC1

    +

    _

    V1

    L3C2

    V2

    +

    _

    V2

    C2

    V3

    +

    _

    V3

    _

    +

    C2 V2

    +

    _ R

    Vin

    +

    _

    +

    _

    I in L2

    VO

    IO

    V L1

    V1

    +

    _

    L1

    V L2

    C3

    +

    _

    L3

    V L3

    V3

    V1 V2

    +

    _

    VC12

    +_

    V3

    V3C11

    C12

    (a) Circuit diagram

    (b) Equivalent circuit during switch-on

    (b) Equivalent circuit during switch-off

    V3

    C11

    G VV k

    O

    in

    = =

    2 11

    3( )

    iV

    LkTL

    in1

    1

    = Ik

    IL O1 32

    1=

    ( )

    i VL kTL21

    2= I k IL O2 221= ( )

    iV

    LkTL3

    2

    3

    = II

    kLO

    3

    2

    1=

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    Therefore, the variation ratio of current iL1 through inductor L1 is

    (5.40)

    and the variation ratio of current iL2 through inductor L2 is

    (5.41)

    and the variation ratio of current iL3 through inductor L3 is

    (5.42)

    The ripple voltage of output voltage vO is

    Therefore, the variation ratio of output voltage vO is

    (5.43)

    5.3.4 Higher Stage Boost Additional Circuit

    Higher stage boost additional circuits can be designed by repeating the parts

    (L2-D2-D3-C2) multiple times. For nth stage additional circuit, the final outputvoltage is

    The voltage transfer gain is

    (5.44)

    Analogously, the variation ratio of current iLi through inductor Li (i = 1, 2, 3,n) is

    11

    1

    3

    1

    6

    1

    2 1

    4

    1

    8= =

    =

    iI

    k k TV

    L I

    k k R

    fLL

    L

    in

    O

    / ( ) ( )

    22

    2

    21

    2

    4

    2

    2 1

    4

    1

    8= =

    =

    iI

    k k TV

    L I

    k k R

    fLL

    L O

    / ( ) ( )

    33

    3

    2

    3

    2

    3

    2 14

    18

    = = = iI

    k k TV L I

    k k RfL

    L

    L O

    / ( ) ( )

    vQ

    C

    I k T

    C

    k

    fC

    V

    ROO O= =

    =

    12 12 12

    1 1( )

    = =v

    V

    k

    RfCO

    O

    / 2 1

    2 12

    Vk

    VOn

    in= 2

    1

    1( )

    GV

    V k

    O

    in

    n= =

    21

    1

    ( )

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    (5.45)

    and the variation ratio of output voltage vO is

    (5.46)

    5.4 Double SeriesAll circuits of the positive output cascade boost converter double series are derived from the corresponding circuits of the main series by adding aDEC in each stage circuit. The first three stages of this series are shown inFigures 5.4,5.7, and5.8. For convenience to explain, they are called elemen-tary double circuits, two-stage double circuits, and three-stage double cir-cuits respectively, and numbered as n = 1, 2, and 3.

    5.4.1 Elementary Double Boost Circuit

    From the construction principle, the elementary double boost circuit isderived from the elementary boost converter by adding a DEC. Its circuitand switch-on and switch-off equivalent circuits are shown in Figure 5.4,which is the same as the elementary boost additional circuit.

    5.4.2 Two-Stage Double Boost Circuit

    The two-stage double boost circuit is derived from the two-stage boost circuitby adding a DEC in each stage circuit. Its circuit diagram and switch-on andswitch-off equivalent circuits are shown in Figure 5.7. The voltage acrosscapacitor C1 and capacitor C11 is charged to V1. As described in the previoussection, the voltage V1 across capacitor C1 and capacitor C11 is .The voltage across capacitor C12 is charged to 2V1.

    The current flowing through inductor L2 increases with voltage 2V1 duringswitch-on period kTand decreases with voltage (V2 2V1) during switch-off period (1 k)T. Therefore, the ripple of the inductor current iL2 is

    (5.47)

    iLi

    Li

    n i

    i

    i

    I

    k k R

    fL= =

    + / ( ) ( )2 18

    2 1

    = =v

    V

    k

    RfCO

    O

    / 2 1

    2 12

    V k Vin1 1 1= ( )

    iV

    LkT

    V V

    Lk TL2

    1

    2

    2 1

    2

    2 21= =

    ( )

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    (5.48)

    The output voltage is

    (5.49)

    The voltage transfer gain is

    (5.50)

    FIGURE 5.7Two-stage boost double circuit.

    (a) Circuit diagram

    (b) Equivalent circuit during switch-on

    (c) Equivalent circuit during switch-off

    C1 VC1

    D1

    +

    _

    R+

    _

    V

    +

    _

    I inIO

    D2

    O

    C2 VC2+

    _

    SVin

    L1 L2V1

    C21

    C22

    +

    +

    _

    VC21

    VC22

    D3 D21 D22

    C11

    C12

    +

    +

    _

    VC11

    VC12

    D11 D12

    __

    VC22+

    _

    R

    +

    _

    +

    _

    VO

    IO

    L2C12

    2V1

    +

    _

    2V1

    L1

    Vin

    Iin

    C22

    C21

    V2+

    _

    V2

    V2

    +

    _

    C2

    C11

    V1+

    _

    V1

    +

    _

    C1

    V1

    Vin

    V2+

    _

    R+

    _

    +

    _

    I in

    VO

    IO

    +

    _C1 VC1 C2

    L1 L2

    VL1 VL2

    V1

    VC12+

    _C22

    C21

    V2+_

    V2

    VC12+

    _C12

    C11

    V1+_

    2V1

    V k V k Vin2 122

    1 21

    1= = ( )

    V Vk

    VO in= = 2

    2

    122( )

    GV

    V kO

    in

    = =

    ( )2

    12

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    Analogously,

    Therefore, the variation ratio of current iL1 through inductor L1 is

    (5.51)

    and the variation ratio of current iL2 through inductor L2 is

    (5.52)

    The ripple voltage of output voltage vO is

    Therefore, the variation ratio of output voltage vO is

    (5.53)

    5.4.3 Three-Stage Double Boost Circuit

    This circuit is derived from the three-stage boost circuit by adding a DEC ineach stage circuit. Its circuit diagram and equivalent circuits during switch-on and -off are shown in Figure 5.8. The voltage across capacitor C1 andcapacitor C11 is charged to V1. As described earlier the voltage V1 acrosscapacitor C1 and capacitor C11 is , and voltage V2 across capac-itor C2 and capacitor C12 is .

    The voltage across capacitor C22 is . The voltage acrosscapacitor C3 and capacitor C31 is charged to V3. The voltage across capacitorC12 is charged to VO. The current flowing through inductor L3 increases with

    iV

    L

    kTLin

    1

    1

    = I

    k

    IL O122

    1

    =

    ( )

    iV

    LkTL2

    1

    2

    = II

    kLO

    2

    2

    1=

    11

    1

    2

    1

    4

    1

    2 1

    8

    1

    16

    = =

    =i

    I

    k k TV

    L I

    k k R

    fL

    L

    L

    in

    O

    / ( ) ( )

    22

    2

    1

    2

    2

    2

    2 1

    4

    1

    8= =

    =

    iI

    k k TV

    L I

    k k R

    fLL

    L O

    / ( ) ( )

    vQ

    C

    I k T

    C

    k

    fC

    V

    ROO O= =

    =

    22 22 22

    1 1( )

    = =v

    V

    k

    RfCO

    O

    / 2 1

    2 22

    V k Vin1 1 1= ( )V k Vin2

    22 1 1= ( )

    2 2 12 2V k Vin= ( )

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    FIGURE 5.8Three-stage boost double circuit.

    C1 VC1

    D1

    +

    _

    +

    _

    D2

    C2 VC2+

    _

    Vin

    L1 L2V1

    C21

    C22

    +

    +

    _

    VC21

    VC22

    D3 D21 D22

    C11

    C12

    +

    +

    _

    VC11

    VC12

    D11 D12

    __

    C3S

    D5L3 V3

    D4

    2V1

    2V2

    V2

    +

    _

    L2C12

    2V1

    +

    _

    2V1

    L1Vin

    Iin

    C21

    V2+

    _

    V2

    V2

    +

    _

    C2

    C11

    V1+

    _

    V1

    +

    _

    C1

    V1VC32

    +

    _

    L3C22

    2V2

    +

    _

    2V2

    C32

    C31

    V3+

    _

    V3

    V3

    +

    _

    C3

    Vin V2+

    _

    +

    _

    +

    _C1 VC1 C2

    L1 L2

    VL1 VL2

    V1

    VC22+

    _C22

    C21

    V2+_

    V2

    VC12+

    _C12

    C11

    V1+_

    2V1

    V3+

    _C3

    L3

    VL3

    VC32

    C31

    V3+_

    V32V2

    (a) Circuit diagram

    (b) Equivalent circuit during switch-on

    (c) Equivalent circuit during switch-off

    Iin

    Iin

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    voltage V2 during switch-on period kTand decreases with voltage (V3 2V2)during switch-off (1 k)T. Therefore,

    (5.54)

    and

    (5.55)

    The output voltage is

    (5.56)

    The voltage transfer gain is

    (5.57)

    Analogously,

    Therefore, the variation ratio of current iL1 through inductor L1 is

    (5.58)

    and the variation ratio of current iL2 through inductor L2 is

    (5.59)

    iV

    L kTV V

    L k TL32

    3

    3 2

    3

    2 21= =

    ( )

    VV

    k kVin3

    23

    2

    1

    4

    1=

    =

    ( ) ( )

    V Vk

    VO in= = 2

    2

    133( )

    GV

    V kO

    in

    = =

    ( )2

    13

    iV

    LkTL

    in1

    1

    = Ik

    IL O1 38

    1=

    ( )

    iV

    LkTL2

    1

    2

    = Ik

    IL O2 24

    1=

    ( )

    iV

    LkTL3

    2

    3

    = II

    kLO

    3

    2

    1=

    11

    1

    3

    1

    6

    1

    2 1

    16

    1

    128= =

    =

    iI

    k k TV

    L I

    k k R

    fLL

    L

    in

    O

    / ( ) ( )

    22

    2

    21

    2

    4

    2

    2 1

    8

    1

    32= =

    =

    iI

    k k TV

    L I

    k k R

    fLL

    L O

    / ( ) ( )

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    and the variation ratio of current iL3 through inductor L3 is

    (5.60)

    The ripple voltage of output voltage vO is

    Therefore, the variation ratio of output voltage vO is

    (5.61)

    5.4.4 Higher Stage Double Boost Circuit

    The higher stage double boost circuits can be derived from the correspondingmain series circuits by adding a DEC in each stage circuit. For nth stageadditional circuit, the final output voltage is

    The voltage transfer gain is

    (5.62)

    Analogously, the variation ratio of current iLi through inductor Li (i = 1, 2, 3,n) is

    (5.63)

    The variation ratio of output voltage vO is

    (5.64)

    33

    3

    2

    3

    2

    3

    2 1

    4

    1

    8

    = =

    =i

    I

    k k TV

    L I

    k k R

    fL

    L

    L O

    / ( ) ( )

    vQ

    C

    I k T

    C

    k

    fC

    V

    ROO O= =

    =

    32 32 32

    1 1( )

    = =v

    V

    k

    RfCO

    O

    / 2 1

    2 32

    Vk

    VOn

    in= ( )

    2

    1

    GV

    V kO

    in

    n= =

    ( )2

    1

    iLi

    Li

    n i

    ni

    i

    I

    k k R

    fL= =

    + / ( ) ( )2 12 2

    2 1

    2

    = =v

    V

    k

    RfCO

    O n

    / 2 1

    2 2

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    5.5 Triple Series

    All circuits of P/O cascade boost converters triple series are derivedfrom the corresponding circuits of the double series by adding the DEC twicein each stage circuit. The first three stages of this series are shown inFigure 5.9 to Figure 5.11. For convenience they are called elementary triple

    boost circuit, two-stage triple boost circuit, and three-stage triple boost circuitrespectively, and numbered as n = 1, 2 and 3.

    5.5.1 Elementary Triple Boost Circuit

    From the construction principle, the elementary triple boost circuit is derivedfrom the elementary double boost circuit by adding another DEC. Its circuit

    FIGURE 5.9Cascade boost re-double circuit.

    (a) Circuit Diagram

    (b) Equivalent circuit during switching-on

    (c) Equivalent circuit during switching-off

    VIN

    iIN

    S

    L1

    D1

    C1

    C11

    D11

    C12

    D12

    C13

    D13

    C14

    D14

    RVO

    +

    iO

    V1

    2V1

    VIN

    +

    iIN

    L1

    C1

    C12

    VC11

    C11

    VC1

    + +

    V1

    C13

    VC12

    + +

    2V1

    R VO

    +

    iO

    VC12

    +

    VC13

    C14

    C13

    +

    VIN

    iIN L

    1

    C1

    VC1

    +

    VL1

    R VO

    +

    iO

    VC12

    C12

    +

    C11

    VC11

    +C

    14

    2V1

    V1

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    and switch-on and -off equivalent circuits are shown in Figure 5.9. Theoutput voltage of first stage boost circuit is V1, V1 = Vin/(1 k).

    The voltage across capacitors C1 and C11 is charged to V1 and voltage acrosscapacitors C12 and C13 is charged to VC13 = 2V1. The current iL1flowing through

    inductor L1 increases with voltage Vin during switch-on period kT anddecreases with voltage (V1Vin) during switch-off (1 k)T. Therefore,

    (5.65)

    The output voltage is

    (5.66)

    The voltage transfer gain is

    (5.67)

    5.5.2 Two-Stage Triple Boost Circuit

    The two-stage triple boost circuit is derived from the two-stage double boostcircuit by adding another DEC in each stage circuit. Its circuit diagram andswitch-on and -off equivalent circuits are shown inFigure 5.10. As describedin the previous section the voltage V1 across capacitors C1 and C11 is

    . The voltage across capacitor C14 is charged to 3V1.The voltage across capacitors C2 and C21 is charged to V2 and voltage across

    capacitors C22 and C23 is charged to VC23 = 2V2. The current flowing throughinductor L2 increases with voltage 3V1 during switch-on period kT, anddecreases with voltage (V2 3V1) during switch-off period (1 k)T. There-fore, the ripple of the inductor current iL2 is

    (5.68)

    (5.69)

    iV

    LkT

    V V

    Lk TL

    in in1

    1

    1

    1

    1= =

    ( )

    Vk

    Vin11

    1=

    V V V V k

    VO C C in= + = = 1 13 13

    3

    1

    GV

    V kO

    in= =

    3

    1

    V k Vin1 1 1= ( )

    iV

    L

    kTV V

    L

    k TL21

    2

    2 1

    2

    3 31= =

    ( )

    Vk

    Vk

    Vin2 123

    13

    1

    1=

    =

    ( )

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    The output voltage is

    (5.70)

    The voltage transfer gain is

    (5.71)

    Analogously,

    FIGURE 5.10Two-stage boost re-double circuit.

    (a) Circuit diagram

    (b) Equivalent circuit during switching-on

    (c) Equivalent circuit during switching-off

    VIN

    +

    iIN

    S

    L1

    D1

    C1

    L2

    R VO

    +

    iO

    C11

    D11

    C12

    D12

    C13

    D13

    C14

    D14

    D2

    C21

    D21

    C22

    D22

    C23

    D23

    C24

    D24

    D3

    C2

    V1

    2V1

    3V1 V2

    2V2

    L1

    C1

    C14

    L2VC14

    +

    +

    VIN

    iIN

    R

    VO

    +

    iO

    VC24

    +

    C24

    C12

    VC11

    C11

    VC1

    + +

    VC13

    C13

    VC12

    + +

    C22

    VC21

    C21

    VC2

    + +

    VC23

    C23

    VC22

    + +

    C2

    2V1

    V1

    3V1

    V2

    2V2

    +

    VIN

    iIN L1

    C1

    VC1

    +

    VL1

    VC12

    C12

    +

    C11

    VC11

    +

    C13

    C14

    VC14

    +

    VC13 +

    L2

    R VO

    +

    iO

    C2

    +

    VC2

    C21

    VC21

    +

    C22

    VC

    22

    +

    C23

    C24

    VC23

    +

    VC24

    +

    V1

    3V1

    2V1

    V2

    2V2

    V V V V k

    VO C C in= + = = 2 23 223

    3

    1( )

    G

    V

    V kO

    in= = ( )3

    12

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    Therefore, the variation ratio of current iL1 through inductor L1 is

    (5.72)

    and the variation ratio of current iL2 through inductor L2 is

    (5.73)

    The ripple voltage of output voltage vO is

    Therefore, the variation ratio of output voltage vO is

    (5.74)

    5.5.3 Three-Stage Triple Boost CircuitThis circuit is derived from the three-stage double boost circuit by addinganother DEC in each stage circuit. Its circuit diagram and equivalent circuitsduring switch-on and -off are shown in Figure 5.11. As described earlier thevoltage V2 across capacitors C2 and C11 is , and voltageacross capacitor C24 is charged to 3V2.

    The voltage across capacitors C3 and C31 is charged to V3 and voltage acrosscapacitors C32 and C33 is charged to VC33 = 2V3. The current flowing throughinductor L3 increases with voltage 3V2 during switch-on period kT and

    decreases with voltage (V3 3V2) during switch-off (1 k)T. Therefore, theripple of the inductor current iL3 is

    (5.75)

    iV

    LkTL

    in1

    1

    = Ik

    IL O122

    1=

    ( )

    i VL

    kTL21

    2

    = I IkL

    O2

    21

    =

    11

    1

    2

    1

    4

    1

    2 1

    8

    1

    16= =

    =

    iI

    k k TV

    L I

    k k R

    fLL

    L

    in

    O

    / ( ) ( )

    22

    2

    1

    2

    2

    2

    2 1

    4

    1

    8= =

    =

    iI

    k k TV

    L I

    k k R

    fLL

    L O

    / ( ) ( )

    v

    Q

    C

    I k T

    C

    k

    fC

    V

    ROO O= =

    =

    22 22 22

    1 1( )

    = =v

    V

    k

    RfCO

    O

    / 2 1

    2 22

    V V k V in2 13 3 1= = ( )

    iV

    LkT

    V V

    Lk TL3

    2

    3

    3 2

    3

    3 31= =

    ( )

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    FIGURE 5.11Three-stage boost re-double circuit.

    VIN

    +

    iIN

    S

    L2

    C21

    D21

    C22

    D22

    C23

    D23

    C24

    D24

    D3

    C2

    L1 D1

    C1

    C11

    D11

    C12

    D12

    C13

    D13

    C14

    D14

    D2

    L3

    D5

    C3

    C31

    D31

    C32

    D32

    C33

    D33

    C

    D4

    V1

    2V1

    3V1

    V2

    2V2

    3V2

    V3

    2V3

    (a) Circuit diagram

    L1

    C1

    +

    VIN

    iIN

    C22

    C21

    C23

    C2 C34C14

    L2

    C12C11 C13 C32C3 C31

    L3

    C24

    C33

    V1 2V1 3V1 V2 2V2 3V2 V3 2V3

    (b) Equivalent circuit during switching-on

    +

    VIN

    iIN L

    1

    C1 VC1

    +

    VL1

    VC12C12

    +

    C11

    VC11

    +

    C13

    C14

    VC14

    +

    VC13 +

    L2

    R VO

    +

    iO

    C2

    +

    VC2

    C21

    VC21

    +

    C22

    VC22

    +

    C23

    C24

    VC23

    +

    VC24

    +

    L3

    C3 VC3

    +

    VC31 +

    C31

    C32

    C33

    VC33

    +

    C34

    VC32

    +

    VC34

    +V

    1

    2V1

    3V1

    V2

    2V2

    3V2

    V3

    2V3

    (c) Equivalent circuit during switching-off

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    and

    (5.76)

    The output voltage is

    (5.77)

    The voltage transfer gain is

    (5.78)

    Analogously,

    Therefore, the variation ratio of current iL1 through inductor L1 is

    (5.79)

    and the variation ratio of current iL2 through inductor L2 is

    (5.80)

    and the variation ratio of current iL3 through inductor L3 is

    (5.81)

    V

    k

    V

    k

    Vin3 233

    1

    91

    1

    =

    =

    ( )

    V V V V k

    VO C C in= + = = 3 33 333

    3

    1( )

    G VV k

    O

    in

    = =

    ( )31

    3

    iV

    LkTL

    in1

    1

    = Ik

    IL O1 332

    1=

    ( )

    i VL

    kTL21

    2

    = Ik

    IL O2 28

    1=

    ( )

    iV

    LkTL3

    2

    3

    = Ik

    IL O32

    1=

    11

    1

    3

    1

    6

    31

    2 1

    64

    1

    12= = =

    i

    I

    k k TV

    L I

    k k R

    fLL

    L

    in

    O

    / ( ) ( )

    22

    2

    21

    2

    4

    22

    2 1

    16

    1

    12= =

    =

    iI

    k k TV

    L I

    k k R

    fLL

    L O

    / ( ) ( )

    33

    3

    2

    3

    2

    3

    2 1

    4

    1

    12= =

    =

    i

    I

    k k TV

    L I

    k k R

    fLL

    L O

    / ( ) ( )

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    (j) times in each stage circuit. The first three stages of this series are shownin Figure 5.12 to Figure 5.14. For convenience they are called elementarymultiple boost circuits, two-stage multiple boost circuits, and three-stagemultiple boost circuits respectively, and numbered as n = 1, 2, and 3.

    5.6.1 Elementary Multiple Boost Circuit

    From the construction principle, the elementary multiple boost circuit isderived from the elementary boost converter by adding DEC multiple (j)times in the circuit. Its circuit and switch-on and -off equivalent circuits areshown in Figure 5.12.

    The voltage across capacitors C1 and C11 is charged to V1 and voltage acrosscapacitors C12 and C13 is charged to VC13 = 2V1. The voltage across capacitorsC1(2j-2) and C1(2j-1) is charged to VC1(2j-1) = jV1. The current iL1flowing throughinductor L1 increases with voltage Vin during switch-on period kT anddecreases with voltage (V1Vin) during switch-off (1 k)T. Therefore,

    FIGURE 5.12Cascade boost multiple-double circuit.

    VIN

    +

    iIN

    S

    L1

    D1

    C1

    C11

    D11

    C12

    D12

    D1(2j1)

    V1

    2V1

    C1(2j1)

    C12j

    D12j

    R VO

    +

    iO

    (1+j)V1

    1 j2...

    VIN

    +

    iIN

    L1

    C1

    C12

    VC11

    C11

    VC1

    + +

    V1

    R VO

    +

    iO

    C12jC13

    VC12

    +

    2V1

    jV1

    C12(j1)

    C1(2j1)

    (j+1)V1

    +

    VIN

    iIN L

    1

    C1

    VC1

    +

    VL1 R V

    O

    +

    iO

    VC12

    C12

    +

    C11

    VC11

    +

    C13

    C14

    C1(2j1)

    C12j

    V1

    2V1

    3V1

    (1+j)V1

    (a) Circuit diagram

    (b) Equivalent circuit during switching-on

    (c) Equivalent circuit during switching-off

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    (5.86)

    (5.87)

    The output voltage is

    (5.88)

    The voltage transfer gain is

    (5.89)

    5.6.2 Two-Stage Multiple Boost Circuit

    The two-stage multiple boost circuit is derived from the two-stage boostcircuit by adding multiple (j) DECs in each stage circuit. Its circuit diagram

    and switch-on and -off equivalent circuits are shown in Figure 5.13. Thevoltage across capacitor C1 and capacitor C11 is charged to .The voltage across capacitor C1(2j) is charged to (1 +j)V1.

    The current flowing through inductor L2 increases with voltage (1 + j)V1during switch-on period kT and decreases with voltage [V2 (1 + j)V1]during switch-off period (1 k)T. Therefore, the ripple of the inductor currentiL2 is

    (5.90)

    (5.91)

    The output voltage is

    (5.92)

    The voltage transfer gain is

    (5.93)

    iV

    LkT

    V V

    Lk TL

    in in1

    1

    1

    1

    1= =

    ( )

    Vk

    Vin11

    1=

    V V V j V j

    kVO C C j in= + = + =

    +1 1 2 1 1

    11

    1( )( )

    GV

    V

    j

    kO

    in

    = =+

    1

    1

    V k Vin1 1 1= ( )

    ij

    LkTV

    V j V

    Lk TL2

    2

    12 1

    2

    1 11=

    +=

    +

    ( )( )

    Vj

    kV j

    kVin2 1

    21

    11

    1

    1=

    +

    = +

    ( )( )

    V V V j V j

    kVO C C j in= + = + =

    +1 1 2 1 2

    211

    1( )( ) ( )

    GV

    V

    j

    kO

    in

    = =+

    ( )1

    12

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    The ripple voltage of output voltage vO is

    Therefore, the variation ratio of output voltage vO is

    (5.94)

    FIGURE 5.13Two-stage boost multiple-double circuit.

    VIN

    +

    iIN

    S

    L1

    D1

    C1

    L2

    R VO

    +

    iO

    C11

    D11

    C12

    D12

    C1(2j

    1)

    D1(2j1)

    C12j

    D12j

    D2

    C21

    D21

    C22

    D22

    C2(2j

    1)

    D2(2j1)

    C24

    D22j

    D3

    C2

    1 2... j j2...1

    V1

    jV1

    (1+)jV1 V2

    jV2 (1+j)V2

    L1

    C1

    +

    VIN

    iIN

    C11

    VC1

    +

    C12j

    L2

    C21C2C12(j1) C1(2j1)

    VO

    iOR +

    VC24

    +

    C22jC22(j1) C2(2j1)

    V1

    jV1

    (1+)jV1

    V2

    jV2 (1+j)V2

    +

    VIN

    iIN

    L1

    C1

    VC1

    +

    VL1

    VC12

    C12

    +

    C11

    VC11

    +

    C1(2j1)

    C1

    L2

    R VO

    +

    iO

    C2

    +

    VC2

    C21

    VC21

    +

    C22

    VC22

    +

    C2(2j1)

    C22j

    VC22j

    +

    V1

    (1+)jV1

    V2

    (1+j)V2

    (a) Circuit diagram

    (b) Equivalent circuit during switching-on

    (c) Equivalent circuit during switching-off

    vQ

    C

    I k T

    C

    k

    fC

    V

    RO j

    O

    j j

    O= =

    =

    22 22 22

    1 1( )

    = =v

    V

    k

    RfCO

    O j

    / 2 1

    2 22

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    5.6.3 Three-Stage Multiple Boost Circuit

    This circuit is derived from the three-stage boost circuit by adding multiple(j) DECs in each stage circuit. Its circuit diagram and equivalent circuits

    during switch-on and -off are shown in Figure 5.14. The voltage across capac-itor C1 and capacitor C11 is charged to . The voltage acrosscapacitor C1(2j) is charged to (1 +j)V1. The voltage V2 across capacitor C2 andcapacitor C2(2j) is charged to (1 +j)V2.

    The current flowing through inductor L3 increases with voltage (1 + j)V2during switch-on period kT and decreases with voltage [V3 (1 + j)V2]during switch-off (1 k)T. Therefore,

    (5.95)

    and

    (5.96)

    The output voltage is

    (5.97)

    The voltage transfer gain is

    (5.98)

    The ripple voltage of output voltage vO is

    Therefore, the variation ratio of output voltage vO is

    (5.99)

    V k Vin1 1 1= ( )

    ij

    LkTV

    V j V

    Lk TL3

    32

    3 2

    3

    1 11=

    +=

    +

    ( )( )

    Vj V

    k

    j

    kVin3

    22

    3

    1

    1

    1

    1=

    +

    =+

    ( )

    ( )

    ( )

    ( )

    V V V j V j

    kVO C C j in= + = + =

    +3 3 2 1 3

    311

    1( )( ) ( )

    GV

    V

    j

    kO

    in

    = =+

    ( )1

    13

    vQ

    C

    I k T

    C

    k

    fC

    V

    RO j

    O

    j j

    O= =

    =

    32 32 32

    1 1( )

    = =v

    V

    k

    RfCO

    O j

    / 2 1

    2 32

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    FIGURE 5.14Three-stage boost multiple-double circuit.

    VIN

    +

    iIN

    S

    L2

    R

    C21

    D21

    C22

    D22

    C2(2j-1)

    D2(2j-1)

    C22j

    D22j

    D3

    C2

    -

    L1

    D1

    C1

    C11

    D11

    C12

    D12

    C1(2j-1)

    D1(2j-1)

    C12j

    D12j

    D2

    L3

    D5

    C3

    C31

    D31

    C32

    D32

    C3(2j-1)

    D3(2j-1)

    C32j

    D32j

    D4

    1 j2... 1 2... j 1 2... j

    V1

    jV1

    (1+j)V1

    V2

    jV2

    (1+j)V2

    V3

    jV3

    (1+j)V

    iIN

    L1

    C1

    +

    -

    VIN

    C22(j-1)C21

    C2(2j-1)C2

    R VO-

    +

    iO

    C32j

    C12j

    L2

    C12(j-1)C11

    C1(2j-1)

    C32(j-1)

    C3

    C31

    L3

    C22j

    C3(2j-1)

    V1

    jV1

    (1+j)V1

    V2

    jV2 (1+j)V2 V3 jV3 (1+j)V3

    +

    -VIN

    iIN L

    1

    C1 VC1

    +

    -

    VL1

    VC12C12

    +

    -

    C11

    VC11

    +-

    C1(2j-1)

    C12j

    L2

    R VO

    -

    +

    iO

    C2

    +

    -

    VC2

    C21

    VC21

    - +

    C22

    VC22

    +

    -

    C2(2j-1)

    C22j

    L3

    C3 VC3

    +

    -

    VC31- +

    C31

    C32

    C3(2j-1)

    C32j

    VC32

    -

    +

    V1

    (1+j)V1

    V2

    (1+j)V2

    V3

    (1+j)V3

    (a) Circuit Diagram

    (b) Equivalent circuit during switching-on

    (c) Equivalent circuit during switching-off

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    5.6.4 Higher Stage Multiple Boost Circuit

    Higher stage multiple boost circuit is derived from the corresponding circuitof the main series by adding multiple (j) DECs in each stage circuit. For nth

    stage additional circuit, the final output voltage is

    The voltage transfer gain is

    (5.100)

    Analogously, the variation ratio of output voltage vO is

    (5.101)

    5.7 Summary of Positive Output Cascade Boost Converters

    All circuits of the positive output cascade boost converters as a family areshown in Figure 5.15 as the family tree. From the analysis of the previoustwo sections we have the common formula to calculate the output voltage:

    (5.102)

    The voltage transfer gain is

    Vj

    kVO

    nin=

    +

    ( )1

    1

    GV

    V

    j

    kO

    in

    n= =+

    ( )1

    1

    = =v

    V

    k

    RfCO

    O n j

    / 2 1

    2 2

    V

    kV main series

    kV additional series

    kV double series

    kV triple series

    j

    k V multiple j series

    O

    nin

    nin

    nin

    nin

    n in

    =

    +

    ( ) _

    ( ) _

    ( ) _

    ( ) _

    ( ) ( ) _

    1

    1

    21

    12

    13

    11

    1

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    (5.103)

    In order to show the advantages of the positive output cascade boost con-verters, we compare their voltage transfer gains to that of the buck converter,

    FIGURE 5.15The family of positive output cascade boost converters

    5 Stage BoostCircuit

    4 Stage Boost

    Circuit

    3 Stage Boost

    Circuit

    2 Stage Boost

    Circuit

    5 Stage AdditionalBoost Circuit

    4 Stage Additional

    Boost Circuit

    3 Stage Additional

    Boost Circuit

    2 Stage Additional

    Boost Circuit

    5 Stage DoubleBoost Circuit

    4 Stage DoubleBoost Circuit

    3 Stage DoubleBoost Circuit

    2 Stage DoubleBoost Circuit

    5 Stage MultipleBoost Circuit

    4 Stage Multiple

    Boost Circuit

    3 Stage Multiple

    Boost Circuit

    2 Stage Multiple

    Boost Circuit

    Elementary Multiple

    Boost Circuit

    Elementary Triple

    Boost Circuit

    Elementary

    Additional/Double

    Boost Circuit

    Positive Output Elementary Boost Converter

    MainSeries

    AdditionalSeries

    DoubleSeries

    TripleSeries

    MultiSeries

    5 Stage TripleBoost Circuit

    4 Stage TripleBoost Circuit

    3 Stage TripleBoost Circuit

    2 Stage TripleBoost Circuit

    GV

    V

    kmain series

    kadditional series

    kdouble series

    ktriple series

    j

    kmultiple j series

    O

    in

    n

    n

    n

    n

    n

    = =

    +

    ( ) _

    ( ) _

    ( ) _

    ( ) _

    ( ) ( ) _

    1

    1

    2 112

    13

    11

    1

    GV

    VkO

    in

    = =

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    forward converter,

    Nis the transformer turn ratio

    Ck-converter,

    fly-back converter,

    Nis the transformer turn ratio

    boost converter,

    and positive output Luo-converters

    (5.104)

    If we assume that the conduction duty k is 0.2, the output voltage transfergains are listed inTable 5.1; if the conduction duty k is 0.5, the output voltagetransfer gains are listed in Table 5.2; if the conduction duty k is 0.8, the output

    voltage transfer gains are listed in Table 5.3.

    5.8 Simulation and Experimental Results

    5.8.1 Simulation Results of a Three-Stage Boost CircuitTo verify the design and calculation results, the PSpice simulation packagewas applied to a three-stage boost converter. Choosing Vin = 20 V, L1 = L2 =L3 = 10 mH, all C1 to C8 = 2 F, and R = 30 k, k = 0.7 andf= 100 kHz. The

    GV

    V

    kNO

    in

    = =

    GV

    V

    k

    kO

    in

    = =1

    GV

    V

    k

    kNO

    in

    = =1

    GV

    V kO

    in

    = =1

    1

    GV

    V

    n

    kO

    in

    = =1

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    obtained voltage values V1, V2, and VO of a triple-lift circuit are 66 V, 194 V,and 659 V respectively and inductor current waveforms iL1 (its average valueIL1 = 618 mA), iL2, and iL3. The simulation results are shown in Figure 5.16.The voltage values match the calculated results.

    TABLE 5.1

    Voltage Transfer Gains of Converters in the Condition k = 0.2

    Stage No. (n) 1 2 3 4 5 n

    Buck converter 0.2Forward converter 0.2N(Nis the transformer turn ratio)Ck-converter 0.25Fly-back converter 0.25N(Nis the transformer turn ratio)Boost converter 1.25Positive output Luo-converters 1.25 2.5 3.75 5 6.25 1.25nPositive output cascade boostconverters main series

    1.25 1.563 1.953 2.441 3.052 1.25n

    Positive output cascade boostconverters additional series

    2.5 3.125 3.906 4.882 6.104 21.25n

    Positive output cascade boost

    converters double series

    2.5 6.25 15.625 39.063 97.66 (21.25)n

    Positive output cascade boostconverters triple series

    3.75 14.06 52.73 197.75 741.58 (31.25)n

    Positive output cascade boost (j = 3)converters multiple series

    5 25 125 625 3125 (41.25)n

    TABLE 5.2Voltage Transfer Gains of Converters in the Condition k = 0.5

    Stage No. (n) 1 2 3 4 5 n

    Buck converter 0.5Forward converter 0.5N(Nis the transformer turn ratio)Ck-converter 1Fly-back converter N(Nis the transformer turn ratio)Boost converter 2Positive output Luo-converters 2 4 6 8 10 2nPositive output cascade boost converters

    main series

    2 4 8 16 32 2n

    Positive output cascade boost converters additional series

    4 8 16 32 64 22n

    Positive output cascade boost converters double series

    4 16 64 256 1024 (22)n

    Positive output cascade boost converters triple series

    6 36 216 1296 7776 (32)n

    Positive output cascade boost (j = 3)converters multiple series

    8 64 512 4096 32,768 (42)n

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    5.8.2 Experimental Results of a Three-Stage Boost Circuit

    A test rig was constructed to verify the design and calculation results, and

    compared with PSpice simulation results. The test conditions are still Vin =20 V, L1 = L2 = L3 = 10 mH, all C1 to C8 = 2 F and R = 30 k, k = 0.7, andf= 100kHz. The component of the switch is a MOSFET device IRF950 withthe rate 950 V/5 A/2 MHz. The measured values of the output voltage and

    TABLE 5.3

    Voltage Transfer Gains of Converters in the Condition k = 0.8

    Stage No. (n) 1 2 3 4 5 n

    Buck converter 0.8Forward converter 0.8N(Nis the transformer turn ratio)Ck-converter 4Fly-back converter 4N(Nis the transformer turn ratio)Boost converter 5Positive output Luo-converters 5 10 15 20 25 5nPositive output cascade boostconverters main series

    5 25 125 625 3125 5n

    Positive output cascade boostconverters additional series

    10 50 250 1250 6250 25n

    Positive output cascade boost

    converters double series

    10 100 1000 10,000 100,000 (25)n

    Positive output cascade boostconverters triple series

    15 225 3375 50,625 759,375 (35)n

    Positive output cascade boost (j=3)converters multiple series

    20 400 8000 160,000 32105 (45)n

    FIGURE 5.16The simulation results of a three-stage boost circuit at condition k = 0.7 andf= 100 kHz.

    9.980ms 9.984ms 9.988ms 9.992ms 9.996ms 10.000ms

    V(R:2) V(D2:2) V(D5:2)

    0V

    0.5KV

    1.0KV

    SEL>>

    I(L1) I(L2) I(L3)0A

    0.5A

    1.0A

    Time

    (9.988m, 111m)

    (9.988m, 659m)

    (9.988m, 194m)

    (9.988m, 66m)

    (9.988m, 218m)

    (9.988m, 618m)

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    first inductor current in a three-stage boost converter. After careful measure-ment, we obtained the current value of IL1 = 0.62 A (shown in channel 1 with1 A/Div) and voltage value of VO = 660 V (shown in channel 2 with 200 V/Div). The experimental results (current and voltage values) in Figure 5.17match the calculated and simulation results, which are IL1 = 0.618 A and VO= 659 V shown in Figure 5.16.

    5.8.3 Efficiency Comparison of Simulation and Experimental Results

    These circuits enhanced the voltage transfer gain successfully, and efficiently.Particularly, the efficiency of the tested circuits is 78%, which is good forhigh voltage output equipment. Comparison of the simulation and experi-mental results is shown in Table 5.4.

    5.8.4 Transient Process

    Usually, there is high inrush current during the first power-on. Therefore,the voltage across capacitors is quickly changed to certain values. The tran-sient process is very quick taking only a few milliseconds.

    FIGURE 5.17

    The experimental results of a three-stage boost circuit at condition k = 0.7 andf= 100 kHz

    TABLE 5.4

    Comparison of Simulation and Experimental Results of a Triple-Lift Circuit

    Stage No. (n) IL1 (A) Iin (A) Vin (V) Pin (W) VO (V) PO (W) (%)

    Simulation results 0.618 0.927 20 18.54 659 14.47 78Experimental results 0.62 0.93 20 18.6 660 14.52 78

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