2009iscastutorial

Analog Circuit Design on Digital CMOSWhy it is difficult, and which ideas help. Presented by HP. Schmid.

ISCAS 2009© Hanspeter Schmid, Institute of Microelectronics, FHNW, Windisch, Switzerland 2

Background on Hanspeter Schmid

– Dissertation on video-frequency integrated filters (ETH Zürich)

– Analog IC Designer at Bernafon / William Demant Holding:– Analog electronics: LNAs, amplifiers, regulators, filters, standard

cells, circuits for wireless communication system.– System design, analog signal processing and signal integrity.– Communication facilitator between Danish and Swiss Teams.

– IME: research projects (sensor systems, sigma-delta, etc.), consulting, teaching.

– ETH Zürich: teaching analog (integrated) signal processing

– IEEE CAS:– Chair Analog Signal Processing Tech. Comm.– Associate Editor of TCAS-I

– Hobbies: going for walks,playing trombone, reading.


Tutorial Philosophy


Philosophy I: Be a fool!

– multiparameter optimization– noise– distortion– power consumption– signal delay– chip area– offset– yield– mask costs– …

– conscious vs. subconscious– conscious mind: 4…5 criteria– subconscious: 100? 200?

– what it means to be a fool


Philosophy II: Be a child

– open for everything

– playful

– does not dowhat she should do

– a child has got time!

– Advice for scientists byDouglas Adams:

See first, think later, then test. But always see first, or you will only see what you expect to see!


Philosophy III: Be a climber

– works hard to achieve a goal

– is well trained

– normally gets to the intended goal

– Is the intention good?

The direct path leads only to the goal! (André Gide)

– Will the fool not fall down?

Not if the fool also is a child.

The most exciting phrase in science, the one that heralds new discoveries, is not Eureka! (I found it!), but

That's funny ...

(Isaac Asimov)


Tutorial Contents

Image from http://www.beatenbergbilder.ch/


Introduction: What is new?

– More metal layers

– Small lateral distances

– Thinner gates– more C– less Vdd

– less gain

– more weak inversion

Image from http://www.ndl.org.tw/cht/ndlcomm/P10_2/7.pdf


Multi-metal cross section

Example: 6 Metal layers. Lateral dimensions are smaller than vertical dimensions!


Transconductance in Strong and Weak Inversion

Strong Inversion

Weak Inversion

Moderate Inversion: Superposition


Maximum gain of single stage is reached in weak inversion

For a given supply current: gain is proportional to supply voltage!


Weak inversion = matching problems?

For a 0.25u process:

Voltage offset Current offsetfor identical supply current for identical gate-source voltage

Therefore: Differential pairs in weak inversionTherefore: Current mirrors in strong inversion

from [Kinget07]


Summary

– Thinner gates (and higher gate tunnelling currents!)

– more gate (overlap, ...) capacitance per area

– No buried channels anymore pMOS is not better anymore in terms of flicker noise!

– Less supply voltage less signal

– Less gain

– same white noise at same supply current; less flicker noise

– Sub-threshold leakage


Literature: What is new?

[Annema99] Anne-Johan Annema, "Analog Circuit Performance and Process Scaling", IEEE Trans. Circuits and Systems—II, vol. 46, no. 6,pp. 711–725, June 1999.

[Huang98] Qiuting Huang et. al., "The Impact of Scaling Down to Deep Submicron on CMOS RF Circuits," IEEE J. Solid-State Circuits, vol. 33, no. 7, pp. 1023–1036, July 1998

[Kinget07] Peter Kinget, "Device Mismatch: An Analog Design Perspective", ISCAS, New Orleans, pp. 1245–1248, May 2007.

[Tsividis02] Yannis Tsividis, Mixed Analog-Digital VLSI Devices and Technology, World Scientific Publishers, 2002.

[Tsividis99] Yannis Tsividis, Operation and Modelling of the MOS Transistor, ed. 2, McGraw-Hill 1999.

[Dijksterhuis06] Ap Dijksterhuis et. al., "On Making the Right Choice: The Deliberation-Without-Attention Effect," Science, vol. 311, pp. 1005–1007, 2006.

[Simons99] Daniel Simons et. al., "Gorillas in our midst: sustained inattentionalblindness for dynamic events," Perception, vol. 28, pp. 1059–1074, 1999.



Signal Integrity

– Ground and Power Routing

– Star Connections

– Tapered Stars

– Signal Grounds and Refs

– Improving PSR (theory)

– Finger capacitors andMIM-capacitors

– Demodulation by nonlinearity

– Decoupling


Why correct ground and power routing are important


On PCB: Power plane? No!


On PCB: Split ground plane? Dangerous!


Recommendations for PCB routing

[National05] recommend

– Use a single, unified ground plane

– use separate power planes for analog and digital

– let trace routing control ground currents.

Low-power low-noise circuits:

require controlled power/gnd routing!


The problem of the star connection on chip


Calculation example: hearing aid system


16μΩ is not a lot!


Solution: Tapered star

This means: we have full control of where the noise currents flow.

But: more chip area or more supply / ground wire resistance!

Paradox: most sensitive nodes are farthest away from pad.


Local decoupling is sometimes needed

The question is: where shall the decoupling capacitor go?

Answer: to the reference of the signal!But this may not be so easy.Many "PSR problems" are really coupling problems or problems with dirty references


How to improve PSRR and CMRR in a system?

CMRR and PSRR are connected!Proof: Gauge transformation

from [Säckinger91]


Solution: Additional input from quiet ground

Now we have one more degree of freedom


Example: additional signal path

from [Loikkanen06]


Example: additional signal path


Recommendations for chip routing

Use "tapered" star connections

For every differential signal node, make sure that the signal isreferred to a clean signal.

Problem:

the references can change within a single circuit

Input reference

Output reference


Multi-metal Finger-Cap MIM-Cap combination


Comparison for a six-metal 0.18um CMOS process

MIM capacitor (Metal 5 and Metal 6): 1.0 fF/μm2

Finger structure (Metal 1 … Metal 4): 1.3 fF/um2

MIM capacitor on top of Finger structure (all Metal): 2.3 fF/um2

MOSFET gate capacitance (non-linear): 10.0 fF/um2

Can we use a MOSFET gate capacitor for decoupling?


Normal Operation with HF-Signal on Pad(weak inversion)

Gives DC Offset! Inputs must be protected against this ...

Demodulation by a nonlinearity I: DC offset


Normal Operation with amplitude-modulatedHF-Signal on Pad (weak inversion)

Demodulates the signal and gives more DC offset!

Demodulation by a nonlinearity II: receiver


Realistic? Yes!

In all digitally driven class-D (PWM) amplifiers, the signal is amplitude-modulated on the system clock frequency.

The square of this signal appears in the supply current.

If this strays back into a high-gain audio system:huge distortion or even instability!

Solution:

decouple all inputs... to the respective reference of the signal... as close to the pad as possible... with as big a capacitor as possible


Literature: Signal Integrity

[Loikkanen06] Mikko Loikkanen et. al., "PSRR Improvement Technique for Amplifiers with Miller Capacitor," ISCAS 2006, Kos, Greece, pp. 1394–1397.

[National05] National Semiconductor Analog University, Meeting Signal-Path Design Challenges, High-performance seminar series 2005, part no. 570012-001. (Can be ordered from National for free.)

[Säckinger91] Eduard Säckinger et. al., "A General Relationship Between Amplifier Parameters, And Its Application to PSRR Improvement," IEEE Trans. Circuits and Systems—I, vol. 38, no. 10, pp. 1173–1181, Oct 1991



An amp within an amp

– Weak inversion

– Zero-Vgs amplifiers

– Super-Transistors– Cascode current mirrors– Self-biased cascodes– Regulated cascodes

– Matryoshka amplifiers– Regulated cascode OTAs– Nested Miller amplifiers

Image from http://www.souvenironline24.de/shop.aspx


Weak Inversion = Sub-threshold Operation

from [Tsividis99]


Zero-Vgs folded-cascode opamp in 0.18μm technology


Zero-Vgs folded-cascode opamp in 0.18μm technology

VT=230 mV (!), L=min, ID=5uA

VGS


Maximum gain of single stage is reached in weak inversion

For a given supply current: gain is proportional to supply voltage!

Less gain on (deep) submicron


Normal current mirror

Output resistance

Increase this with feedback!


Cascode current mirror

Feedback loop:For a constant signal current, the transistor M4 tries to keep the drain voltage of M2 constant. The loop gain around M4 is

and the output resistance:

Problem: high voltage drop.


Low-voltage cascode current mirror

Same feedback loop!

Careful design needed such thatM3 and M1 are always saturated

Bias voltage necessary


Self-biased low-voltage cascode current mirror

Still same feedback loop!

But: for the same current, Vgs3 < Vgs1!

– M1, M2 in strong inversionM3, M4 in weak inversion(makes Aloop small and M3,M4 huge)

– M1, M2 normal-Vt transistorsM3, M4 low-Vt transistors(requires low-Vt transistors, whichmost submicron processes have)


Different view: build super transistors

Then: build good super transistors!


The regulated cascode

Increasing the loop gain ...

... gives much higher output resistance


The "original" by Säckinger

simplest loop amplifier, but needs a lot of supply voltage

from [Säckinger90]


Matryoshka-style regulated-cascode amplifier

from [Treichler06]

one OTA Sliceseveral OTA Slices


Matryoshka slice layout!

[Treichler06]

One OTA Slice

Full OTA


Matryoshka Miller OpAmp: Two stages

from [Huijsing01]


Matryoshka Miller OpAmp: Three stages


Matryoshka Miller OpAmp: Four stages


Conclusion

On modern digital technologies, we lose

– supply voltage

– gain

If we need gain:

– we need to combine more gain stages

– and, if possible, use weak inversion

Intuitive way to think about it:

An Amp within an Amp within an Amp


Literature: New uses of old parts

[Burger96] Thomas Burger and Qiuting Huang, "A 100dB 480MHz OTA in 0.7um CMOS for sampled-data applications," Proc. CICC, pp. 101–104, 1996.

[Huijsing01] Johan H. Huijsing, Operational Amplifiers—Theory and Design, Kluwer Academic Publishers, 2001.

[Säckinger90] Eduard Säckinger et. al, "A High-Swing, High-Impedance MOS Cascode Circuit," IEEE J. Solid-State Circuits, vol. 25, no. 1, pp. 289–298, Feb 1990.

[Treichler06] Jürg Treichler et. al., "A 10-bit ENOB 50-MS/s Pipeline ADC in 130-nm CMOS at 1.2 V Supply," Proc. ESSCIRC, Montreux, Switzerland, pp. 552–555, 2006.

[Tsividis99] Yannis Tsividis, Operation and Modelling of the MOS Transistor, ed. 2, McGraw-Hill 1999.



Switched capacitors

– Speed limit of SC filters

– SC noise filtering

– Switches and T-gates

– Voltage doublers– for clock signals– for OTA tails– for control voltages

– Flicker Noise

– Autozero, CDS and Chopping


Simple SC resistor

from [Gregorian86]

Pole frequency of SC resistor loaded with capacitance:


SC becomes much faster on modern processes

from [Johns97]


Huge SC resistor for noise filtering

"Bucket Chain" technique Requires RC filters for antialiasing

Possible: 1s time constant! e.g., 80fF, 160kHz, 13 elements 1 GΩ

Beware of offset!!!


Bad Layout: asymmetries of clock lines!

This can give huge offset.


Good Layout: as symmetrical as possible


Types of switches

from [Johns97]


Voltage-level limitation


Benefitting from Narrow-Channel Effects

from [Tsividis96]


Reduce switch threshold voltage by slicing

VT=610mV

VT=540mV

0.18u Process

Normal-VT Transistors


Clock voltage doubler

"Doubling" pMOS gate voltages below VSS is also possible!

from [Basu99]


What is flicker noise?


Fllicker noise comes from a process with memory!

from [Keshner82]


Why is it called "flicker" noise?


On flicker noise:the Yahoo Aaaaaargh!


On flicker noise: the Yahoo Aaaaaargh!

from [Schmid07]


Mainly interface traps at the channel-to-oxide and gate-to-oxide interfaces:

– Spectrum caused by a single trap with time constant τ:

– Distribution of the time constants:

– Flicker noise slope is a physical property.

– Flicker noise magnitude is related to the absolute number of interface traps.

Nature of Memory in MOSFETs


Model of scaling-invariant memory

from [Schmid08]


RMS behaviour of flicker noise


Reducing flicker noise by deleting memory I

from [Klumperink00]


Sampling noise

from [Schmid08]


Reducing offset and flicker noise by auto-zeroing

from [Enz96]

Autozero

1: Vos

2: Vin+Vos

2−1: Vin

CorrelatedDoubleSampling

1: −Vin+Vos

2: Vin+Vos

2−1: 2Vin


Reducing offset and flicker noise by auto-zeroing


Reducing offset and flicker noise by chopping

from [Enz96]


Simulated chopped noise


from [Schmid08]

Chopper circuit


from [Schmid08]

Matryoshka Chopper


Multipath Chopper

ChoppedHigh Gain


Reducing offset and 1/f noise by correlated double sampling

– Auto-zeroing: sample offset in one phase; sample signal in other phase while compensating offset.Auto-zeroing works in sampled time.

– Chopping: modulate input signal to a higher frequency; modulate signal back after amplifier, and therefore modulate offset and 1/f noise to higher frequencies.Chopping works in continuous time!

– Correlated double sampling combines both: first sample signal, then sample inverse, then subtract.Correlated double sampling works in sampled time.CDS can be used most effectively in capacitive sensor systems where the sensor can be controlled to give normal or inverse output signals! Then sensor offset and 1/f noise is reduced too.

– In auto-zero and CDS, the transistor bias history must be the same for both samples!


Literature: Switched capacitors

[Basu99] S. Basu and G. Temes, "Simplified Clock Voltage Doubler," Electronics Letters, vol. 35, no. 22, pp. 1901–1902, Oct 1999.

[Duisters98] Tonny A. F. Duisters and Eise Carel Dijkmans, "A −90-dB THD rail-to-rail input opamp using a new local charge pump in CMOS," IEEE J. Solid-State Circuits, vol. 33, no. 7, pp. 947–955, Jul. 1998.

[Enz96] Christian Enz and Gabor Temes, "Circuit Techniques for Reducing the Effects of Op-Amp Imperfections: Autozeroing, Correlated Double Sampling, and Chopper Stabilization," Proc. IEEE, vol. 84, no. 11, pp. 1584–1614, Nov 1996.

[Gregorian86] Roubik Gregorian and Gabor Temes, Analog MOS Integrated Circuits for Signal Processing, John Wiley & Sons 1986.

[Johns97] David Johns and Ken Martin, Analog Integrated Circuit Design, John Wiley & Sons 1997.

[Keshner82] Marvin Keshner, "1/f Noise," Proc. IEEE, vol. 70, no. 3, pp. 212–218, March 1982.

[Klumperink00] Eric Klumperink et. al., "Reducing MOSFET 1/f Noise and Power Consumption by Switched Biasing," IEEE J. Solid-State Circuits, vol. 35, no. 7, pp. 994–1001, Jul. 2000.

[Schmid02] Hanspeter Schmid, "An 8.25-MHz 7th-Order Bessel Filter Built with Single-Amplifier Biquadratic MOSFET C Filters", Analog Integrated Circuits and Signal Processing, NORCHIP special issue, vol. 30, no. 1, pp. 69–81, January 2002.

[Schmid07] Hanspeter Schmid , "Aaargh! I Just Loooove Flicker Noise," IEEE Circuits and Systems Magazine, pp. 32–35, First Quarter2007.

[Schmid08] Hanspeter Schmid, "Offset, flicker noise, and ways to deal with them": Chapter in Circuits at the Nanoscale, CRC Press, 2008, edited by Krzysztof Iniewski.

[Wel07] Arnoud P. van der Wel et. al., "Low-Frequency Noise Phenomena in Switched MOSFETs," IEEE J. Solid-State Circuits, vol. 42,no. 3, pp. 540–550, March 2007.



Feedback or no feedback

– The benefit of feedback

– Current mode andvoltage mode

– Example: Open-Loop Sigma-Delta A/D converter

– Case study with CSEM Zürich:Low-feedback approach applied to buffer design

Image from [Black34]


Feedback (in Black's words)

Advantages:

constancy of amplification

freedom from nonlinearity

reduced delay and delay distortion, reduced noise disturbance from the power supply circuits

Disadvantages:

[difficult] because of the [] special control required of phase shifts

Unless these relations are maintained, singing will occur


No free lunch!

The famous no-free-lunch theorem states that even if we say, e.g., "A system with feedback gives us low distortion for free", it is not really for free, we just cannot possibly optimize power by trading in distortion or other parameters.

A more scientific version of the no-free-lunch theorem states:

A general-purpose optimization strategy is impossible, and the only way one strategy can outperform another is if it is specialized to the structure of the specific problem under consideration.

from [Ho01]


High-Impedance node in AD844 current-feedback amplifier


Simple example: voltage-controlled current source


AD844: the first stage is a Current Conveyor (CCII)


Current Amplifier without high-impedance node

from [Schmid00]


Real difference

from [Schmid03]


Very simple, very fast voltage integrator

from [Nauta92]


Impedance mismatch

– to decouple

– feedback couples again

– no FB– decoupled– optimization is much faster– optimization space becomes tidier– the child finds out more in a shorter time– the fool won't fall

– Example– aggressive design time– first time right



Case Study: Low-feedback approach applied to buffer designHanspeter Schmid, IME/FHNWSimon Neukom and Yue-Li Schrag, CSEM Zürich


Standard SC amplifier


Why an open-loop solution?

We needed

– Voltage level shift from arbitrary low voltage to 1.6V

– Less supply current variation (lowered by 20dB)

– 12-bit precise settling at 4 MHz sample rate, 12-bit precise offset

Our open-loop continuous-time solution gave

– less offset (3σ=3.3mV compared to SC amp's 3σ=11.4mV)

– less power (14mW compared to SC amp's 63.5mW)

Disadvantages are:

– more harmonic distortion

– more noise

but since this is an output driver after high-gain pre-amplifier chain,both disadvantages do not matter in our application.


Operation principle: (with matched resistors)

Stage 1: single-ended voltage to differential currentStage 2: current to voltage


Offset compensation with current-output Track&Hold

Signal is processed in "Hold" mode


Offset compensation with current-output Track&Hold

Offset is compensated in "Track" mode individually for each output path


The remaining offset comes only from the T&H OTA!

All other offsets, including random offsets in the gnd references, are cancelled.


Input transconductor


Output transresistance amplifier


Track&Hold amplifier


Static offset: value settled at the end of calibration cycle

Dynamic offset: mean value of full-scale settled values

Durch Bild oder Grafik ersetzen

(Grösse und Position beibehalten)

Static Offset

Dynamic Offset


Static and dynamic offsetcorrelate very well

digital correction possible!

Offsets of two channels donot correlate well


Supply current for full-scale steps

The current peaks are much smaller than for SC amplifiers


Monte-Carlo simulation of third-order (left)and second-order (right) harmonic distortion (full scale, full speed)

Efficient Simulation of Harmonic Distortion in Discrete-Time CircuitsWednesday May 27, 2009 from 15:30 - 17:00 in Room 101B.


What causesnon-idealities?

odd-order distortion

offsetNOISE

even-order distortion

gain error



Design time!

– two weeks including allsimulations and layout

– has been used onthree chips

– first time right;meets specs


Literature: Feedback or no feedback

[Black34] Harold S. Black, "Stabilized Feed-Back Amplifiers," Electrical Engineering, vol. 53, no. 1, pp. 114–120, Jan 1934. Reprinted in Proc. IEEE, vol. 87, no. 2, pp. 379–385, Feb 1999.

[Ho01] Y-C. Ho, D. Pepyne, "Simple Explanation of the No Free Lunch Theorem of Optimization", Proc. 40th IEEE Conf. on Decision and Control, Orlando, pp. 4409–4414, Dec. 2001.

[Mahattanakul98] Jirayuth Mahattanakul, "Current-Mode Versus Voltage-Mode Gm-C Biquad Filters: What the Theory Says," IEEE Trans. CAS–I, vol. 45, no. 2, pp. 173–186, Feb 1998.

[Nauta92] Bram Nauta, "A CMOS Transconductance-C Filter Technique for Very High Frequencies," IEEE J. Solid-State Circ., vol. 27, no. 2., pp. 142–153, Feb 1992.

[Schmid00] Hanspeter Schmid, "Approximating the Universal Active Element." IEEE Trans. CAS–I, vol. 47, no. 11, pp. 1160–1169, Nov 2000.

[Schmid03] Hanspeter Schmid, "Why 'Current Mode' Does Not Guarantee Good Performance," Analog Integrated Circuits and Signal Processing, vol. 35, no. 1, pp. 79–90, April 2003.





Thank you for coming!

Hanspeter SchmidInstitute of MicroelectronicsSteinackerstrasse 15210 WindischSwitzerland

Tel +41 56 462 46 25Fax +41 56 462 46 15

[email protected]

Lab: http://www.fhnw.ch/technik/ime/Publications: http://www.schmid-werren.ch/hanspeter/

Documents

2009iscastutorial