Robust TFT Backplane for Flexible AMOLED

Jin Jang, Min Hee Choi, Byung Soon Kim, Won Gyu Lee and Man Ju Seok Advanced Display Research Center and Department of Information Display,

Kyung Hee University, Seoul 130-701, Korea Deug-soo Ryu

KOLON Industries, INC. KOLON Central Research Park 207-2, Mabuk-dong, Giheung-ku, Yongin-city, Kyunggi-do 446-797, Korea

Abstract We report the fabrication and flexibility of the TFTs based on

poly-Si and a-IGZO on polyimide (PI). The performances of the TFTs do not degrade upon 10,000 times rolling with 2 mm radius for a-IGZO and 4 mm for poly-Si TFTs. It is found that there is no electrostatic damage for the TFT backplane on PI with a conducting backbone.

1. Introduction Flexible display is of increasing interest, however there are

many technology issues for the manufacturing of AM displays on flexible substrate. Flexible substrate, AM backplane, display mode and thin-film encapsulation are the major issues for flexible AMOLED. The TFT backplane would be the most important issue among them, therefore we studied to fabricate robust TFT backplane using solution processed PI substrate on carrier glass. We added a thin conducting layer on the top of carrier glass before PI solution is coated. The TFT backplane on PI can be detached easily and there is no ESD on the TFT backplane because of a thin conducting layer.

2. Results and Discussion We developed a technology to detach PI substrate from the

glass by adding a buffer layer on the top of glass. The buffer layer coating before PI spin casting enables the detach process easy. The PI substrate can be easily separated from carrier glass as shown in Figure 1 (top). The substrate can be hung on metal rod as shown in the bottom of Fig.1 because of the existence of conducting backbone at the back of PI substrate. It means that the plastic substrate can be free standing on substrate.

After the curing of PI, gas barrier of SiO2/SiNx multilayer was coated to protect the device from the diffusion of vapor and oxygen diffusion. It protects the device from O2 and H2O penetration and it also makes the fabrication process possible such as cleaning and etching stable.

We have fabricated TFTs and TFT circuits on PI after gas barrier deposition. The process steps are similar to those of the TFT array on glass.[1-4] The a-IGZO was deposited by reactive sputtering and LTPS was achieved by conventional ELA. The performances of the TFTs were measured before and after detach the PI substrate from carrier glass.

1 cm

2 cm

Figure 1. (Top) Image of detaching plastic substrate from carrier glass. A conducting layer was coated on glass and then PI solution was coated and cured before starting deposition of gas barrier and TFT process. (Top : Detach of PI layer from carrier glass; Bottom : Plastic substrate hung on a metal rod)

20.1 / J. Jang Invited Paper

260 • SID 2012 DIGEST ISSN 0097-966X/12/4301-0260-$1.00 © 2012 SID

GATE VOLTAGE(V)

-20 -10 0 10 20

LO

G D

RA

IN C

UR

RE

NT

(A)

-14

-13

-12

-11

-10

-9

-8

-7

-6

-5

-4V

ds = 0.1 V

Vds = 1 V

Vds = 5 V

Vds = 10 V

sat = 24.65 cm2/V s

Vth = 5.6 V

S = 0.28 V/dec.

(a)

(b)

Figure 2. a-IGZO TFTs and TFT circuits on PI substrate

(a) and transfer characteristics of a a-IGZO TFT on PI substrate (b).

Seiko-Epson developed SUFTLA (surface free technology by laser ablation) in which all the LTPS TFT process was done on glass and then the TFT array including TFT circuits was transferred to the plastic substrate using laser evaporation of a sacrificial layer (a-Si:H).[5-6] This technology is used for the manufacturing of small size flexible EPD’s such as flexible clocks. Sony also developed a LTPS TFT array on plastic by using wet etching of glass by HF solution. In this case an etch stopper is needed to protect the array from being damaged.[7] G. Fortunato group developed a layer transfer technology of PI from silicon wafer. The PI solution was spin casted on the wafer and then LTPS TFT array process was carried out using an excimer laser annealing. The PI together with TFT array was detached from the wafer using a mechanical pincette.[8]

We used transfer technology of TFT array on PI after manufacturing TFT array on PI on carrier glass. To make a weak adhesion between PI and glass, a buffer layer is used on carrier glass. A high temperature PI for LTPS process was used because the activation process at > 450 oC is needed after ion doping in the source/drain region for high performance LTPS TFTs

Gate Voltage (V)

-25 -20 -15 -10 -5 0 5 10 15

Lo

g D

rain

Cu

rren

t (A

)

-14

-13

-12

-11

-10

-9

-8

-7

-6

-5

-4

-3

VD

=- 0.1 V

VD = -1 V

VD = -5 V

VD = -10 V

(a)

(b)

W/ L = 8 ㎛/ 8 ㎛

μFE = 88.25 cm2/ Vs

VTH = - 3.8 V

S = 0.37 V/ Dec.

Figure 3. ELA poly-Si TFTs and TFT circuits on PI

substrate (a) and transfer characteristics of a ELA poly-Si TFT on PI substrate (b).

Figure 2 shows the (a) image of a-IGZO TFT and TFT circuits on PI and (b) transfer characteristics of the TFT on PI. There is little change in TFT performance after being detached from carrier glass. The TFT exhibits the field-effect mobility in the saturation region of 24.0 cm2/Vs, on/off current ratio of >108, and subthreshold slope of 0.28 V/decade with a threshold voltage of 5.6 V.

Figure 3 shows the (a) optical image of ELA poly-Si TFTs and TFT circuits on PI and (b) transfer characteristics of the ELA poly-Si TFT. The TFT exhibits the field-effect mobility in the saturation region of 88.25 cm2/Vs, on/off current ratio of >108, and subthreshold slope of 0.37 V/decade with a threshold voltage of -3.8 V. It is found that there is little change in transfer characteristics after being detached from carrier glass.

Mechanical stability is an important factor for flexible devices. We estimated the electrical properties of the both TFTs after different bending times, convex bend, to make sure the possibility for use in flexible electronic devices.

Invited Paper 20.1 / J. Jang

SID 2012 DIGEST • 261

GATE VOLTAGE(V)

-20 -10 0 10 20

LO

G D

RA

IN C

UR

RE

NT

(A)

-14

-13

-12

-11

-10

-9

-8

-7

-6R = ¡ÄR = 15 mmR = 10 mmR = 5 mmR = 4 mmR = 3 mm

Figure 4. Transfer characteristics for a-IGZO TFT

measured under tensile strain with radius of 15 to 3 mm (Top) and an image of the setup of bending test under tensile strain (Bottom).

Figure 4 shows the change in the transfer curve of a-IGZO

TFT on 25 ㎛ PI substrate. The performances of a-IGZO TFTs change little even under 3 mm radius tensile strain.

Figure 5 shows the change in the transfer curve of a-IGZO TFT on 25-um-thick PI substrate and the figure in inset shows the image during rolling test. The a-IGZO TFT shows a little change in the transfer characteristics even after 2 mm radius rolling test.

Figure 6 shows the change of threshold voltage and subthreshold slope of ELA poly-Si TFT on 25 um PI substrate. In Figure 6 (a). the performances of ELA poly-Si TFTs change little even under 3 mm radius tensile strain. ELA poly-Si TFT also shows a little change in TFT performance until 4 mm strain. For the initial measurement, the threshold voltage is -3.4 V and remains almost constant even after bending the TFT up to 10,000 times. The subthreshold slope also remains almost the same as the unstressed TFT as shown in Figure 6 (b).

GATE VOLTAGE(V)

-20 -10 0 10 20

LO

G D

RA

IN C

UR

RE

NT

(A)

-14

-13

-12

-11

-10

-9

-8

-7

-6

Initial 500 times 1000 times 2000 times 5000 times10000 times

Vds = 0.1 V

Figure 5. The transfer characteristics of a-IGZO TFT

measured after rolling at 2 mm radius for 500 to 10,000 times (Top) and an image of the setup of bending test of TFT built on PI substrate (Bottom).

It is found that there is no electrostatic damage when a thin conducting layer is added at the back of plastic substrate. We have

made a AMOLED on 25-㎛-thick PI which is very flexible using a-IGZO TFT backplane.

Figure 7 shows the photograph of a 2.2-inch (120×160) flexible AMOLED display on PI substrate. The bottom gate TFTs with a-IGZO, was used to build 2T1C circuit. Then, the monochrome super-yellow OLED was coated on the TFT backplane to obtain an AMOLED display. The overall thickness of the AMOLED panel is less than 0.2 mm. It can be bent down to 2 cm but could not be 2 mm because of encap used for AMOLED and driver IC bonded on the plastic substrate.

20.1 / J. Jang Invited Paper

262 • SID 2012 DIGEST

Bending Times

Initial 100 200 500 1000 2000 5000 10000

Th

resh

old

Vol

tage

(V

)

-8

-7

-6

-5

-4

-3

-2

Gat

e V

olta

ge S

win

g (V

/dec

)

0.1

0.2

0.3

0.4

0.5

Bending Radius (mm)

-5 -10 -15 Flat 15 10 5

Th

resh

old

Vol

tage

(V

)

-6.0

-5.5

-5.0

-4.5

-4.0

-3.5

-3.0

-2.5

-2.0

Su

bth

resh

old

Sw

ing

(V/d

ec)

0.2

0.3

0.4

0.5

0.6

~ 0.5 %

@ R = 4 mm

(a)

(b)Su

bthr

esho

ldsl

ope

(V/d

ec.)

Subt

hres

hold

slop

e (V

/dec

.)

Figure 6. The threshold voltage and subthreshold slope for

LTPS TFT measured under tensile strain with radius of 15 to 3 mm (a) and for LTPS TFT measured after rolling at 4 mm radius for 100 to 10,000 times (b).

3. Summary We have developed a robust a-IGZO TFT backplane on 25 um

PI substrate. A ultra-thin conducting layer was added at the back of plastic substrate which make the detach easy and also ESD

damage free. We demonstrated a 2 inch AMOLED on 25 ㎛ plastic.

Display size 2.2 inch

Pixel circuit 2 T + 1 C

ResolutionQQVGA

(120 x 160)

Color Mono Yellow

Base material of TFT

a-IGZO

TFT structure Bottom gate

Figure 7. The photograph of AMOLED display using conventional 2T1C pixel circuit, driven by bottom gate a-IGZO TFT array.

4. Acknowledgements This work was supported by MKE/KEIT under Industrial

Strategic Technology Development Program 10035225 (Development of core technology for high-performance AMOLED on plastic).

5. References [1] M. Mativenga, M. H. Choi, J. W. Choi and J. Jang, IEEE

Electron Device Letters, 32(2), 170-172 (2011)

[2] M. Mativenga, M. H. Choi, D. H. Kang and J. Jang, IEEE Electron Device Letters, 32(5), 644-646 (2011)

[3] M. J. Seok, M. H. Choi, M. Mativenga, D. Geng, D. Y. Kim and J. Jang, IEEE Electron Device Letters, 32(8), 1089-1091 (2011)

[4] H. Jeong, M. Mativenga, S.G. Lee, Y.M. Ha, J. Jang, Journal of the SID 11 DIGEST 19/11, (2011)

[5] T. Shimoda and S. Inoue, IEDM 99 Tech. Digest, 289 (1999)

[6] M. Miyasaka, SID 07 DIGEST 1673-1676 (2007)

[7] A. Asano, T. Kinoshita and N. Otani, SID 03 DIGEST 988 (2003)

[8] A. Pecora, L. Maiolo, M. Cuscuna, D. Simeone, A. Minotti, L. Mariucci, G. Fortunato, Solid-State Electronics 52, 348 (2008)

Invited Paper 20.1 / J. Jang

SID 2012 DIGEST • 263