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22 March 2012 Dietrich Beck - BEL
General Machine Timing System @ FAIRGeneral Machine Timing System @ FAIR
Just a few slides….
22 March 2012 Dietrich Beck - BEL
Timing Systems @ FAIRTiming Systems @ FAIR
General Machine Timing System• based on White Rabbit• fairly cheap: € 800,- SPEC board• sub-ns synchronization• distribution of
• (clock)• time-stamps• timing-events
• BEL group
• one global timing master• clock derived from BuTiS
Talk T. Fleck, FAIR Technikforum
Bunch phase Timing System (BuTiS)
• invest € 15k per receiver station• ps precision (100ps/km accuracy)• distribution of
• clocks!!!• NO time-stamps at FAIR• NO timing-events
• HF group
• one global BuTiS center
Talk P. Moritz, FAIR Technikforum
Remark: If you are interested time-stamps, you need White Rabbit.
If you are interested in the most accurate clocks, you need BuTiS.
If you are interested in both, you need both.
22 March 2012 Dietrich Beck - BEL
General Machine Timing System (GMT) @ FAIRGeneral Machine Timing System (GMT) @ FAIR
• parallel execution of beam production chains
• cycles: 20ms to hours
• trigger and sync. equipment actions
• 1 µs precision in 99% of all cases
• few ns precision for kickers
• (few ps for rf-systems: BuTiS)
• many rings
• > 2000 devices connected to timing system
• large distances
• robustness: lose at most one message per year
22 March 2012 Dietrich Beck - BEL
GMT – IdeaGMT – Ideaset value
(schedule)
set values
(ramp)
1. SM transmits set values2. DM executes schedule by
broadcasting timing events3. FTRN schedule actions4. timely execution of action
(here: send IRQ to CPU)5. Generate ramp via
equipment interface
timing events
LSA
22 March 2012 Dietrich Beck - BEL
GMT – InterfacesGMT – Interfaces
FrEC
22 March 2012 Dietrich Beck - BEL
GMT – Data MasterGMT – Data Master
UNILAC
SIS18 SIS100 HESR
beamline
22 March 2012 Dietrich Beck - BEL
Settings Management – Data MasterSettings Management – Data Master
• SM generates set value for DM: schedule and alternatives (decision tree, domain specific language)
• SM sends set value to FESA class of DM• FESA class uses a library for on-the-fly
– source-code generation for soft-CPUs
– cross-compilation of soft-CPU codes
– uploading codes to soft-CPUs
codes specific to schedule rather simple code
22 March 2012 Dietrich Beck - BEL
Simple Machine Specific Soft-CPU CodeSimple Machine Specific Soft-CPU Code
while (state == PRODUCTION) {
/* one cycle: BPC1 */ if (IL(BPC1) != OK) cycle1_planB(); else { waitsync(BPC1, INJ_SIS100, timeout); cycle1(); }
/* one cycle: BPC2 */ if (IL(BPC2) != OK) cycle2_planB(); else { waitsync(BPC2, INJ_SIS100, timeout); cycle2(); }
/* repeat cycle: BPC2 */ if (IL(BPC2) != OK) cycle2_planB(); else { waitsync(BPC2, INJ_SIS100, timeout); cycle2(); }
}
not shown:
• beam processes
• error handling
• beam request on/off
• IL check during cycle execution
SIS100:
22 March 2012 Dietrich Beck - BEL
201220142017
70 m
• no loosely coupled machines
• 1 timing master
• 2 switch layers at TM
• 4 cables to each building
• then: distribution to floors
• then: distribution to rooms
• redundant links between switches
• optical or copper links to nodes
• 2000-3000 nodes
• 5 layers of switches (18 ports) in total
22 March 2012 Dietrich Beck - BEL
Timing Master to Nodes – Message TypesTiming Master to Nodes – Message Types
• Timing-Events – synchronizing actions
• Info-Telegrams – transmission of (float)-values, e.g. beam-intensity
• “Action-Events”– Commit – switching between FrEC registers containing
different set values.– Post-Mortem – “freeze” or “unfreeze” ring buffers in FrECs– Reset – reset a crashed FrEC – Rollback – “undo”?
22 March 2012 Dietrich Beck - BEL
Nodes to Timing Master – Message TypesNodes to Timing Master – Message Types
• Forbidden!
• … except a few specific cases…
• Fast beam request from local areas (experiments…) via dedicated local interface units managed by BEL
• Bunch-to-bucket transfer (transfer between ring machines)
22 March 2012 Dietrich Beck - BEL
Network and NodesNetwork and Nodes
• Network: Talk by Maciej and Cesar
• Nodes: In-Kind contribution by Slovenia
22 March 2012 Dietrich Beck - BEL
The PlanThe Plan
• Finalize “WR Starter Kit”
• Timing System v0.0 – experimental, but 24/7 (2012)
• Timing System for p-Linac test in Saclay (Beginning 2013)
• Test: replacing MIL-timing of SIS18 + ESR ( 2014)
• …