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DESCRIPTION
Integrated synthesizer plus fan out buffer, clockgenerator (dividers), and translators in a 64-pinpackage
3.3V ±10% power supply
Low jitter: <50ps cycle-to-cycle jitter
Low within-device skew: <50ps
33MHz to 500MHz output frequency range
Direct interface to crystal (SY89531/2/3L) from14MHz to 18MHz (see SY89531/2/3L data sheet forrecommended crystal)
Reference (TTL/CML/LVPECL) input between 14MHzto 160MHz for the SY89534/5/6L
TTL/CMOS control logic
Three independently programmable outputfrequency banks:• Two differential output pairs @ Bank A• Nine differential output pairs @ Bank B• Two differential output pairs @ Bank C
FEATURES
3.3V, PRECISION, 33MHz to 500MHzPROGRAMMABLE LVPECL, HSTLAND LVDS BUS CLOCK SYNTHESIZER
SY89531/2/3/4/5/6LEVALUATION
BOARD
1Rev.: A Amendment: /0
Issue Date: May 2003
The SY89531/2/3/4/5/6L are precision, high-speed clocksynthesizers optimized for multi-frequency, multi-processorserver, and synchronous computing applications. Thisdocument provides design and implementation information,and a detailed description of the SY89531/2/3/4/5/6Levaluation board. The evaluation board is intended to providea convenient test and evaluation platform for the SY89531/2/3/4/5/6L Clock Synthesizer devices. One pair of outputsis taken from Bank A, and Bank C, and two pairs from BankB for pin-to-pin skew measurements.
U1 SY89531L
X2
X1
C0 /C0
HP8596ESpectrum Analyzer
VEE_GND
VCC_C
VCCA
VCC_A
/B3
B3
/B4
B4
WavecrestDTS-2079
50ΩTerm.
50ΩTerm.
/A0 A0
Out Bank C
Out Bank AOut Bank B
50ΩTerm.
TRIG
CH1
CH2
Scope
S11
S15
S13S
9
VLOGIC
VCC_B
GND
RMS Jitter (1ps)Cycle-to-Cycle Jitter
(4ps)RMSBank A — LVPECLBank B — HSTLBank C — LVPECL
CH1
Raltron16.6MHz Series Crystal
optional capacitor
Figure 1. SY89531L Evaluation Board and Test Set-Up
2
SY89531/2/3/4/5/6L Evaluation BoardMicrel
U1 SY89532L
X2
X1
C0 /C0
HP8596ESpectrum Analyzer
VEE_GND
VCC_C
VCCA
VCC_A
/B3
B3
/B4
B4
WavecrestDTS-2079
50W
Term.
50W
Term.
/A0 A0
Out Bank C
Out Bank A
S20
S24
S25
S29
Out Bank B
50W
Term.
TRIG
CH1
CH2
Scope
S11
S15
S13
S9
VLOGIC
VCC_B
GND
RMS Jitter (1ps)Cycle-to-Cycle Jitter
(4ps)RMSBank A Ð LVPECL
Bank B Ð LVPECL
Bank C Ð LVPECL
CH1
Raltron16.6MHz Series Crystal
optional capacitor
Figure 2. SY89532L Evaluation Board and Test Set-Up
U1 SY89533L
X2
X1
C0 /C0
HP8596ESpectrum Analyzer
VEE_GND
VCC_C
VCCA
VCC_A
/B3
B3
/B4
B4
WavecrestDTS-2079
50W
Term.
/A0 A0
Raltron16.6MHz Series Crystal
Out Bank C
Out Bank A
S20
S24
S25
S29
Out Bank B
50W
Term.
TRIG
CH1
CH2
Scope
S11
S15
S13
S9
VLOGIC
VCC_B
GND
RMS Jitter (1ps)Cycle-to-Cycle Jitter
(4ps)RMSBank A Ð LVPECL
Bank B Ð LVDS
Bank C Ð LVPECL
CH1
50W
Term.
Note:Unused LVDS outputs need tobe terminated into 50W.
optional capacitor
Figure 3. SY89533L Evaluation Board and Test Set-Up
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SY89531/2/3/4/5/6L Evaluation BoardMicrel
U1 SY89534L
REF_CLK
/REF_CLK
C0 /C0
HP8596ESpectrum Analyzer
VEE_GND
VCC_C
VCCA
VCC_A
/B3
B3
/B4
B4
50W
Term.
/A0 A0
Out Bank C
Out Bank A
S20
S24
S25
S29
Out Bank B
50W
Term.
TRIG
CH1
CH2
Scope
S11
S15
S13
S9
VLOGIC
VCC_B
GND
Bank A Ð LVPECL
Bank B Ð LVPECL
Bank C Ð LVPECL
HP8133Frequency Synthesizer
14MHz to 160MHz
OUT
/OUT
S5
S7
Figure 4. SY89534L Evaluation Board and Test Set-Up
U1 SY89535L
REF_CLK
/REF_CLK
C0 /C0
HP8596ESpectrum Analyzer
VEE_GND
VCC_C
VCCA
VCC_A
/B3
B3
/B4
B4
50W Term./A0 A0
Out Bank C
Out Bank A
S20
S24
S25
S29
Out Bank B
50W
Term.
TRIG
CH1
CH2
Scope
S11
S15
S13
S9
VLOGIC
VCC_B
GND
Bank A Ð LVPECL
Bank B Ð LVDS
Bank C Ð LVPECL
HP8133Frequency Synthesizer
14MHz to 160MHz
OUT
/OUT
S5
S7
50W Term.
50W Term.
50W Term.
Note:Unused LVDS outputs need tobe terminated into 50W.
Figure 5. SY89535L Evaluation Board and Test Set-Up
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SY89531/2/3/4/5/6L Evaluation BoardMicrel
U1 SY89536L
REF_CLK
/REF_CLK
C0 /C0
HP8596ESpectrum Analyzer
VEE_GND
VCC_C
VCCA
VCC_A
/B3
B3
/B4
B4
50Ω Term./A0 A0
Out Bank C
Out Bank AOut Bank B
50ΩTerm.
TRIG
CH1
CH2
Scope
S11
S15
S13S
9
VLOGIC
VCC_B
GND
Bank A — LVPECLBank B — HSTLBank C — LVPECL
HP8133Frequency Synthesizer
14MHz to 160MHz
OUT
/OUT
S5
S7
50Ω Term.
50Ω Term.
50Ω Term.
Figure 6. SY89536L Evaluation Board and Test Set-Up
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SY89531/2/3/4/5/6L Evaluation BoardMicrel
FUNCTIONAL DESCRIPTION
At the core of the SY89531/2/3L clock synthesizer is aprecision PLL driven by a 14MHz to 18MHz series resonantcrystal. For users who wish to supply a TTL/CML or LVPECL,14MHz to 160MHz clock input, use the Micrel SY89534L,SY89535L or SY89536L. The PLL output is sent to threebanks of outputs. Each bank has its own programmablefrequency divider, and the design is optimized to providevery low skew between banks, and very low jitter generation.
The evaluation boards simplify test and measurement byallowing easy setting of the M-Divider and post-dividers.The evaluation board, however, does not allow externalVCOs to be evaluated. The VCO range is 600MHz to1000MHz, and the feedback ratio is selectable via theM-Divider control dip switches. In addition, the M-Dividerand post-dividers can be programmed on the fly and do notneed powering down during programming.
Power Supply
The SY89531/2/3/4/5/6L are 3.3V devices. Therefore,VCCA, VCC_A, VCC_B, VCC_C, and Vlogic should beconnected to +3.3VDC and VEE_GND and GND should beconnected to 0VDC.
Board Layout
The evaluation board is constructed with FR-4 materialand is co-planar designed to minimize noise, achieve highbandwidth, and minimize crosstalk.
Layer Stack
L1 Signal/GND
L2 Impedance GND
L3 VCCA/Vlogic
L4 VCC_A/VCC_B/VCC_C
L5 VEE/GND
L6 Signal
Signal Inputs/Outputs
The SY89531L, SY89532L and SY89533L evaluationboards have been designed with a 16.6MHz crystal input.The SY89534L, SY89535L and SY89536L have beendesigned to take a TTL/CML or LVPECL input between 14MHzand 160MHz. In addition, Bank A, Bank B, and Bank C havebeen pre-configured to illustrate the performance of the device.See Table 1, Device Input and Output Signals.
Inputs Outputs
Device Crystal Reference BankA BankB BankC
SY89531L 16.6MHz LVPECL HSTL LVPECL
SY89532L 16.6MHz LVPECL LVPECL LVPECL
SY89533L 16.6MHz LVPECL LVDS LVPECL
SY89534L 14 to 160MHz LVPECL LVPECL LVPECL
SY89535L 14 to 160MHz LVPECL LVDS LVPECL
SY89536L 14 to 160MHz LVPECL HSTL LVPECL
Table 1. Device Input and Output Signals
LVPECL operation is typically 750mVPP into 50Ω.Common mode is VCC–1.3V. Unused pairs of outputs donot need to be terminated and do not add jitter. LVDSoperation, on the other hand, has a typical voltage swing of350mV into 50Ω. Common mode voltage is 1.25VDC. LVDSoutputs are terminated with 100Ω across the pair. Unusedoutputs must be terminated with 100Ω.
Test Description
This section contains step-by-step instructions forevaluating the SY89531/2/3L in terms of spectral purity andmeasurement of cycle-to-cycle jitter.
1. Connect VCCA, VCC_A, VCC_B, VCC _C, and Vlogicto +3.3VDC.
2. Connect VEE_GND, and GND to 0VDC.
3. IMPORTANT (for SY89532L and SY89533L only)
Set B_logic to 0
Set XVCO to 0
Set XVCOB to 1
4. Configure test setup as shown in Figures 1 to 4.
5. Example Configuration:
Fcrystal = 16.6MHz (Raltron AS-SIM Series ResonanceCrystal)*
*NOTE: If a high frequency clock or pulse generator suchas a Agilent 8133 is used to drive the device, a 250psTransition Time Converter should be used before drivingthe device.
M = 60
Post divider banks A to C = 18
If the above configuration is used, the expected frequencywill be 55.33MHz.
SW2
1. B_logic 0
2. FSEL_B0 1
3. FSEL_B1 1
4. FSEL_B2 1
5. FSEL_C0 1
6. FSEL_C1 1
7. FSEL_C2 1
SW3
1. XVCOB 1
2. XVCO 0
3. FSEL_A0 1
4. FSEL_A1 1
5. FSEL_A2 1
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SY89531/2/3/4/5/6L Evaluation BoardMicrel
SW4
1. M0 1
2. M1 1
3. M2 0
4. M3 1
Once dip switches SW2, SW3, and SW4 are set, checkcurrent consumption it should be as follows:
Device ICC (mA)
SY89531L 342
SY89532L 342
SY89533L 342
SY89534L 436
SY89535L 436
SY89536L 436
Figure 7. Spectral Plot Bank C
TIME (310ps/div.)
Out
put
Figure 8. Output Waveform Bank C
6. To measure non-correlated random jitter using aTektronix 11801B Digital Sampling Oscilloscopefollow step 7 to 12.
7. On the Tektronix scope, set acquisition mode to run.
8. Then press the autoset button located on the frontpanel.
9. On the control panel, select the persist histogrambutton.
10. Then select the horizontal histogram and set thevertical and horizontal limits. Jitter information isthen shown at the bottom of the screen.
11. As a reminder, to minimize accumulated jitter,always set the time delay to a minimum.
12. In addition, jitter is measured on the rising edge of awaveform.
13. Further, the evaluation boards provide ports tomeasure pin to pin skew using Bank B. Bank B hasB3P, B3N, B4P, and B4N pins connected to SMA20,SMA24, SMA25, and SMA29.
14. To measure cycle-to-cycle jitter using a WavecrestDTS-2079 follow steps 15 to 22.
15. Double click on the Wavecrest icon and select clockhistogram.
16. Select CH1 input, refer to the test set-up figures.
17. To measure:
a. T2 – T1 select stop edges to skip = 0
b. T3 – T1 select stop edges to skip = 1
c. T4 – T1 select stop edges to skip = 2
d. T5 – T1 select stop edges to skip = 3
18. Set hits > 30,000.
19. Select “view accum hits.”
20. Set measure = period
21. Select pulse finds. Make sure min., and max.voltages are correct.
22. Hit “run and plot information to screen.”
Frequency of VCOReference/Oscillator M-Divider (MHz)Frequency
Min. Max. Min. Max.
Fmin = 14MHz 44 70 616 980
Ftyp = 16MHz 38 60 608 960
Fmax = 18MHz 34 54 612 972
Table 2. Valid M-Divider Settingsvs. VCO Frequency for the SY89531/32/33L
Freq. of VCOM-Divider (MHz)
Frequency Predividers Min. Max. Min. Max.
Fmin = 14MHz 1 44 70 616 980
Fmax = 160MHz 8 30 50 600 1000
Table 3. Valid M-Divider and Predivider Settingsvs. VCO Frequency for the SY89534/35/36L
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SY89531/2/3/4/5/6L Evaluation BoardMicrel
FEEDBACK DIVIDE SELECT TABLE (M-DIVIDER)
M3 M2 M1 M0 VCO Frequency (1)
0 0 0 0 Ref × 34
0 0 0 1 Ref × 36
0 0 1 0 Ref × 38
0 0 1 1 Ref × 40
0 1 0 0 Ref × 42
0 1 0 1 Ref × 44
0 1 1 0 Ref × 48
0 1 1 1 Ref × 50
1 0 0 0 Ref × 52
1 0 0 1 Ref × 54
1 0 1 0 Ref × 56
1 0 1 1 Ref × 60
1 1 1 0 Ref × 70
1 1 1 1 Ref × 72
Table 4. M-Divider Settings
Note 1. Ref = Crystal Frequency.
8
SY89531/2/3/4/5/6L Evaluation BoardMicrel
FREQUENCY ASKED QUESTIONS
What Do I Do with the Exposed Pad on the Bottom ofthe Package?
The purpose of the exposed pad at the bottom of thepackage is to conduct heat more efficiently out of thepackage. Solder or use thermal conductive epoxy. Althoughthe pad is connected to GND, there has not been anydegradation in either output generated jitter or input jittertolerance performance. In addition, the exposed pad isdirectly connected to the chip ground internally. Make surethe exposed pad ground and the device ground are thesame potential.
I Just Got my Evaluation Board and I Cannot GetAnything to Work.
First check the power supplies. This evaluation boarduses one power supply. You should see a current draw ofabout 342mA for the SY89532/3L and 436mA forSY89534/5L when the part is running. After, check thevoltage swing levels of REFCLK.
Next, make sure that B_logic is set to 0, since it is reallyused to ground the chip, and XVCO is set to 0 and XVCObis set to 1.
Aside from setting the M-Divider, and Post dividersincorrectly, everything should operate as expected at thispoint.
What is the Time Domain Reflectometry Test?
TDR (Time Domain Reflectometry) is used to verifyimpedance continuity along a signal path. Manyinterconnects, such as SMA, if not launched correctly ontothe PCB will exhibit inductive like resonance with an abruptcapacitive discontinuity. This discontinuity will subtract signalfrom the inputs and outputs and effectively close the resultingdata eye.
What Should I Use to Generate REFCLK in mySY89534/5/6L Design?
This depends on data rate, jitter budget, and cost.However, REFCLK input jitter will affect the overall jitterperformance of the system. A fundamental series tonecrystal-based oscillator is ideal. Measure the jitter of theoscillator with a Wavecrest DTS2077 or a CSA803. Ameasurement above the 3ps noise floor of the instrumentis too high. Remember that the REFCLK input is multipliedby the M-Divider selected value, so the resulting jitterincreases by 20log (M-Divider). If you use a clock derivedfrom an ASIC, verify the single cycle and accumulated cyclejitter.
Crystal based oscillators typically have poor AC powersupply rejection ratio, and if you are providing board powervia 400kHz switching supplies you may have to providesome level of filtering, not just bypassing, for the supplies.
Also verify that the oscillator output has no “pedestals” inthe response due to improper impedance matching and/orinadequate drive capability of the oscillator.
If the SY89531/2/3L experiences start-up problems, adda 10pF capacitor across XTAL1, and XTAL2. Start-upproblems can be easily recognized. Start-up problems canbe seen as the VCO oscillating at either its maximum orminimum frequency. Adding a capacitor across XTAL1 andXTAL2 lowers the gain of the crystal oscillator driver ifelectrical series resistance of the crystal is high, in additionto snapping out an parasitic that maybe present.
As a general guideline, do not use CMOS-based PLLs todrive the SY89534/5/6L. They almost always have too muchhigh frequency deterministic jitter for this application. Alsofanning out one oscillator to several locations on your boardis not a good idea. Crosstalk and inadequate drive canadversely affect performance.
What Layout Tips Do You Have?
1. Establish controlled impedance stripline, microstrip,or co-planar construction techniques for high-speedsignal paths.
2. All differential paths are critical timing paths, andskew should be matched to within ±10ps.
3. Signal trace impedance should not vary more than±5%. If in doubt, perform TDR analysis of signaltraces.
4. Maintain compact filter networks as close to filterpins as possible.
5. Provide ground plane relief under filter path toreduce stray capacitance and be careful of crosstalkcoupling into the filter network.
6. Maintain low jitter on the REFCLK input by isolatingthe XTAL oscillator from power supply noise byadequately decoupling.
7. Keep XTAL oscillator close to SY89531/2/3/4/5/6L.
8. Isolate the input, output, and REFCLK signal tracesfrom other clock and data signals on your board ifthese other traces are within 3x the trace width.Isolation can be achieved by putting ground tracesin between.
Should I Adjust the Loop Filter?
The values found in the data sheets are the result ofextensive modeling as well as lab testing. Therefore, werecommend starting with those values.
9
SY89531/2/3/4/5/6L Evaluation BoardMicrel
DESCRIPTION OF CONNECTORS
SY89533L
Connector Name Type Connects to Description
S9 A0p LVPECL Pin 54 AC-Coupled Output–Bank A
S11 C0p LVPECL Pin 20 AC-Coupled Output–Bank C
S13 A0n LVPECL Pin 53 AC-Coupled Output–Bank C
S15 C0n LVPECL Pin 19 AC-Coupled Output–Bank A
S20 B3p LVDS Pin 43 AC-Coupled Output–Bank B
S24 B3n LVDS Pin 42 AC-Coupled Output–Bank B
S25 B4p LVDS Pin 41 AC-Coupled Output–Bank B
S29 B4n LVDS Pin 40 AC-Coupled Output–Bank B
SY89534L
Connector Name Type Connects to Description
S5 X2 TTL/LVPECL Pin 10 TTL or LVPECL Frequency Input
S7 X1 TTL/LVPECL Pin 11 TTL or LVPECL Frequency Input
S9 A0p LVPECL Pin 54 AC-Coupled Output–Bank A
S11 C0p LVPECL Pin 20 AC-Coupled Output–Bank C
S13 A0n LVPECL Pin 53 AC-Coupled Output–Bank C
S15 C0n LVPECL Pin 19 AC-Coupled Output–Bank A
S20 B3p LVPECL Pin 43 AC-Coupled Output–Bank C
S24 B3n LVPECL Pin 42 AC-Coupled Output–Bank B
S25 B4p LVPECL Pin 41 AC-Coupled Output–Bank B
S29 B4n LVPECL Pin 40 AC-Coupled Output–Bank B
SY89531L
Connector Name Type Connects to Description
S9 A0p LVPECL Pin 54 AC-Coupled Output–Bank A
S11 C0p LVPECL Pin 20 AC-Coupled Output–Bank C
S13 A0n LVPECL Pin 53 AC-Coupled Output–Bank C
S15 C0n LVPECL Pin 19 AC-Coupled Output–Bank A
S20 B3p HSTL Pin 43 DC-Coupled Output–Bank C
S24 B3n HSTL Pin 42 DC-Coupled Output–Bank B
S25 B4p HSTL Pin 41 DC-Coupled Output–Bank B
S29 B4n HSTL Pin 40 DC-Coupled Output–Bank B
SY89532L
Connector Name Type Connects to Description
S9 A0p LVPECL Pin 54 AC-Coupled Output–Bank A
S11 C0p LVPECL Pin 20 AC-Coupled Output–Bank C
S13 A0n LVPECL Pin 53 AC-Coupled Output–Bank C
S15 C0n LVPECL Pin 19 AC-Coupled Output–Bank A
S20 B3p LVPECL Pin 43 AC-Coupled Output–Bank C
S24 B3n LVPECL Pin 42 AC-Coupled Output–Bank B
S25 B4p LVPECL Pin 41 AC-Coupled Output–Bank B
S29 B4n LVPECL Pin 40 AC-Coupled Output–Bank B
10
SY89531/2/3/4/5/6L Evaluation BoardMicrel
DESCRIPTION OF CONNECTORS
SY89536L
Connector Name Type Connects to Description
S5 X2 TTL/LVPECL Pin 10 TTL or LVPECL Frequency Input
S7 X1 TTL/LVPECL Pin 11 TTL or LVPECL Frequency Input
S11 C0p LVPECL Pin 20 AC-Coupled Output–Bank C
S13 A0n LVPECL Pin 53 AC-Coupled Output–Bank C
S15 C0n LVPECL Pin 19 AC-Coupled Output–Bank A
S20 B3p HSTL Pin 43 DC-Coupled Output–Bank B
S24 B3n HSTL Pin 42 DC-Coupled Output–Bank B
S25 B4p HSTL Pin 41 DC-Coupled Output–Bank B
S29 B4n HSTL Pin 40 DC-Coupled Output–Bank B
SY89535L
Connector Name Type Connects to Description
S5 X2 TTL/LVPECL Pin 10 TTL or LVPECL Frequency Input
S7 X1 TTL/LVPECL Pin 11 TTL or LVPECL Frequency Input
S11 C0p LVPECL Pin 20 AC-Coupled Output–Bank C
S13 A0n LVPECL Pin 53 AC-Coupled Output–Bank C
S15 C0n LVPECL Pin 19 AC-Coupled Output–Bank A
S20 B3p LVDS Pin 43 AC-Coupled Output–Bank B
S24 B3n LVDS Pin 42 AC-Coupled Output–Bank B
S25 B4p LVDS Pin 41 AC-Coupled Output–Bank B
S29 B4n LVDS Pin 40 AC-Coupled Output–Bank B
11
SY89531/2/3/4/5/6L Evaluation BoardMicrel
S9SMA
S13SMA
12
13
14
15
16
11
10
TESTC
TESTB
TESTA
VCO_SEL
XVCCB
XVCO
LFLT
/LFLT
GND1
XTAL2
XTAL1
VBB_REF
M3
M2M1
M0
TES
TQ
1
2
U1 SY89531L
GN
D3
VC
CA
VC
C_L
2
VC
C_L
1
OU
T_S
YN
C
FSE
L_A
0
FSE
L_A
1
FSE
L_A
2
VC
C_A /A
0
A0
/A1
A1
VC
CO
_B3
/B0
C1
C1
C0
C0
VC
CO
_C
FSE
L_C
2
FSE
L_C
1
FSE
L_C
0
GN
D2
FSE
L_B
2
FSE
L_B
1
FSE
L_B
0
B_L
OG
IC
VC
CO
_B1
VC
CO
_B2
B8
B0
/B1
B1
/B2
B2
/B3
B3
/B4
B4
/B5
B5
/B6
B6
/B7
B7
/B8
3
4
5
6
7
8
9
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
C10.2µF
C247pFR3
330Ω
Y116MHz
VEE
R10120Ω
R6120Ω
VEEC70.01µF
C560.01µF
VEE
VCC_C
VEE
S15SMA
S11SMA
C370.1µF
C3822µF
J5
1
VEE
C360.01µF
C400.1µF
C4122µF
J6
1
VEE
C390.01µF
C470.1µF
C4822µF
J8
1
VEE
C460.01µF
C520.1µF
C5322µF
J11
1
VEE
C510.01µF
C450.01µF
S29SMA
S25SMA
S20SMA
S24SMA
SW3
SW DIP-8SW2
SW DIP-8SW2
SW DIP-8
VLOGIC
R3410k
R3510k
R3610k
R3710k
R3810k
R3910k
R4010k
R4110k
R4210k
R4310k
R4410k
R4510k
R4610k
R4610k
R4310k
M3M2M1M0
FSEL_C2FSEL_C1FSEL_C0FSEL_B2FSEL_B1FSEL_B0B_LOGIC
FSEL_A2FSEL_A1FSEL_A0XVCOXVCOB
VCC_B2VCCA
VEE
FSEL_C0
FSEL_C1
FSEL_C2
FSEL_B0
B_LOGIC
FSEL_B1
FSEL_B2
VCC_B1
FSEL_A2
FSEL_A1
FSEL_A0
M3
M2
M1
M0
VLOGIC
VCCA
VEE
OUT_SYNCSMA
C340.1µF
C3522µF
J4
1
VEE
C330.01µF
C430.1µF
J7
VEE_GND
1
VEE
C420.01µF
C540.01µF
VCCA
VCCAVLOGIC
VLOGIC
VCC_A
VCC_A
VCC_B2 VCC_B1
VCC_B
VCC_C
VCC_C
J12
GND
1
Layer Definitions:Layer 1: Single Zo = 50ΩLayer 2: Impedance GNDLayer 3: VCCA/VLOGIC
Layer 4: VCC_A/VCC_B/VCC_C
Layer 5: VEE
Layer 6: Single Zo = 50Ω/GND
C4422µF
Chip Analog Ground
Notes:1. Banks A to C configured as LVPECL2. Set B_LOGIC = 03. Set XVCO = 04. Set XVCOB = 15. VCCA, VCC_A, VCC_B, VCC_C, VLOGIC = 3.3V6. VEE_GND, GND = 0V
XVCO
XVCOB
VEE
R8120Ω
C90.01µF
C50.01µF
R4120ΩVEE
Figure 9. SY89531L Schematic
EVALUATION BOARD SCHEMATICS
12
SY89531/2/3/4/5/6L Evaluation BoardMicrel
S9SMA
S13SMA
12
13
14
15
16
11
10
TESTC
TESTB
TESTA
VCO_SEL
XVCCB
XVCO
LFLT
/LFLT
GND1
XTAL2
XTAL1
VBB_REF
M3
M2M1
M0
TES
TQ
1
2
U1 SY89532L
GN
D3
VC
CA
VC
C_L
2
VC
C_L
1
OU
T_S
YN
C
FSE
L_A
0
FSE
L_A
1
FSE
L_A
2
VC
C_A /A
0
A0
/A1
A1
VC
CO
_B3
/B0
C1
C1
C0
C0
VC
CO
_C
FSE
L_C
2
FSE
L_C
1
FSE
L_C
0
GN
D2
FSE
L_B
2
FSE
L_B
1
FSE
L_B
0
B_L
OG
IC
VC
CO
_B1
VC
CO
_B2
B8
B0
/B1
B1
/B2
B2
/B3
B3
/B4
B4
/B5
B5
/B6
B6
/B7
B7
/B8
3
4
5
6
7
8
9
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
C10.2µF
C247pFR3
330Ω
Y116MHz
VEE
R10120Ω
R6120Ω
VEEC70.01µF
C560.01µF
VEE
VCC_C
VEE
S15SMA
S11SMA
C370.1µF
C3822µF
J5
1
VEE
C360.01µF
C400.1µF
C4122µF
J6
1
VEE
C390.01µF
C470.1µF
C4822µF
J8
1
VEE
C460.01µF
C520.1µF
C5322µF
J11
1
VEE
C510.01µF
C450.01µF
VEE
R24120Ω
C250.01µF
S29SMA
VEE
R20120Ω
C210.01µF
S25SMA
C160.01µF
S20SMA
C200.01µF
S24SMA
VEE
R19120Ω
VEE
R15120Ω
SW3
SW DIP-8SW2
SW DIP-8SW2
SW DIP-8
VLOGIC
R3410k
R3510k
R3610k
R3710k
R3810k
R3910k
R4010k
R4110k
R4210k
R4310k
R4410k
R4510k
R4610k
R4610k
R4310k
M3M2M1M0
FSEL_C2FSEL_C1FSEL_C0FSEL_B2FSEL_B1FSEL_B0B_LOGIC
FSEL_A2FSEL_A1FSEL_A0XVCOXVCOB
VCC_B2VCCA
VEE
FSEL_C0
FSEL_C1
FSEL_C2
FSEL_B0
B_LOGIC
FSEL_B1
FSEL_B2
VCC_B1
FSEL_A2
FSEL_A1
FSEL_A0
M3
M2
M1
M0
VLOGIC
VCCA
VEE
OUT_SYNCSMA
C340.1µF
C3522µF
J4
1
VEE
C330.01µF
C430.1µF
J7
VEE_GND
1
VEE
C420.01µF
C540.01µF
VCCA
VCCAVLOGIC
VLOGIC
VCC_A
VCC_A
VCC_B2 VCC_B1
VCC_B
VCC_C
VCC_C
J12
GND
1
Layer Definitions:Layer 1: Single Zo = 50ΩLayer 2: Impedance GNDLayer 3: VCCA/VLOGIC
Layer 4: VCC_A/VCC_B/VCC_C
Layer 5: VEE
Layer 6: Single Zo = 50Ω/GND
C4422µF
Chip Analog Ground
Notes:1. Banks A to C configured as LVPECL2. Set B_LOGIC = 03. Set XVCO = 04. Set XVCOB = 15. VCCA, VCC_A, VCC_B, VCC_C, VLOGIC = 3.3V6. VEE_GND, GND = 0V
XVCO
XVCOB
VEE
R8120Ω
C90.01µF
C50.01µF
R4120ΩVEE
Figure 10. SY89532L Schematic
13
SY89531/2/3/4/5/6L Evaluation BoardMicrel
49
46
45
44
39
38
37
36
35
34
33
12
13
14
15
16
11
10
TESTC
TESTB
TESTA
VCO_SEL
XVCCB
XVCO
LFLT
/LFLT
GND1
XTAL2
XTAL1
VBB_REF
M3
M2M1
M0
TES
TQ
1
2
U1 SY89533LG
ND
3
VC
CA
VC
C_L
2
VC
C_L
1
OU
T_S
YN
C
FSE
L_A
0
FSE
L_A
1
FSE
L_A
2
VC
C_A /A
0
A0
/A1
A1
VC
CO
_B3
/B0
C1
/C1
C0
/C0
VC
CO
_C
FSE
L_C
2
FSE
L_C
1
FSE
L_C
0
GN
D2
FSE
L_B
2
FSE
L_B
1
FSE
L_B
0
B_L
OG
IC
VC
CO
_B1
VC
CO
_B2
B8
B0
/B1
B1
/B2
B2
/B3
B3
/B4
B4
/B5
B5
/B6
B6
/B7
B7
/B8
3
4
5
6
7
8
9
48
47
43
42
41
40
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50
C10.2µF
C247pFR15
330Ω
Y116MHz
VEE
R10120Ω
R6120Ω
VEEC70.01µF
C560.01µF
VEE
VCC_C
VEE
S15SMA
S11SMA
C370.1µF
C3822µF
J5
1
VEE
C360.01µF
C400.1µF
C4122µF
J6
1
VEE
C390.01µF
C470.1µF
C4822µF
J8
1
VEE
C460.01µF
C520.1µF
C5322µF
J11
1
VEE
C510.01µF
C450.01µF
C250.01µF
S29SMA
C210.01µF
S25SMA
C160.01µF
S20SMA
C200.01µF
S24SMA
SW3
SW DIP-8SW2
SW DIP-8SW2
SW DIP-8
VLOGIC
R3410k
R3510k
R3610k
R3710k
R3810k
R3910k
R4010k
R4110k
R4210k
R4310k
R4410k
R4510k
R4610k
R4610k
R4310k
M3M2M1M0
FSEL_C2FSEL_C1FSEL_C0FSEL_B2FSEL_B1FSEL_B0B_LOGIC
FSEL_A2FSEL_A1FSEL_A0XVCOXVCOB
VCC_B2VCCA
FSEL_C0
FSEL_C1
FSEL_C2
FSEL_B0
B_LOGIC
FSEL_B1
FSEL_B2
VCC_B1
FSEL_A2
FSEL_A1
FSEL_A0
M3
M2
M1
M0
VLOGIC
VCCA
VEE
OUT_SYNCSMA
C340.1µF
C3522µF
J4
1
VEE
C330.01µF
C430.1µF
J7
VEE_GND
1
VEE
C420.01µF
C540.01µF
VCCA
VCCAVLOGIC
VLOGIC
VCC_A
VCC_A
VCC_B2 VCC_B1
VCC_B
VCC_C
VCC_C
J12
GND
1
Layer Definitions:Layer 1: Single Zo = 50ΩLayer 2: Impedance GNDLayer 3: VCCA/VLOGIC
Layer 4: VCC_A/VCC_B/VCC_C
Layer 5: VEE
Layer 6: Single Zo = 50Ω/GND
C4422µF
Chip Analog Ground
Notes:1. Banks A and C are LVPECL, Bank B is LVDS2. Set B_LOGIC = 03. Set XVCO = 04. Set XVCOB = 15. VCCA, VCC_A, VCC_B, VCC_C, VLOGIC = 3.3V6. VEE_GND, GND = 0V
XVCO
XVCOB
R51100Ω
R52100Ω
R53100Ω
R54100Ω
R55100Ω
R56100Ω
R57100Ω
VEE
R8120Ω
C90.01µF
C50.01µF
S9SMA
S13SMA
R4120ΩVEE
Figure 11. SY89533L Schematic
14
SY89531/2/3/4/5/6L Evaluation BoardMicrel
49
46
45
44
39
38
37
36
35
34
33
12
13
14
15
16
11
10
TESTC
TESTB
TESTA
VCO_SEL
XVCCB
XVCO
LFLT
/LFLT
GND1
XTAL2
XTAL1
VBB_REF
M3
M2M1
M0
TES
TQ
1
2
U1 SY89534L
GN
D3
VC
CA
VC
C_L
2
VC
C_L
1
OU
T_S
YN
C
FSE
L_A
0
FSE
L_A
1
FSE
L_A
2
VC
C_A /A
0
A0
/A1
A1
VC
CO
_B3
/B0
C1
/C1
C0
/C0
VC
CO
_C
FSE
L_C
2
FSE
L_C
1
FSE
L_C
0
GN
D2
FSE
L_B
2
FSE
L_B
1
FSE
L_B
0
B_L
OG
IC
VC
CO
_B1
VC
CO
_B2
B8
B0
/B1
B1
/B2
B2
/B3
B3
/B4
B4
/B5
B5
/B6
B6
/B7
B7
/B8
3
4
5
6
7
8
9
48
47
43
42
41
40
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50
C10.2µF
C247pFR19
330Ω
VEE
R10120Ω
R6120Ω
VEEC70.01µF
C560.01µF
VEE
VCC_C
VEE
S15SMA
S11SMA
C370.1µF
C3822µF
J5
1
VEE
C360.01µF
C400.1µF
C4122µF
J6
1
VEE
C390.01µF
C470.1µF
C4822µF
J8
1
VEE
C460.01µF
C450.01µF
VEE
R24120Ω
C250.01µF
S29SMA
VEE
R20120Ω
C210.01µF
S25SMA
C160.01µF
S20SMA
C200.01µF
S24SMA
VEE
R19120Ω
VEE
R15120Ω
SW3
SW DIP-8SW2
SW DIP-8SW2
SW DIP-8
VLOGIC
R3410k
R3510k
R3610k
R3710k
R3810k
R3910k
R4010k
R4110k
R4210k
R4310k
R4410k
R4510k
R4610k
R4610k
R4310k
M3M2M1M0
FSEL_C2FSEL_C1FSEL_C0FSEL_B2FSEL_B1FSEL_B0B_LOGIC
FSEL_A2FSEL_A1FSEL_A0XVCOXVCOB
VCC_B2VCCA
FSEL_C0
FSEL_C1
FSEL_C2
FSEL_B0
B_LOGIC
FSEL_B1
FSEL_B2
VCC_B1
FSEL_A2
FSEL_A1
FSEL_A0
M3
M2
M1
M0
VLOGIC
VCCA
VEE
OUT_SYNCSMA
C340.1µF
C3522µF
J4
1
VEE
C330.01µF
C430.1µF
J7
VEE_GND
1
VEE
C420.01µF
C540.01µF
VCCA
VCCAVLOGIC
VLOGIC
VCC_A
VCC_A
VCC_B2 VCC_B1
VCC_B
J12
GND
1
Layer Definitions:Layer 1: Single Zo = 50ΩLayer 2: Impedance GNDLayer 3: VCCA/VLOGIC
Layer 4: VCC_A/VCC_B/VCC_C
Layer 5: VEE
Layer 6: Single Zo = 50Ω/GND
C4422µF
Chip Analog Ground
Notes:1. Banks A and C are LVPECL, Bank B is LVDS2. Set B_LOGIC = 03. Set XVCO = 04. Set XVCOB = 15. VCCA, VCC_A, VCC_B, VCC_C, VLOGIC = 3.3V6. VEE_GND, GND = 0V
XVCO
XVCOB
C520.1µF
C5322µF
J11
1
VEE
C510.01µF
VCC_C
VCC_C
S7SMA R24
50Ω
S5SMA
R1550Ω
VEE
R8120Ω
C90.01µF
C50.01µF
S9SMA
S13SMA
R4120ΩVEE
Figure 12. SY89534L Schematic
15
SY89531/2/3/4/5/6L Evaluation BoardMicrel
49
46
45
44
39
38
37
36
35
34
33
12
13
14
15
16
11
10
TESTC
TESTB
TESTA
VCO_SEL
XVCCB
XVCO
LFLT
/LFLT
GND1
XTAL2
XTAL1
VBB_REF
M3
M2M1
M0
TES
TQ
1
2
U1 SY89535L
GN
D3
VC
CA
VC
C_L
2
VC
C_L
1
OU
T_S
YN
C
FSE
L_A
0
FSE
L_A
1
FSE
L_A
2
VC
C_A /A
0
A0
/A1
A1
VC
CO
_B3
/B0
C1
/C1
C0
/C0
VC
CO
_C
FSE
L_C
2
FSE
L_C
1
FSE
L_C
0
GN
D2
FSE
L_B
2
FSE
L_B
1
FSE
L_B
0
B_L
OG
IC
VC
CO
_B1
VC
CO
_B2
B8
B0
/B1
B1
/B2
B2
/B3
B3
/B4
B4
/B5
B5
/B6
B6
/B7
B7
/B8
3
4
5
6
7
8
9
48
47
43
42
41
40
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50
C10.2µF
C247pFR15
330Ω
VEE
R10120Ω
R6120Ω
VEEC70.01µF
C560.01µF
VCC_C
VEE
S15SMA
S11SMA
C370.1µF
C3822µF
J5
1
VEE
C360.01µF
C400.1µF
C4122µF
J6
1
VEE
C390.01µF
C470.1µF
C4822µF
J8
1
VEE
C460.01µF
C520.1µF
C5322µF
J11
1
VEE
C510.01µF
C450.01µF
C250.01µF
S29SMA
C210.01µF
S25SMA
C160.01µF
S20SMA
C200.01µF
S24SMA
SW3
SW DIP-8SW2
SW DIP-8SW2
SW DIP-8
VLOGIC
R3410k
R3510k
R3610k
R3710k
R3810k
R3910k
R4010k
R4110k
R4210k
R4310k
R4410k
R4510k
R4610k
R4610k
R4310k
M3M2M1M0
FSEL_C2FSEL_C1FSEL_C0FSEL_B2FSEL_B1FSEL_B0B_LOGIC
FSEL_A2FSEL_A1FSEL_A0XVCOXVCOB
VCC_B2VCCA
FSEL_C0
FSEL_C1
FSEL_C2
FSEL_B0
B_LOGIC
FSEL_B1
FSEL_B2
VCC_B1
FSEL_A2
FSEL_A1
FSEL_A0
M3
M2
M1
M0
VLOGIC
VCCA
VEE
OUT_SYNCSMA
C340.1µF
C3522µF
J4
1
VEE
C330.01µF
C430.1µF
J7
VEE_GND
1
VEE
C420.01µF
C540.01µF
VCCA
VCCA
VLOGIC
VLOGIC
VCC_A
VCC_A
VCC_B2 VCC_B1
VCC_B
VCC_C
VCC_C
J12
GND
1
Layer Definitions:Layer 1: Single Zo = 50ΩLayer 2: Impedance GNDLayer 3: VCCA/VLOGIC
Layer 4: VCC_A/VCC_B/VCC_C
Layer 5: VEE
Layer 6: Single Zo = 50Ω/GND
C4422µF
Chip Analog Ground
Notes:1. Banks A and C are LVPECL, Bank B is LVDS2. Set B_LOGIC = 03. Set XVCO = 04. Set XVCOB = 15. VCCA, VCC_A, VCC_B, VCC_C, VLOGIC = 3.3V6. VEE_GND, GND = 0V
XVCO
XVCOB
R51100Ω
R52100Ω
R53100Ω
R54100Ω
R55100Ω
R56100Ω
R57100Ω
VEE
S7SMA R24
50Ω
S5SMA
R1550Ω
VEE
R8120Ω
C90.01µF
C50.01µF
S9SMA
S13SMA
R4120ΩVEE
Figure 13. SY89535L Schematic
16
SY89531/2/3/4/5/6L Evaluation BoardMicrel
49
46
45
44
39
38
37
36
35
34
33
12
13
14
15
16
11
10
TESTC
TESTB
TESTA
VCO_SEL
XVCCB
XVCO
LFLT
/LFLT
GND1
XTAL2
XTAL1
VBB_REF
M3
M2M1
M0
TES
TQ
1
2
U1 SY89536LG
ND
3
VC
CA
VC
C_L
2
VC
C_L
1
OU
T_S
YN
C
FSE
L_A
0
FSE
L_A
1
FSE
L_A
2
VC
C_A /A
0
A0
/A1
A1
VC
CO
_B3
/B0
C1
/C1
C0
/C0
VC
CO
_C
FSE
L_C
2
FSE
L_C
1
FSE
L_C
0
GN
D2
FSE
L_B
2
FSE
L_B
1
FSE
L_B
0
B_L
OG
IC
VC
CO
_B1
VC
CO
_B2
B8
B0
/B1
B1
/B2
B2
/B3
B3
/B4
B4
/B5
B5
/B6
B6
/B7
B7
/B8
3
4
5
6
7
8
9
48
47
43
42
41
40
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50
C10.2µF
C247pFR19
330Ω
VEE
R10120Ω
R6120Ω
VEEC70.01µF
C560.01µF
VEE
VCC_C
VEE
S15SMA
S11SMA
C370.1µF
C3822µF
J5
1
VEE
C360.01µF
C400.1µF
C4122µF
J6
1
VEE
C390.01µF
C470.1µF
C4822µF
J8
1
VEE
C460.01µF
C450.01µF
S29SMA
S25SMA
S20SMA
S24SMA
SW3
SW DIP-8SW2
SW DIP-8SW2
SW DIP-8
VLOGIC
R3410k
R3510k
R3610k
R3710k
R3810k
R3910k
R4010k
R4110k
R4210k
R4310k
R4410k
R4510k
R4610k
R4610k
R4310k
M3M2M1M0
FSEL_C2FSEL_C1FSEL_C0FSEL_B2FSEL_B1FSEL_B0B_LOGIC
FSEL_A2FSEL_A1FSEL_A0XVCOXVCOB
VCC_B2VCCA
FSEL_C0
FSEL_C1
FSEL_C2
FSEL_B0
B_LOGIC
FSEL_B1
FSEL_B2
VCC_B1
FSEL_A2
FSEL_A1
FSEL_A0
M3
M2
M1
M0
VLOGIC
VCCA
VEE
OUT_SYNCSMA
C340.1µF
C3522µF
J4
1
VEE
C330.01µF
C430.1µF
J7
VEE_GND
1
VEE
C420.01µF
C540.01µF
VCCA
VCCAVLOGIC
VLOGIC
VCC_A
VCC_A
VCC_B2 VCC_B1
VCC_B
J12
GND
1
Layer Definitions:Layer 1: Single Zo = 50ΩLayer 2: Impedance GNDLayer 3: VCCA/VLOGIC
Layer 4: VCC_A/VCC_B/VCC_C
Layer 5: VEE
Layer 6: Single Zo = 50Ω/GND
C4422µF
Chip Analog Ground
Notes:1. Banks A and C are LVPECL, Bank B is LVDS2. Set B_LOGIC = 03. Set XVCO = 04. Set XVCOB = 15. VCCA, VCC_A, VCC_B, VCC_C, VLOGIC = 3.3V6. VEE_GND, GND = 0V
XVCO
XVCOB
C520.1µF
C5322µF
J11
1
VEE
C510.01µF
VCC_C
VCC_C
S7SMA R24
50Ω
S5SMA
R1550Ω
VEE
R8120Ω
C90.01µF
C50.01µF
S9SMA
S13SMA
R4120ΩVEE
Figure 14. SY89536L Schematic
17
SY89531/2/3/4/5/6L Evaluation BoardMicrel
SY89531LItem Part Number Manufacturer Description Qty.
C1 PCC1749CT-ND Panasonic/Digi-Key(1) 0.2µF, 50V, Capacitor, Size 0603 1
C2 PCC470ACVCT-ND Panasonic/Digi-Key(1) 47pF, 50V, Capacitor, Size 0603 1
C5, C7, C9, C33, PCCIC3CQCT-ND Panasonic/Digi-Key(1) 0.01µF, 50V Capacitor, Size 0402 12C36, C39, C42, C45,C46, C51, C54, C56
C34, C37, C40, PCC104BCT-ND Panasonic/Digi-Key(1) 0.1µF, 50V Capacitor, Size 1206 6C43, C47, C52
C35, C38, C41, PCT3226CT-ND Panasonic/Digi-Key(1) 22µF, 35V, Tantalum, D-Size 6C44, C48, C53
J4, J5, J6, J7 111-0703-001-ND Johnson/Digi-Key(2) Banana Jack 7J8, J11, J12
R3 P332HCT-ND Panasonic/Digi-Key(1) 330Ω Resistor, Size 0603 1
R4, R6, R8, R10 P121HCT-ND Panasonic/Digi-Key(1) 120Ω Resistor, Size 0402 4
R33, R34, R35, R36 P100KHCT-ND Panasonic/Digi-Key(1) 10k Resistor, Size 0602 14R37, R38, R39, R40,R41, R42, R43, R44,R45, R46
S9, S11, S13, S15, 142-0701-851-ND Johnson/Digi-Key(2) SMA 9S20, S24, S25, S29,OUT_SYNC
SW2, SW3, SW4 CT2188LPST-ND CTS/Digi-Key(3) DIP-8 3
U1 SY89531L Micrel Semiconductor(4) 3.3V Programmable LVPECL and HSTL 1Bus Clock Synthesizer
Y1 16.6 AS-SMD Raltron(5) 16MHz 1
Note 1. Panasonic tel: 847-468-5624
Note 2. Johnson Components tel: 800-247-8256
Note 3. CTS tel: 574-293-7511
Note 4. Micrel Semiconductor tel: 408-944-0800
Note 5. Raltron tel: 305-593-6033
BILL OF MATERIALS
18
SY89531/2/3/4/5/6L Evaluation BoardMicrel
SY89532LItem Part Number Manufacturer Description Qty.
C1 PCC1749CT-ND Panasonic/Digi-Key(1) 0.2µF, 50V, Capacitor, Size 0603 1
C2 PCC470ACVCT-ND Panasonic/Digi-Key(1) 47pF, 50V, Capacitor, Size 0603 1
C5, C7, C9, C16, PCCIC3CQCT-ND Panasonic/Digi-Key(1) 0.01µF, 50V Capacitor, Size 0402 16C20, C21, C25, C33C36, C39, C42, C45,C46, C51, C54, C56
C34, C37, C40, PCC104BCT-ND Panasonic/Digi-Key(1) 0.1µF, 50V Capacitor, Size 1206 6C43, C47, C52
C35, C38, C41, PCT3226CT-ND Panasonic/Digi-Key(1) 22µF, 35V, Tantalum, D-Size 6C44, C48, C53
J4, J5, J6, J7 111-0703-001-ND Johnson/Digi-Key(2) Banana Jack 7J8, J11, J12
R3 P332HCT-ND Panasonic/Digi-Key(1) 330Ω Resistor, Size 0603 1
R4, R6, R8, R10 P121HCT-ND Panasonic/Digi-Key(1) 120Ω Resistor, Size 0402 8R15, R19, R20, R24
R33, R34, R35, R36 P100KHCT-ND Panasonic/Digi-Key(1) 10k Resistor, Size 0602 14R37, R38, R39, R40,R41, R42, R43, R44,R45, R46
S9, S11, S13, S15, 142-0701-851-ND Johnson/Digi-Key(2) SMA 9S20, S24, S25, S29,OUT_SYNC
SW2, SW3, SW4 CT2188LPST-ND CTS/Digi-Key(3) DIP-8 3
U1 SY89532L Micrel Semiconductor(4) 3.3V Programmable LVPECL and LVDS 1Bus Clock Synthesizer
Y1 16.6 AS-SMD Raltron(5) 16MHz 1
Note 1. Panasonic tel: 847-468-5624
Note 2. Johnson Components tel: 800-247-8256
Note 3. CTS tel: 574-293-7511
Note 4. Micrel Semiconductor tel: 408-944-0800
Note 5. Raltron tel: 305-593-6033
19
SY89531/2/3/4/5/6L Evaluation BoardMicrel
SY89533LItem Part Number Manufacturer Description Qty.
C1 PCC1749CT-ND Panasonic/Digi-Key(1) 0.2µF, 50V, Capacitor, Size 0603 1
C2 PCC470ACVCT-ND Panasonic/Digi-Key(1) 47pF, 50V, Capacitor, Size 0603 1
C5, C7, C9, C16, PCCIC3CQCT-ND Panasonic/Digi-Key(1) 0.01µF, 50V Capacitor, Size 0402 16C20, C21, C25, C33C36, C39, C42, C45,C46, C51, C54, C56
C34, C37, C40, PCC104BCT-ND Panasonic/Digi-Key(1) 0.1µF, 50V Capacitor, Size 1206 6C43, C47, C52
C35, C38, C41, PCT3226CT-ND Panasonic/Digi-Key(1) 22µF, 35V, Tantalum, D-Size 6C44, C48, C53
J4, J5, J6, J7 111-0703-001-ND Johnson/Digi-Key(2) Banana Jack 7J8, J11, J12
R3 P332HCT-ND Panasonic/Digi-Key(1) 330Ω Resistor, Size 0603 1
R4, R6, R8, R10, P121HCT-ND Panasonic/Digi-Key(1) 120Ω Resistor, Size 0402 8R15, R19, R20, R24
R33, R34, R35, R36 P10.0KHCT-ND Panasonic/Digi-Key(1) 10k Resistor, Size 0602 14R37, R38, R39, R40,R41, R42, R43, R44,R45, R46
R51, R52, R53, R54 P100HCT-ND Panasonic/Digi-Key(1) 100Ω Resistor, Size 0402R55, R56, R57
S9, S11, S13, S15, 142-0701-851-ND Johnson/Digi-Key(2) SMA 9S20, S24, S25, S29,OUT_SYNC
SW2, SW3, SW4 CT2188LPST-ND CTS/Digi-Key(3) DIP-8 3
U1 SY89533L Micrel Semiconductor(4) 3.3V Programmable LVPECL and LVDS 1Bus Clock Synthesizer
Y1 16.6 AS-SMD Raltron(5) 16MHz 1
Note 1. Panasonic tel: 847-468-5624
Note 2. Johnson Components tel: 800-247-8256
Note 3. CTS tel: 574-293-7511
Note 4. Micrel Semiconductor tel: 408-944-0800
Note 5. Raltron tel: 305-593-6033
20
SY89531/2/3/4/5/6L Evaluation BoardMicrel
SY89534LItem Part Number Manufacturer Description Qty.
C1 PCC1749CT-ND Panasonic/Digi-Key(1) 0.2µF, 50V, Capacitor, Size 0603 1
C2 PCC470ACVCT-ND Panasonic/Digi-Key(1) 47pF, 50V, Capacitor, Size 0603 1
C5, C7, C9, C16, PCCIC3CQCT-ND Panasonic/Digi-Key(1) 0.01µF, 50V Capacitor, Size 0402 16C20, C21, C25, C33C36, C39, C42, C45,C46, C51, C54, C56
C34, C37, C40, PCC104BCT-ND Panasonic/Digi-Key(1) 0.1µF, 50V Capacitor, Size 1206 6C43, C47, C52
C35, C38, C41, PCT3226CT-ND Panasonic/Digi-Key(1) 22µF, 35V, Tantalum, D-Size 6C44, C48, C53
J4, J5, J6, J7 111-0703-001-ND Johnson/Digi-Key(2) Banana Jack 7J8, J11, J12
R3 P332HCT-ND Panasonic/Digi-Key(1) 330Ω Resistor, Size 0603 1
R4, R6, R8, R10, P121HCT-ND Panasonic/Digi-Key(1) 120Ω Resistor, Size 0402 8R15, R19, R20, R24
R15, R24 P51.1LCT-ND Panasonic/Digi-Key(1) 50Ω Resistor, Size 0402 2
R33, R34, R35, R36 P10.0KHCT-ND Panasonic/Digi-Key(1) 10k Resistor, Size 0602 14R37, R38, R39, R40,R41, R42, R43, R44,R45, R46
R51, R52, R53, R54 P100HCT-ND Panasonic/Digi-Key(1) 100Ω Resistor, Size 0402R55, R56, R57
S5, S9, S9, S11, S13, 142-0701-851-ND Johnson/Digi-Key(2) SMA 11S15, S20, S24, S25,S29, OUT_SYNC
SW2, SW3, SW4 CT2188LPST-ND CTS/Digi-Key(3) DIP-8 3
U1 SY89534L Micrel Semiconductor(4) 3.3V Programmable LVPECL and LVDS 1Bus Clock Synthesizer
Y1 16.6 AS-SMD Raltron(5) 16MHz 1
Note 1. Panasonic tel: 847-468-5624
Note 2. Johnson Components tel: 800-247-8256
Note 3. CTS tel: 574-293-7511
Note 4. Micrel Semiconductor tel: 408-944-0800
Note 5. Raltron tel: 305-593-6033
21
SY89531/2/3/4/5/6L Evaluation BoardMicrel
SY89535LItem Part Number Manufacturer Description Qty.
C1 PCC1749CT-ND Panasonic/Digi-Key(1) 0.2µF, 50V, Capacitor, Size 0603 1
C2 PCC470ACVCT-ND Panasonic/Digi-Key(1) 47pF, 50V, Capacitor, Size 0603 1
C5, C7, C9, C16, PCCIC3CQCT-ND Panasonic/Digi-Key(1) 0.01µF, 50V Capacitor, Size 0402 16C20, C21, C25, C33C36, C39, C42, C45,C46, C51, C54, C56
C34, C37, C40, PCC104BCT-ND Panasonic/Digi-Key(1) 0.1µF, 50V Capacitor, Size 1206 6C43, C47, C52
C35, C38, C41, PCT3226CT-ND Panasonic/Digi-Key(1) 22µF, 35V, Tantalum, D-Size 6C44, C48, C53
J4, J5, J6, J7 111-0703-001-ND Johnson/Digi-Key(2) Banana Jack 7J8, J11, J12
R3 P332HCT-ND Panasonic/Digi-Key(1) 330Ω Resistor, Size 0603 1
R4, R6, R8, R10, P121HCT-ND Panasonic/Digi-Key(1) 120Ω Resistor, Size 0402 4
R15, R24 P51.1LCT-ND Panasonic/Digi-Key(1) 50Ω Resistor, Size 0402 2
R33, R34, R35, R36 P10.0HCT-ND Panasonic/Digi-Key(1) 10k Resistor, Size 0602 14R37, R38, R39, R40,R41, R42, R43, R44,R45, R46
R51, R52, R53, R54 P100HCT-ND Panasonic/Digi-Key(1) 100Ω Resistor, Size 0402 7R55, R56, R57
S5, S7, S9, S11, S13, 142-0701-851-ND Johnson/Digi-Key(2) SMA 11S15, S20, S24, S25,S29, OUT_SYNC
SW2, SW3, SW4 CT2188LPST-ND CTS/Digi-Key(3) DIP-8 3
U1 SY89535L Micrel Semiconductor(4) 3.3V Programmable LVPECL and LVDS 1Bus Clock Synthesizer
Y1 16.6 AS-SMD Raltron(5) 16MHz 1
Note 1. Panasonic tel: 847-468-5624
Note 2. Johnson Components tel: 800-247-8256
Note 3. CTS tel: 574-293-7511
Note 4. Micrel Semiconductor tel: 408-944-0800
Note 5. Raltron tel: 305-593-6033
22
SY89531/2/3/4/5/6L Evaluation BoardMicrel
SY89536LItem Part Number Manufacturer Description Qty.
C1 PCC1749CT-ND Panasonic/Digi-Key(1) 0.2µF, 50V, Capacitor, Size 0603 1
C2 PCC470ACVCT-ND Panasonic/Digi-Key(1) 47pF, 50V, Capacitor, Size 0603 1
C5, C7, C9, C33, PCCIC3CQCT-ND Panasonic/Digi-Key(1) 0.01µF, 50V Capacitor, Size 0402 12C36, C39, C42, C45,C46, C51, C54, C56
C34, C37, C40, PCC104BCT-ND Panasonic/Digi-Key(1) 0.1µF, 50V Capacitor, Size 1206 6C43, C47, C52
C35, C38, C41, PCT3226CT-ND Panasonic/Digi-Key(1) 22µF, 35V, Tantalum, D-Size 6C44, C48, C53
J4, J5, J6, J7 111-0703-001-ND Johnson/Digi-Key(2) Banana Jack 7J8, J11, J12
R3 P332HCT-ND Panasonic/Digi-Key(1) 330Ω Resistor, Size 0603 1
R4, R6, R8, R10, P121HCT-ND Panasonic/Digi-Key(1) 120Ω Resistor, Size 0402 4
R33, R34, R35, R36 P10.0KHCT-ND Panasonic/Digi-Key(1) 10k Resistor, Size 0602 14R37, R38, R39, R40,R41, R42, R43, R44,R45, R46
R51, R52, R53, R54 P100HCT-ND Panasonic/Digi-Key(1) 100Ω Resistor, Size 0402R55, R56, R57
S5, S9, S9, S11, S13, 142-0701-851-ND Johnson/Digi-Key(2) SMA 11S15, S20, S24, S25,S29, OUT_SYNC
SW2, SW3, SW4 CT2188LPST-ND CTS/Digi-Key(3) DIP-8 3
U1 SY89536L Micrel Semiconductor(4) 3.3V Programmable LVPECL and HSTL 1Bus Clock Synthesizer
Y1 16.6 AS-SMD Raltron(5) 16MHz 1
Note 1. Panasonic tel: 847-468-5624
Note 2. Johnson Components tel: 800-247-8256
Note 3. CTS tel: 574-293-7511
Note 4. Micrel Semiconductor tel: 408-944-0800
Note 5. Raltron tel: 305-593-6033
MICREL, INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131 USATEL + 1 (408) 944-0800 FAX + 1 (408) 944-0970 WEB http://www.micrel.com
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product canreasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant intothe body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’suse or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify
Micrel for any damages resulting from such use or sale.
© 2003 Micrel, Incorporated.
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