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Abstract-The multilevel inverter (MLI) has gained much atten-tion in recent years due to its advantages in high power with low harmonics applications[8]. The general function of the mul-tilevel inverter is to synthesize a desired high voltage from sev-eral levels of dc voltages that can be batteries, fuel cells, etc. This paper presents a hybrid cascaded five level inverter. Among various modulation techniques, the Hybrid PWM tech-nique is developed to reduce switching losses. The proposed topology can reduce the number of required power switches compared to a traditional cascaded multilevel inverter. To de-velop the model of a hybrid multilevel inverter, a simulation is done based on MATLAB/SIMULINK software. Their integra-tion makes the design and analysis of a hybrid multilevel invert-er more complete and detailed.

I.INTRODUCTION Recently multilevel power conversion has been applied for high voltage and high power application such as flexible AC transmission system (FACTS) devices and AC motor drives[3]. A multilevel inverter has four main advantages over the conventional bipolar inverter[6]. First, the voltage stress on each switch is decreased due to series connection of the switches. Therefore, the rated voltage and consequently the total power of the inverter could be safely increased. Second, the rate of change of voltage (dv/dt) is decreased due to the lower voltage swing of each switching cycle. Third, harmonic distortion is reduced due to more output levels. Forth, lower acoustic noise and electromagnetic interference (EMI) is obtained. In general each H-bridge cell requires an isolated DC sources. The number of DC sources is relation with the number of voltage levels and the number of phases of the converter. A single-phase five-level cascaded inverter requires six separate DC voltage sources. This paper proposes a topology to minimize the number of separate DC sources to reduce the com-plexity of the inverter. By using the proposed method, the required DC sources are only dependent on the number of voltage levels and independent of the num-ber of phases of the converter. By sharing the same DC voltage sources, the synthesized voltage can be bal-anced easily. There are several well known pulse width modulation (PWM) methods. We concentrate only in HPWM to-pology in this paper. The advantage of this topology are :[9]

1.To reduce line current ripple. 2.To reduce inverter switching losses. 3.To regulate ac voltage and frequency. 4. To improve the efficiency of the system. Section II deals with the basic operation of multilevel inverter. Section III discusses about the operation of Hybrid PWM technique. Section IV focuses on the simulation results using matlab. Section V deals with the conclusions.

II.BASIC OPERATION OF MULTILEVEL INVERTER

Multilevel inverters have gained much attention in the field of the medium voltage and high power applica-tions because of their many advantages, such as their low voltage stress on power switches, low harmonic and EMI output. The major advantages of using multi-level inverters are: [7] 1.high voltage capability with voltage limited devices. 2.low harmonic distortion. 3.reduced switching losses. 4.increased efficiency. 5.good electromagnetic compatibility. A simplified single phase topology is shown in Fig. 1. The output voltage v1 of the bottom inverter (H2) is either +0.5Vdc (Sa5 closed) or −0.5Vdc (Sa6 closed). This bridge H2 is connected in series with a full H-bridge (H1) which is supplied by a capacitor voltage. If the capacitor is kept charged to 0.5Vdc, then the output voltage of the H-bridge (H1) is +0.5Vdc (Sa1, Sa4 closed), 0 (Sa1, Sa2 closed or Sa3, Sa4 closed), or −0.5Vdc (Sa2,Sa3 closed). When the output voltage v = v1 + v2 is required to be zero, we can either set v1 = +0.5Vdc and v2 = −0.5Vdc or v1 = −0.5Vdc and v2 = +0.5Vdc.

If Sa1, Sa4 are closed ( v2 = +0.5Vdc) along with Sa6 closed (v1 = −0.5Vdc), then the capacitor is discharging and v = v1 + v2 = 0. On the other hand, if Sa2, Sa3 are closed (v2 = −0.5Vdc) and Sa5 is also closed (v1 = +0.5Vdc), then the capacitor is charging and v = v1+v2 = 0. The case i < 0 is accomplished by simply reversing the switch positions of the i > 0 case for charging and discharging of the capacitor. During the periods of zero

International Journal of Systems , Algorithms &

Applications IIII JJJJ SSSS AAAA AAAA

SIMULATION OF CASCADED MULTILEVEL INVERTER USING HYBRID PWM TECHNIQUE

C.Kiruthika1,T.Ambika2,Dr.R.Seyezhai3

1,2Student EEE Department

3Associate Professor, EEE Department

SSN College of Engineering, Kalavakkam, Chennai - 603110.

Volume 1, Issue 1, December 2011 18

output voltage, either the switches Sa1, Sa4, and Sa6 are closed or the switches Sa2, Sa3, Sa5 are closed depending on whether it is necessary to charge or discharge the ca-pacitor. [1]

Fig 1. Single phase cascaded five level inverter.

Table 1.Switching Strategy

III.HYBRID PWM FOR CASCADED FIVE LEVEL INVERTER

In PWM technique pulses of unequal widths are generat-ed. The pulse is generated by comparing a sinusoidal wave (modulating signal) of frequency 50HZ against a triangular wave (carrier signal) is shown in Fig.2. Each comparison gives one if the modulating signal is greater than the triangular carrier else zero. The number of puls-es per cycle is decided by the ratio of the triangular car-rier frequency to that of the modulating sinusoidal fre-quency[4]. PWM is categorized into various types among which the technique employed in this paper is sinusoidal pulse width modulation(SPWM) because it reduces harmonic content.

Fig.2 Generation of pulses using SPWM.

From the Fig.1 the main inverter refers to H2 bridge and the auxiliary inverter refers to H1 bridge. Since the low switching losses during PWM operation is required, the main inverter will operate only at square wave mode and auxiliary inverter will operate at PWM mode as depicted in Fig. 3. In practical, if a single chip is used to generate the PWM signals, it normally has only one carrier signal with six PWM channels; nevertheless, the hybrid multi level inverter requires 12 PWM channels for both main and auxiliary inverter. Thereafter, the reference signal of sinusoidal PWM (SPWM) used for the auxiliary inverter is modified by using equation (1)-(4). The multiplexing signals from (3) and (4) are used to fabricate PWM sig-nal by using logic diagram as shown in Fig.3 and Ta-ble.2 [2]. The gating pattern of all switches are shown in Fig.4a to Fig.4f.

(1)

(2)

(3)

(4)

Where

Voltage S1 S2 S3 S4 S5 S6

-Vdc

0 1 1 0 0 1

-0.5Vdc 0 1 1 0 0 0

0 1 0 0 1 0 1

0 0 1 1 0 1 0

0.5Vdc 1 0 0 1 0 0

Vdc 1 0 0 1 1 0

0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02-100

-50

0

50

100

Time (sec)

Am

plitu

de (

volts

)

0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02-3

-2

-1

0

1

2

3

Time (sec)

Am

plitu

de (

volts

)




SIMULATIONOFCASCADEDMULTILEVELINVERTERUSINGHYBRID

PWMTECHNIQUE

f(t) is a reference signal, Ma is modulation index(0.0/1.0-1.0/1.0) A1 is a multiplexing index #1, A2 is a multiplexing index #2,

is a pulse width of PWM (0.0-1.0).

Fig.3 Logic diagram for converter control signal.

Table.2 Generation of PWM Signal for proposed five level inverter

Fig.4a.Gating pattern of Switch 1 (Sa1)

Fig.4b.Gating pattern of Switch 2 (Sa2)

Fig.4c.Gating pattern of Switch 3 (Sa3)

Fig.4d.Gating pattern of Switch 4 (Sa4)

Fig.4e.Gating pattern of Switch 5 (Sa5)

Fig.4f.Gating pattern of Switch 6 (Sa6)

Sn Hybrid PWM mixing operator

Sa1

Sa2

Sa3

Sa4

Sa5

Sa6

0 0.005 0.01 0.015 0.02-3

-2

-1

0

1

2

3

Time (sec)

ampl

itude

(vo

lts)

0 0.005 0.01 0.015 0.02-3

-2

-1

0

1

2

3

Time (sec)

Am

plitu

de (

volts

)0 0.005 0.01 0.015 0.02

-3

-2

-1

0

1

2

3

Time (sec)

Am

plitu

de (

volts

)

0 0.005 0.01 0.015 0.02-3

-2

-1

0

1

2

3

Time (sec)

Am

plitu

de (

volts

)

0 0.005 0.01 0.015 0.02-2

-1

0

1

2

Time (sec)

Am

plitu

de(v

olts

)

0 0.005 0.01 0.015 0.02-2

-1

0

1

2

Time (sec)

Am

plitu

de (vo

lts)





PWMTECHNIQUE

IV.SIMULATION RESULTS MATLAB/Simulink is used to create the simulation model as shown. Fundamental output voltages can be controlled by changing a modulation index ma of refer-ence signal also the fundamental output frequency can be adjusted by changing frequency of the reference sig-nal.[8] The simulation results of the proposed five level inverter is illustrated in Fig.5. And finally Fig.6 shows the analysis of switching frequency Vs THD(Total Har-monic Distortion) and Fig.7 shows the analysis of modu-lation index Vs THD.

Fig.5 FFT analysis of five level inverter

Fig.6. Switching Frequency Vs Total Harmonic Distortion

Fig.7. Modulation Index Vs Total Harmonic Distortion

V.CONCLUSIONS In this paper a novel modulation technique has been in-vestigated for cascaded five level inverter. The HPWM technique is employed to reduce the switching losses. Also, the topology can reduce the number of required power switches compared to a traditional cascaded multi level inverter. From the FFT analysis we get minimum THD of 29.02% and the graph THD vs modulation in-dex and THD vs switching frequency shows perfor-mance of the cascaded hybrid five level inverter. The switching losses of the hybrid multilevel inverter are less than the conventional multilevel inverter. Consequently, the system efficiency be improved by utilizing the hy-brid multilevel inverter. .The simulation results show that this hybrid five level inverter topology can be ap-plied for high power applications.

REFERENCES [1] S.Khomfoi, A. Chatrchai,”A 5-Level Cascaded Hybrid Multilevel Inverter for interfacing with Renewable Energy Resources”, Proceed-ings of the 2009 Electrical Engineering/Electronics, Computer, Tele-communications, and Information Technology International Confer-ence, (ECTI-CON 2009), 6-9 May 2009, Pattaya, Thailand. [2] Nattapat Praisuwanna, Surin Khomfoi, Leon M.Tolbert, “A Hy-brid Cascaded Multi level Inverter Application For Renewable Ener-gy Resources Including a Reconfiguration Technique” proceedings of the 2010 International Power Electronics Conference, Bangkok, 10520, Thailand. [3] JIANG You-hau, CAO Yi-long, GONG You-min, “A Novel Topology of Hybrid Multilevel Inverter with Minimum Number of Separate DC sources”, journal of shanghai university(English Edi-tion) 2004. [4] R.Seyezhai and B.L.Mathur,“Harmonic evaluation of multicarri-er PWM techniques for cascaded multilevel inverter”, in Proc. 2nd International Conference on Electrical Engineering and its Applica-tions, Algeria, ICEEA 2008, 20- 21 May 2008, pp. 3 - 8. [5] Zhou Jinghua, Li Zhengxi,” Research on Hybrid Modulation Strategies Based on General Hybrid Topology of Multilevel Inverter” International Symposium on Power Electronics, Electrical Drives, Automation and Motion, North China University of Technology, Beijing, (China),2008. [6] C.Govindaraju and Dr.K.Baskaran,” Optimized Hybrid Phase Disposition PWM Control Method for Multilevel Inverter” Interna-tional Journal of Recent Trends in Engineering, Vol 1, No. 3, May 2009. [7] C.Govindaraju and Dr.K.Baskaran, “Performance Improvement of Multiphase Multilevel Inverter Using Hybrid Carrier Based Space Vector Modulation”, International Journal on Electrical Engineering and Informatics - Volume 2, Number 2, 2010. [8] Keith A. Corzine, Mike W. Wielebski, Fang Z. Peng,and Jin Wang, “Control of Cascaded Multilevel Inverters” on power elec-tronics May 2004. [9] N. Ravisankar Reddy, T. Brahmananda Reddy, J. Amarnath, and D. Subba Rayudu,”Hybrid PWM Algorithm for Vector Controlled Induction Motor Drive without Angle Estimation for Reduced Cur-rent Ripple”, ICGST-ACSE journal, ISSN: 1687-4811, Volume 9, Issue 3, December 2009





PWMTECHNIQUE

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