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PROGRAMMING

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Input/Output ProgrammingA& I'O (e)ice is *re+,e&ly re*erre( o as a

.por/ 0ih a& associae( a((ress

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Figure 5.1 5 I'O pors 0ih a((ress ,s a&( (aa ,s

a&( he rea( a&( 0rie co&rol si7&als

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Memory Mapped I/OI& his sche3e he I'O (e)ice has he sa3e

a((ress space a&( a((ressi&7 sche3e as3e3ory

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Peripheral or Isolated I/OAlso re*erre( o as .I'O 3appe( I'O/ sa7e? IN acc,3,laor por

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Fixed Port AddressingThis is ,se( o&ly when the address of an

I/O deice is

! "its wide#ere he a((ress o* he por is (irecly

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9ixe( Por A((ressi&7Exa3ples

IN AL $#

IN A 1%#O>T 4# AL

O>T 9C# A

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#aria"le Port AddressingThis is ,se( 0he& he a((resse( por has a

1$%"it address

#ere he por a((ress is o e loa(e( i&o Da&( he& o&ly he I'O i&sr,cio& ca& e ,se(

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"ariale Por A((ressi&7&xamples

MO" D 8@6#

IN AL DMO" D 9C6#

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Exa3ple $

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The x86 Microprocessor - Lyla B Das 1%

Exa3ple $

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Modular ProgrammingIss,es o e resol)e( *or s,ccess*,l exec,io& a&( li&2i&7

o* (iere& 3o(,les< The (iere& 3o(,les ha co&si,ehe sol,io& 3ay e i& (iere& co(e se73e&sBLIC &,31

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The (ireci)e &,-

he& a 3o(,le &ee(s o ,se (aa a&( co(eha ha)e ee& (eF&e( else0here i sho,l(,se he (ireci)e ETRN 3ea&i&7 ha helaels ei&7 ,se( i& his 3o(,le are exer&alo he 3o(,le

9or3aETRN &a3e1?ype

ETRN &a3e1?ype &a3e%?ype

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The (ireci)e ETRNExa3ples

ETRN &,31?ye

ETRN &,3%?0or(&,34?0or(ETRN 3,li?*ar a *ar proce(,re is (eclare(

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R,&&i&7 0o 3o(,les

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R,&&i&7 0o 3o(,les

3o(a

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Assem"ling the two modules

The 3o(,les ca& e asse3le( a&( li&2e(

o7eherThe co33a&( is

ml 0lename1.asm 0lename.asm0lename2.asm 3

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Exa3ple $

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Lisi&7 a&( De,77i&7The lis Fles o* oh 3o(,les ca& e oai&e(

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9re+,e&ly >se( Mo(,lese ca& place *re+,e&ly ,se( pro7ra3s i&

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4615-4716_Chapter 5.ppt