A Current-sharing Control Strategy for Paralleled Multi-Inverter Systems Using Microprocessor-based Robust Control3

7/27/2019 A Current-sharing Control Strategy for Paralleled Multi-Inverter Systems Using Microprocessor-based Robust Control3

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A Current-Sharing Control Strategy for Para lleled Multi-Inverter System sUsingMicroprocessor-Based Robust ControlY.-K. Chen, Mem ber, ZEEE, T.-F. Wu, Senior M ember, ZEEE, Y.-E. Wu andC.-P. Ku

Abstract- A current-sharing control strategy forparalleled multi-inverter systems using microproc-essor-based robust control is presented in this pa-per. With an averaged current-sharing control(ACSC)strategy, the inverters are in parallel con-nection and each inverter has a voltage robust con-troller to achieve system stabiliw and robustness,and a current robust controller to track the aver-aged inductor current of the inverters to achieve anequal current distribution. Simulation results andhardware measurements of a single-inverter systemand a two-inverter system, and simulation results ofa three-inverter system with linear and nonlinearloa& have demonstrated the feasibility of the pro-posed control scheme in equal current distributionand fast regulation.

Index Terms: Current-sharing control, Robust con-trol, Multi-inverter system

I. INTRODUCTIONIn recent years, sinusoidal pulse width modu-

lated (SPWM) inverters have found their wide ap-plications in various types of ac power conditioningsystems, such as automatic voltage regulators (AVR)and minterruptible power supplies (UPS), and soforth. Parallel operation of inverters to obtain a lar-ger power capacity and to improve system reliabil-ity becomes the trend of power system design. Twoor more inverters operating in parallel must satisfythe following conditions:

1) Same amplitude, frequency and phaseamong the output voltages of inverters.

2) Proper current distribution among invertersaccording to their capacities.

To meet the above conditions, there are severaltypes of control strategies were proposed in litera-ture [1]-[ll]. Phase locked loop (PLL) controltechnique was used to synchronize the output volt-age of inverters [11. One of most common methodsof load current-sharing control is instantaneous

This work was supported by the National Science Council, Taiwan,R.O.C., with the project no: NSC 89-2213-E-270-027.Y.-K. Chen is with Department of Electrical Engineering, Chien Kuo(Tek88647224676ext.3234; E-mail: [email protected])T.-F.Wu, .-E. W u ndC.-P. Ku are with Power Electronics AppliedInstitute of T e ~ h ~ l o g ~ ,hWg-HW, Taiwan, R.O.C.

ResearchLaboratory(PEARL),Department of Electrical Engineering,National C h u g Cheng University, fig-Hsiung, Chia-Yi, Taiwan,R.O.C. (Tel:886-5-2428159; Fax:886-5-2720862; E-mail:[email protected])modulation control [6] , l 11. In a master-slave con-trol (MSC) controlled system [ 6 ] , he master mod-ule is responsible for output voltage regulation,while the slave ones track the current commandprovided by the master to achieve an equal currentdistribution. In such a system, if the master modulefails, the system will shut down. This is a majordrawback. In literature [111, the proposed instanta-neous voltage and current controller for the paral-leled inverters with a highest output current Ias a command can quickly eliminate the currentdeviation M and can achieve power balanceamong inverters. However, those paralleled invert-ers with non-identical component characteristicsand input voltage variation will affect the models ofthe inverters and might deteriorate in system per-formance.

In this paper, a voltage H robust controller isadopted to reduce the prementioned effects and toachieve the system stability and robustness; thus,the output voltage can be well regulated. In addition,an averaged current-sharing control (ACSC) strat-egy is used to replace the highest output currentscheme proposed in [113 to achieve an equal outputcurrent distribution among the inverters connectedin parallel and to avoid the noise effect occurring atinverter switching transition.

U. CONFIGURATIONOF PARALLELEDMULTI-INVERTERYSTEM

A paralleled multi-inverter system with the pro-posed ACSC can be conceptually illustrated by Fig.l(a), in which a schematic diagram of each inverterassociated with a DSP controller and the cur-rent-sharing bus are depicted in Fig. l(b) and (c),respectively. With the ACSC strategy, the inductorcurrent of each inverter is sensed as the input ofcurrent-sharingbus and the averaged current I, ofthe paralleled multi-inverter system can be obtainedfrom the current-sharing bus. In the system, all theinverters are with the same configuration, and eachinverter consists of a half-bridge switch configura-tion and an L-C output filter. The DSP controllerperforms digital control and generates SPWM driv-

IEEE Catalogue No.01 H37239 6470-7803-7101-1/01/$10.002001 IEEE.


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ing signals for switching devices, in which a clockrate of 20 MHz and 10-bit A/D converters ( forfeeding back inductor current and output voltage)are adopted. In the proposed system, the voltageH" robust controller is responsible for outputvoltage regulation, while the current ones will trackthe current command I to achieve an equalcurrent distribution. The proposed control scheme isrealized with a DSP chip (TI TMS320F240).

m.ANALYSIS AND DESIGN F ROBUSTCONTROLLERSEach inverter with the ACSC strategy includestwo controllers: one is for output voltage loop, the

other is for current-sharing loop. H" robust con-trol technique is adopted to design these controllersfor achieving an equal current distribution and alow output voltage distortion. Before performingthese designs, the dynamics of the inverters needsto be analyzed.A. Modeling of a Single-Inverter SystemTo design a proper controller for an SPWM con-trolled inverter, the dynamics of a single-invertersystem is modeled and illustrated by a control blockdiagram shown in Fig. 2, where vref is a sinusoi-dal reference voltage, V, is the output voltage,V l b is the feedback voltage, io is the output cur-rent, and voltage controller K,(s) is an outputvoltage loop controller. H, represents the feed-back gain and K,, is the PW M gain of the in-verter. The small-signal control-to-output voltagetransfer characteristics ( ;,/i of the sin-gle-inverter system is expressed as follows:

where RI and LI are resistance and inductanceof the load, respectively.Fig. 3 shows the plots ofcontrol-to-output voltage transfer function versusfrequency under three different load conditions (noload, a 0.7 lagging load and full load). Note that asshown in Fig. 3, the voltage loop small-signaltransfer characteristics of the single-inverter systemare different under different load conditions. In ad-dition, variations of input voltage and componentvalues are treated as the uncertainty of the sin-gle-inverter system in this paper.B. Design of a VoltageRobust ControllerIt can be observed that output voltage loop

transfer characteristics vary with different kinds ofloads, input voltage and component values of aninverter system. To reduce the effects due to thevariations, robust control technique is adopted todesign an output voltage controller. A block dia-gram used to illustrate the proposed H" robustcontrol is depicted in Fig. 4, in which the multipli-cative uncertainty-plant AG(s) is with three un-certainties, including variations of component val-ues, load and input voltage. The design procedureof a robust controller is outlined as follows:. . . . . . . .

R R I, . . . . . . .

i c j . . . . . . 'Fig.1. (a) Block diagram of the paralleledmulti-inverter system, (b) circuit diagram of a sin-gle-inverter system, and (c) circuit diagram of cur-rent-sharing bus for the proposed ACSC strategy.

. . .

I

I IFig. 2. Control block diagram of the single-invertersystem.

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Fig. 3. Bode plot of control-to-output ransfer func-tion.aumentedolant P(s)

need to go back to step 1) to select another setofweighting functions and go through all steps.C. Modeling of a Paralleled CurrentlrharingMulti-Inverter SystemTo investigate the current distribution among in-verters, a multi-inverter system is designed with theinverters in parallel connection and each inverterhas a current robust controller to track the averagedinductor current I, to achieve an equal currentdistribution. The control block diagram of the pro-posed ACSC system is shown in Fig. 5. Thesmall-signal control-to-current transfer function(;/>) of the inverter system is represented asfollows:

ACSC

Fig. 4. Iilustration of an augmented plant with arobust controllerK(s).1) Augment the plant G(s ) ( = cO/G with

weighting functions W,(s ) and W,(s) asedon the desired performance indices. The aug-mented plant P(s) can be conceptually illus-trated by Fig. 4.Generally, weighting functionW,(s)s a typical low-pass filter, shaping thesensitivity function S at low frequency to re-ject disturbance and to reduce tracking errors,and Z, is a control variable used to adjust thetracking errors. Weighting function W,(s ) ischosen to be a high-pass filter, shaping the com-plementary sensitivity function T at high fie-quency to minimize instability effects.

2) Find an H" robust controllerK(s ) o satisfy theH"' inequality

where S ( s ) = ( I+G( s )K( s ) r ' is the sensi-tivity function and~ ( s ) G ( ~ ) K ( ~ ) ( I~ ( s ) ~ ( s ) ) - ' is theclosed-loop transfer function of the referencecommand vre, o the measurement output V,(also called complementarysensitivity function).

3) Verify if the design is close to the desired per-formance indexes based on the evaluation ofthe singular value bode plot. If it is not, we

inverbplant 1vdA C W

Fig.5. System configuration of the proposed par-alleled multi-inverter systemwthe CSC strat-e a .

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From (3), it can be observed that the small-signalcontrol-to-inductor current transfer function of eachinverter varies with different component values andinput voltage.D. Design of a CurrentRobust ControllerDesign of a current robust controller for a cur-rent-sharing loop is the sameas hat of a voltagerobust controller, which is shown in subsectionB ofthis section.

SpecificationInput voltage (V&)

N.LLUSTRATION EXAMPLESND DISCUSSIONThree examples, single-inverter, two-inverterand three-inverter systems, with current and voltageH"' robust controllers are used to illustrate theprevious discussion. The design specifications ofthe above examples are given asfollows:A. Output Voltage Loop1) phase margin (PM)2 0" and gain margin

(GM)2 40dB,2) bandwidth2 3 kHz,3) minimizing the sensitivity to the variations ofinput voltage, component value and load con-ditions.B. Current-Sharing Loop1) P M 2 4 9 andGM24OdB,2) bandwidth2 0.3 kHz,3) minimizing the sensitivity to the variations of

input voltage and component values.Example 1: Single-Inverter SystemThe electrical specifications and component val-ues of a single-inverter are collected in Table I. Forthe output voltage loop, weighting functionsW , ( S ) and W,(s ) are determined to satisfy allafore-mentioned specifications simultaneously andto ensure robust stability. Typically, the weightingfunctions W,(s) and W,(s) are chosen as fol-lows:

value Component Valuek38OV Inductor (L,) s a '

and

[$+I](1 0-6 s+ 1)

(4)

12

( 5 )

where K , is used to adjust the tracking error, nland n2 are 1 or 2, and 0 , and dC re the two

parameters used to adjust the bandwidth of theclosed-loop system. For good tracking performance,sensitivity function S ( S ) should generally exhibitlow-gaii property over low fiequency range. SinceIlW,Sll,< 1, W,(s) must behave as a low-pass fil-ter. The multiplicative uncertainty-plant AG(s) ofthe single-inverter system includes the variations ofinput voltage, component values and load condi-tions. As to the choice of W,(s) or system ro-bustness, the magnitude of w,(~)hould be largeenough to accommodate the multiplicative uncer-tainty-plant, which is shown as Fig. 6. Similarly,high-pass property of W ,( S) is required toachieve enough bandwidth for the closed looptransfer function 2%) because IlW2TIIw< 1.Table LSpecifications and component values of thesinde-invertersvstem.

Output frequencyOutput current I 3 A I II 60 Hz ICapacitor ESR I 4a

- L * I * W % 1 1'1"I 1 1 * 1 1 * . I , , , , ,

,,,,I" 1 1 , 1 1 1;,ill.,- i n:..

I 1 , 1 1 1 1 1 1 I ,,,,,,,, , , 1 1 1 1 1U

Fig. 6. Magnitude plot of weighting functionW , s) and multiplicative uncertainty-plant.

The weighting functions W,(s) nd W , ( S )of the output voltage loop are selected as

and

The 6" order H" robust controller K , , ( s ) canbe derived with MATLAB Robust Control Toolbox.

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Through a minimal realization, which is the realiza-tion of a model with the redundant or unnecessarystates eliminated, a second order robust controllercan be obtained as follows:K A s )=The magnitude-frequency bode plots of K , , ( s )and K, s) and plotted in Fig. 7.From the figure,we can observe that the characteristic of K , , ( s )is nearly the same as that of K , (s ) from DC to 3kHz (bandwidth). In simulation, the controller isrealized with analog circuits, while in hardware im-plementation, they are first converted to discreteforms and represented in difference equations, and,then, they are programmed on the DSP chip (TMS320F240). Simulated and measured results of sucha system loaded with a resistor are shown in Fig. 8,where the voltage and current waveforms are sinu-soidal and in phase. These results appear closelyconsistent with each other.Fig. 9 and Fig. 10 show the simulated andmeasured output current and voltage responses ofsuch a system with a high crest factor load (CF=3)and with a step load change from 33% to loo%,respectively. It can be observed fiom the wave-forms that fast regulation can be achieved. Totalharmonic distortion (THD) and odd harmonics ofthe output voltage of the system operated with alinear full load are listed in Table II.

(8)o 4x ( 1 . 8 1 ~ 1 0 - ~2+7 . 8 9 ~o 4 s+7.64)sz+5.95s +1.98x 10"

Fig. 7. Bode plot of 6* and second order robustcontrollers.Example 2: Two-Inverter SystemTo investigate the current distribution betweeninverters, a two-inverter system with the circuit pa-rameters collected in Table 111is simulated and im-plemented. As described in previous section, therobust current-sharing control technique has beenadopted to deal with the uncertainty between theparalleled inverters.

Thus, the controller of this example is the sameas that used in example 1.

With the design specificationsofcurrent-sharing

loop, the weighting functions W,(s)nd W,(s)of the current-sharing loop are selected as

(9)and

Thus, the robust current-sharing controller is ex-pressed as

sz+6.83 x 1 0 - l ~ . 1 8x o - ' )K i s) = x (-6.90 xsz+5 . 1 8 ~ 1 0 ' s 1 . 7 2 ~ 1 0 -'(1 1)

_-* .........................................................................................

T L L

(20OV/DIv,SA/DIv, l o m S / D I v )(b)Fig. 8.Output voltage and current waveforms of the

single-inverter system operating with a pure resis-tance: (a) simulation, and (b) measurement.

I..........................................................................................

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Fig. 9. Output voltage and current waveforms of thesingle-inverter system operating with a high crestfactor load: (a) simulation, and Ib )measurement.

THD of output voltage3rd harmonic5rd harmonic7rd harmonic9rd harmonic11 d harmonic13rd harmonic

(2OOV/DIv, 5A/DIv, loms/DIv)(b)Transient responses of output voltage and

1.548%1.143%0.708%0.608%0.553%0.453%0.492%

Fig. 10.current to a step load change from 33% to 100% ofthe full load: (a) simulation, and (b) measurement.Table IT. Total harmonic distortion (THD) and oddharmonics of output voltage of the single-invertersyste m.

Table ID.Circuit parameters of a two-inverter sys-tem1 I

The voltage and current simulated and measuredwaveforms for pure resistance load are illustrated inFig. 11, where v, denotes the output voltage, andio, and io, are the output currents of inverters 1and 2, respectively. It can be observed from theseplots that equal current distribution can be achievedregardless of the types of loads and component dis-crepancy between inverters.Example 3: Three-Inverter System

For further verifying the feasibility of the

proposed ACSC scheme, a three-inverter systemwith a pure resistant load is simulated, whose re-sults are plotted in Fig. 12. The three output cur-rents are tracking each other precisely and the out-put voltage waveform sustains sinusoidal. More-over, in order to investigate the system reliability,the system with ACSC scheme under the case ofone inverter in open-circuit failure or short-circuitfailure is presented. Fig. 12(a) shows the wave-forms of a system with inverter 3 in these failures.Fig. 12 0) shows an plot in which the load is firstsupplied by inverter1 and inverter 2; Inverter 3 isthen synchronized and connected to the load. It canbe seen that the output voltage and current wave-forms are sinusoidal and in phase without notice-able variation under such a sudden failure, and theother two inverters can continuously supply powerto the load.

(200V/DIv, 1oA/DIv, 1oms/DIv)(b)Fig. 11. Output voltage and current waveforms ofthe two-inverter system with a pure resistance load:(a) simulation, and (b) measurement.

V. CONCLUSIONAn ACSC strategy for inverters in parallel op-eration to achieve an equal current distribution hasbeen studied. Each inverter in the proposed systemconsists of a voltage robust controller to achieve afast dynamic response, and a current robust con-troller to reach system robustness and to reduceuncertainty among inverters. It has been verifiedthat a system with ACSC strategy can accommo-date various types of loads and variations of inputvoltage and component values. In other words, theproposed ACSC strategy is with a tight currenttracking characteristic regardless the types of loadsand discrepancy among inverters.

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Simulation results have shown that fast dynamicresponse, tight output regulation and equal currentdistribution can be achieved in the proposed paral-leled multi-inverter system. Hardware measure-ments obtained from a laboratorious prototype haveshown similar performance to those of the simula-tion results and have also verified the theoreticaldiscussion.

.,.*.......................................................................................l.*T_~....................................................................................

rEo>:5 ._ .- 7 ,I_ 1

rim

,,........ . ......._(+ ......._................-...............-....................... ..........,........

I- ._ .- l a 12 *-,U

(b)Fig. 12. Simulated output voltage and currentwaveforms of a three-inverter system wth (a) in-verter 3 in failure, and (b) inverter 3 is connected tothe load.

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A Current-sharing Control Strategy for Paralleled Multi-Inverter Systems Using Microprocessor-based Robust Control3