a3 CA Fri Ankit Aman Sudershan

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    Assignment 2

    Aim : To simulate microwave oven controllerusing picoblaze.

    Assembly code for microwave oven controller

    CONSTANT timer_port, 00

    CONSTANT reset_port, 01

    CONSTANT is_open_port, 02

    CONSTANT start_port, 03

    CONSTANT heat_port, 04

    ;

    NAMEREG s0,timer

    NAMEREG s1,reset

    NAMEREG s2,is_open

    NAMEREG s3,start

    NAMEREG s4,heat

    ;

    NAMEREG s5,count

    NAMEREG s6,x_heat

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    ;

    INPUT timer,timer_port

    INPUT reset,reset_port

    INPUT is_open,is_open_port

    INPUT start,start_port

    ;

    heat_process: COMPARE reset,01

    JUMP NZ,mn

    LOAD x_heat,00

    jump count_process

    ;

    mn: COMPARE is_open,00

    JUMP NZ,abc

    COMPARE start,01

    JUMP NZ,abcd

    LOAD x_heat,01

    jump count_process

    ;

    abcd : COMPARE count,00

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    jump C,abc

    LOAD x_heat,01

    jump count_process

    ;

    abc: LOAD x_heat,00

    jump count_process

    count_process : COMPARE reset,01

    JUMP NZ, abcde

    LOAD count,00

    jump end

    abcde : COMPARE start,01

    JUMP NZ, abcdef

    LOAD count,timer

    jump end

    abcdef : COMPARE count,00

    JUMP C ,end

    SUB count,01

    end :

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    LOAD heat,x_heat

    end_last: OUTPUT heat, heat_port

    jump end_last

    VHDL code for the top level entity :

    ----------------------------------------------------------------------------------

    -- Company:

    -- Engineer:

    --

    -- Create Date: 16:18:30 04/09/2014

    -- Design Name:

    -- Module Name: picpotest - Behavioral

    -- Project Name:

    -- Target Devices:

    -- Tool versions:

    -- Description:

    --

    -- Dependencies:

    --

    -- Revision:

    -- Revision 0.01 - File Created

    -- Additional Comments:

    --

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    ----------------------------------------------------------------------------------

    library IEEE;

    use IEEE.STD_LOGIC_1164.ALL;

    -- Uncomment the following library declaration if using

    -- arithmetic functions with Signed or Unsigned values

    --use IEEE.NUMERIC_STD.ALL;

    -- Uncomment the following library declaration if instantiating

    -- any Xilinx primitives in this code.

    --library UNISIM;

    --use UNISIM.VComponents.all;-- Top level VHDL for PICOBLAZE TEST for

    ELEC4200

    library IEEE;

    use IEEE.STD_LOGIC_1164.ALL;

    use IEEE.STD_LOGIC_ARITH.ALL;

    use IEEE.STD_LOGIC_UNSIGNED.ALL;

    entity picotest is

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    Port ( sw1: in std_logic_vector(4 downto 0);

    sw2,sw3,sw4 : in std_logic;

    cpu_output : out std_logic;

    output2 : out std_logic_vector (3 downto 0);

    clk : in std_logic);

    end picotest;

    architecture Behavioral of picotest is

    -- declaration of KCPSM3 (always use this declaration to call up PicoBlaze

    --core)

    signal S : std_logic_vector (7 downto 0);

    component kcpsm3

    Port ( address : out std_logic_vector(9 downto 0);

    instruction : in std_logic_vector(17 downto 0);

    port_id : out std_logic_vector(7 downto 0);

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    write_strobe : out std_logic;

    out_port : out std_logic_vector(7 downto 0);

    read_strobe : out std_logic;

    in_port : in std_logic_vector(7 downto 0);

    interrupt : in std_logic;

    interrupt_ack : out std_logic;

    reset : in std_logic;

    clk : in std_logic);

    end component;

    -- declaration of program memory (here you will specify the entity name as your

    --.psm prefix name)

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    component oven

    Port ( address : in std_logic_vector(9 downto 0);

    instruction : out std_logic_vector(17 downto 0);

    clk : in std_logic);

    end component;

    -- Signals used to connect PicoBlaze core to program memory and I/O logic

    signal address : std_logic_vector(9 downto 0);

    signal instruction : std_logic_vector(17 downto 0);

    signal port_id : std_logic_vector(7 downto 0);

    signal out_port : std_logic_vector(7 downto 0);

    signal in_port : std_logic_vector(7 downto 0);

    signal write_strobe : std_logic;

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    signal read_strobe : std_logic;

    signal interrupt_ack : std_logic;

    -- the following 2 inputs are assigend inactive values since they are unused in

    --this example

    signal reset : std_logic :='0';

    signal interrupt : std_logic :='0';

    -- Start of circuit description

    begin

    -- Instantiating the PicoBlaze core

    processor: kcpsm3

    port map( address => address,

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    instruction => instruction,

    port_id => port_id,

    write_strobe => write_strobe,

    out_port => out_port,

    read_strobe => read_strobe,

    in_port => in_port,

    interrupt => interrupt,

    interrupt_ack => interrupt_ack,

    reset => reset,

    clk => clk);

    -- Instantiating the program memory

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    program: oven

    port map( address => address,

    instruction => instruction,

    clk => clk);

    -- Connect Input to PicoBlaze

    process( port_id, clk, read_strobe )

    begin

    if clk'event and clk='1' then

    if read_strobe='1' then

    case port_id is

    when x"00" => in_port

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    when x"01" => in_port in_port in_port in_port null;

    end case;

    end if;

    end if;

    end process;

    -- Connect Output from PicoBlaze

    process( port_id, clk, write_strobe )

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    begin

    if clk'event and clk='1' then

    if write_strobe='1' then

    case port_id is

    when x"04" => S null;

    end case;

    end if;

    end if;

    C1:case S is

    when "00000000" => cpu_output cpu_output cpu_output

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    output2

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    Simulation Result

    Challenges Faced :

    1. The first challenge was that assembly code

    runs over again and again so we had to

    include a dummy output loop to stabilize theoutput.

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    2.The another challenge was that the

    assembly language KCPSM3 was new to us

    and we had to learn the syntax.3.We had to simplify our microwave design ,

    so we instead of controlling hea amount

    controlled the time with amount of heat

    being constant.

    4.Other challenge was that the clock ofprocessor did not synchronise with count of

    timer , so we used trial and error to

    synchronise the two , the clock period

    should be 1.5 sec while using the simulation

    result.

    5.Top level entity had to be changed very

    carefully as it was very prone to the errors.