Instruction format:The physical and logical structure of computers is normally described in reference manuals provided with the system. Such manuals explain the internal construction of the cpu ,including the processor register available and their logical capabilities . they list all hardware implemented instruction ,specify their binary code format ,and provide a precise definition of each instruction. A computer will usually have a variety of instruction code formats. It is the function of the control unit within the cpu to interpret each instruction code and provide the necessary control function needed to process the instruction code.The format of an instruction is usually depicted in a regular rectangular box symbolizing the bits of an instruction as they appear in memory words or in a control register the bits of the instruction are divided into groups called fields .the common fields found in instruction formats are:

1. An operation code field that specifies the operation to be performed .

2. An address field that designates a memory address or a processor register

3. A mode field that specifies the way the operand or the effective address is determined.

The operation code field of an instruction is group of bits that define various processor operation such as add , subtract, complement and shift. the bits that the mode of an instruction code specify a variety of alternatives for choosing operands from the given address.Operation specified by computer instruction are executed on some data stored in memory or processor registers. Operands residing in memory are specified by their memory address .operands residing in process register are specified with a register address . A register address is a binary number of k bits define one of the 2k registers in the cpu. Computer may have instruction of several different lengths containing varying number of addresses. The number of address fields in the instruction format of computer depends on the internal organization of its registers. Most computers fall into one of three types of cpu organizations:

1. Single accumulator organization 2. General register organization 3. stack organization

All operation performed with an implied accumulator register .the instruction format of this type of computer uses one address field. For example, the instruction that specifies an arithmetic addition is defined by an assembly language instruction as

ADD XWhere X is the address of the operand. The ADD

instruction in this case results in operation ACAC+M[X]. AC is the accumulator register and M[X] symbolizes the memory word located at address XThe instruction format in this type of computer needs three register address fields. Thus the instruction for an arthimetic addition may be written in an assembly language as

ADD R1, R2, R3

To denote the operation R1 R1+R2. The number of address fields in the instruction can be reduced from three to two if the destination if register is the same as one of the source register. Thus the instruction ADD R1,R2

Would denote the operation R1R1+R2. only register addresses for R1 and R2 need be specified in this instruction.Computer with multiple processor register use the move instruction with a mnemonic MOV to symbolize a transfer instruction. Thus the instruction

MOV R1, R2

Denotes the transfer R1R2. Thus the transfer –type instruction need two address fields to specify the source and the destination.General register-type computers employ two or three address fields in their instruction format. Each address fields may specify a processor register or a memory word. An instruction symbolized by

ADD R1,X

Would specify the operation R1R1+M[X]. It has two address

fields, one for register R1 and other for the Memory address X.

computer with stack organization would have PUSH and POP instruction which require an address field .thus the instruction

PUSH X

Will Push the word at address X to the top of the stack.The stack pointer will be updated automatically.

Various types of instruction formats

• Three address instructions• Two address instructions• One address instructions• Zero address instructions

Three address instructions:Computers with three address instructions use three

address fields to specify either a processor register or a memory operand.For example

ADD R1, A, B R1M[A] + M[B]

As shown, it is clear that in the instruction 3 addresses are specified. In the above instruction one register address and two memory addresses are specified.The advantage of the three address format is that result in short programs in evaluating arithmetic expressions. The disadvantage is that the binary –coded instructions require too many bits to specify three addresses.Example of computer using this type of instructions Cyber 170

Two address instructions:

Computers that use this type of instruction have two addresses specified in their instructions.For example ADD R1, A R1 R1 + M[A]In this instruction one register is specified and one memory operand is specified. In this instruction register R1 is both the source and the destination. Most commercial computers use this type of instructions.

One address instructions: In this type of instructions an implied accumulator register is used for all data manipulation.For example LOAD A ACM[A] ADD B ACAC + M[B]All operations are done between the AC register and a memory operand. Commercially available computers also use this type of instruction format.

Zero address instructions:A stack organized computer does not require an address field for computational instructions. Due to the absence of the address field it is known as zero address instructions For example PUSH A TOSA PUSH B TOSB ADD TOS(A+B)

The ADD instruction does not need any address field. Example Burroughs large systems .

ADDRESSING MODES: Addressing modes are used to specify a way in which manner ,the operand is to be specified in the instruction . The way the operands are chosen is dependent on the addressing modeit gives the programmer flexibility for writing programs. Mode field is a bit used to locate the operands in the operation. It specifies the way the operand or effective address is determined.

TYPES OF MODES:There are nine types of Addressing modes. They are

• Implied addressing mode

• Immediate addressing mode

• Direct addressing mode

• Indirect addressing mode

• Register addressing mode

• Register Indirect addressing mode

• Autoincrement or Autodecrement addressing mode

• Relative addressing mode

• Indexed addressing mode

• Base register addressing mode

Implied Mode:

In this mode the operands are specified implicitly in the

definition of the instruction.

Example – ‘complement accumulator’ instruction

CMA

Reason – from the definition itself it is obvious that we

have to complement the operand that is placed in the

accumulator.All register reference instructions that use

an accumulator are implied mode instructions.

Immediate addressing mode

In this mode operand is specified in the instruction itself

Assembly convention Register transfer

LD #NBR ACNBR

Advantages and disadvantages

• No memory reference to fetch data

• Fast

• Limited range

Direct addressing mode:

Address field contains address of operand.

Effective address equal to the address part of the

instruction

Advantages and disadvantages

• Single memory reference to access data

• No additional calculations to work out effective address

• Limited address space

Assembly convention Register transfer

LD ADR ACM[ADR]

The operand is at the address ADR, can be loaded into the

register AC i.e, the operand resides in memory whose

address is directly given by the address field of the

instruction.

Indirect addressing mode:

In this mode , the address field of an instruction gives not

an actual operand address instead it gives the address

where the effective address is stored in memory

• EA = address contained in memory location M

Assembly convention Register transfer

LD@ ADR ACM[M[ADR]]

The symbol @ symbolizes the indirect address.

Register addressing mode:

Operand is held in register named in the address field.

EA = R

Example ADD B

The Advantages is that there is No memory access. So

very fast execution and disadvantage is Limited number

of registers.

Register Indirect addressing mode:

In this mode the instruction specifies a register in the

cpu whose content give the address of the operand in

memory. In other words , the selected register contains

the address of the operand rather than the operand itself.

Assembly convention Register transfer

LD(R1) ACM[R1]

Autoincrement or Autodecrement addressing

mode:

This mode is similar to register indirect mode except that

the register is automatically incremented or decremented

after its value is used to access memory. This mode is

specially useful when we want to access a table of data.

The content of the register is incremented or

decremented after its value is used to access memory.

Assembly convention Register transfer

LD(R1)+ ACM[R1], R1R1+1

(+) is used to denote auto increment mode

(-) is used to denote auto decrement mode

Relative addressing mode:

In this mode the contents of the program counter is added

to the address field of the instruction in order to obtain

the effective address.

EA = A + contents of PC

Assembly convention Register transfer

LD $ADR ACM[ADR+PC]

Example : PC contains 825 and address part of instruction

contains 24.

After the instruction is read from location 825, the PC is

incremented to 826. So EA=826+24=850. The operand will

be found at location 850 i.e. 24 memory locations forward

from the address of the next instruction.

Indexed addressing mode

The contents of an index register is added to the address

field of the instruction to get the effective address. The

address field of the instruction is the beginning address of

the data array in the memory. Index register contains a

index value which can be incremented or decremented as

required.

Therefore

EA = A + IR

Assembly convention Register transfer

LD ADR(x) ACM[ADR+IR]

Example MOV AL , DS: disp [SI]

Advantage

• Good for accessing arrays.

Base Register addressing mode

In this mode the content of a base register is added to the

address part of the instruction to obtain the effective

address.

The base register contains the address of the beginning of

the data array.

Therefore

EA= A + BR

For example:

MOV AL, disp [BX]

Segment registers in 8086

.