Upload
rolf
View
57
Download
2
Tags:
Embed Size (px)
DESCRIPTION
Aum Amriteswaryai Namah:. Serial Communication. PIN DIAGRAM. When two processors are to communicate, more often the communication is organized in a bit serial fashion. The communication may be. simplex transmission. half duplex. full duplex. Asynchronous Communication. - PowerPoint PPT Presentation
Citation preview
Aum Amriteswaryai Namah:
PIN DIAGRAMWhen two processors are to communicate, more often the communication is organized in a bit serial fashion
The communication may be
simplex transmissionhalf duplex
full duplex
Asynchronous Communication
GNDGND
Tx Rx
Processor A Processor B
Connection for simplex serial transmission between two Cs
•The two processors should communicate bit streams at a prearranged bit rate called ‘baud rate’ •Baud rate represents the number of bits per second at which the transmission and reception between the two processors take place
Consider the implementation of a scheme at 9.6 K baud. •It implies transmission at 9600 bits per sec •each bit takes 104.25μs for transmission
•both the Cs will have a clock of 104.25μs time period; it is called the ‘baud rate generator’;
P
Q
Startbit
b0 b1 b2 b3 b4 b5 b6 b7Stopbit
0 11 00000 11
0 11 00000 11
s25.104
Transmitter baud rategenerator output
Transmitted bitsequence
Transmittedwaveform
Transmitted 10 bitserial sequence
Receiver baud rategenerator
Set of ten receivedbits
Asynchronous transmission of a byte at 9.6 kbaud
GNDGND
Tx
Rx
Processor A Processor B
Tx
Rx
Vcc Vcc
Connection for half duplex serial transmission between two Cs
GNDGND
Tx
Rx
Processor A Processor B
Tx
Rx
Connection for full duplex serial transmission between two Cs
Synchronous Communication
GNDGND
Tx / Rx Tx / Rx
Processor A Processor B
Clk Clk
Connection for synchronous half duplex transmission between two Cs
GNDGNDTx Rx
Processor A Processor BClk Clk
TxRx
Connection for synchronous full duplex transmission between two Cs
GND
Tx
Processor A
Rx
Vcc
GND
Tx
Processor B
Rx
Vcc
GND
Tx
Processor C
Rx
Vcc
GND
Tx
Processor D
Rx
Vcc
Four Cs connected for communication amongst them in half duplex asynchronous mode
Processor Address
A 01h
B 02h
C 03h
D 04h
Address assignments to different Cs in Figure
USART and Overheads
‘Universal Synchronous Asynchronous Receiver Transmitter (USART)’ – a module which carries out the serial communication
The simplest USART will have the following features.
A baud rate generator. Parallel to Serial Converter:Insertion of additional bits: Data recovery at Receiver: Programmability:Bit checks: Buffers: Interrupts: Error Indication:
The PIC16 series have an USART built in with a transmitter block and a receiver block within
Baud Rate Generator
)1(4
X
Fbaudrate osc
The number X is to be loaded into SPBRG register
The baud rate is derived from the processor clock by dividing it by a selected byte – X – in the 0 to 255 range.
In synchronous mode In asynchronous mode
)1(16
X
Fbaudrate osc
)1(64
X
Fbaudrate osc
or
Data bus8
8
TXREG register
TSR register
Pin buffer &control
Tx / CK pin
b0b8
TMRTSPEN
Baud rate clock
Baud rate generattor
SPBRG
TXENTX9D
TX9
TXIF
TXIE
interrupt
SPEN
Data bus8
8
RSR register
Pin buffer &control
Rx / DT pin
b8b0
SPEN
Baud rate clock
Baud rate generattor
SPBRG
RX9
RCIF
RCIE
interrupt
stopstart
RX9DRCREG register
Datarecovery
FERROERRCREN
FIFO
Nine-Bit Transmission
Tx9 [TXSTA<b6>] and RX9 [RCSTA<b6>] are to be set to select the 9 bit scheme .
Can be used for two purposes
1. As address/data indication bitWhen the master sends out bytes, the first one can be the address. Bit – b8 – can be set indicating that the associated byte is an address. All slaves sense b8; if b8 = 1, they check for an address match; each can accept further bytes only if it finds an address match.
2. As Parity bit
Now..,try this out!!!!!!
? Calculate the baud rate error for the following conditions:
FOSC = 16 MHz
Desired Baud Rate = 9600
BRGH = 0
SYNC = 0
Solution