Aum Amriteswaryai Namah:

Have separate program memory and data Have separate program memory and data MemoryMemoryAccessed by separate bussesAccessed by separate busses

PIC 16F877A Microcontroller

•Like any microcontroller, it has CPU, memory and I/O in one chip.•Using some I/O devices like keypad, display and interfacing circuits we can create a ‘complete system’.

PIC based wireless sensor

board

Aum Amriteswaryai Namah:

Aum Amriteswaryai Namah:

PIN DIAGRAM

Memory Classification

MemoryMemory

Program MemoryProgram Memory Data MemoryData Memory

General PurposeRAM

General PurposeRAM

Special FunctionRegisters

Special FunctionRegisters

Specifications of program memory

PM (program PM (program memory) = 8k memory) = 8k

wordswords

PC (program PC (program counter = 13 bits counter = 13 bits wide to address wide to address

PM)PM)

Each word = 14 Each word = 14 bits => All op-bits => All op-

codes are 14 bit codes are 14 bit wide.wide.

PM (program PM (program memory) = 8k memory) = 8k

wordswords

PC (program PC (program counter = 13 bits counter = 13 bits wide to address wide to address

PM)PM)

Each word = 14 Each word = 14 bits => All op-bits => All op-

codes are 14 bit codes are 14 bit wide.wide.

Data Memory Organization

Data memory = RAM File = File Registers.Data memory = RAM File = File Registers. 512 bytes arranged in 4 banks of 128 bytes 512 bytes arranged in 4 banks of 128 bytes each.each.

Width of word = 8 bits Width of word = 8 bits General Purpose Registers (GPR): Called scratch General Purpose Registers (GPR): Called scratch pad area/registerspad area/registers

----For data storage ----For data storage

-----For scratch pad operations-----For scratch pad operationsSpecial Function Register (FSR, STATUS etc.)Special Function Register (FSR, STATUS etc.)

----Control operation of the device----Control operation of the device

RAM FILE BANKSRAM FILE BANKS

00h

17Fh

100h

8Fh

80h

7Fh 18Fh

180h

Bank0 Bank1 Bank2 Bank3

Add

ress

ran

geof

the

ban

k

SFR area

Scratchpadarea

First 32 of each bank = reserved. The important register (eg: STATUS) values are repeated in each bank.

Each bank = 128 bits wide. Hence need only 7 bits for address. To select one among the 4 banks, 2 bits (b6 b5) of status register is used.

b6 = RP1, b7 = RP0

RP1 RP0 = 00 => bank 0 selected ; RP1 RP0 = 01 => bank 1 selected

RP1 RP0 = 10 => bank 2 selected ; RP1 RP0 = 11 => bank 3 selected

16 registers of each bank is common and repeated in all 4 banks. Hence common data is stored here during bank switching.

RAM FILE BANKS contd…

RAM FILE BANKS contd…

GPRsGPRs

SFRsSFRs

Bank0Bank0000h000h

01Fh01Fh

020h020h

07Fh07Fh

GPRsGPRs

SFRsSFRs

Bank1Bank1080h080h

09Fh09Fh

0A0h0A0h

0FFh0FFh0F0h0F0h

GPRsGPRs

SFRsSFRs

Bank2Bank2100h100h

11Fh11Fh

120h120h

17Fh17Fh170h170h

GPRsGPRs

SFRsSFRs

Bank3Bank3180h180h

19Fh19Fh

1A0h1A0h

1FFh1FFh1F0h1F0h

RP<1:0> RP<1:0> RP<1:0> RP<1:0>RP<1:0> RP<1:0> RP<1:0> RP<1:0> = 00 = 01 = 10 = 11= 00 = 01 = 10 = 11

WREG - Working Register

The WREG register is referred to as The WREG register is referred to as working registerworking register

Is a special register inside the CPU of Is a special register inside the CPU of uCuC

Doesn’t reside in Data Memory like Doesn’t reside in Data Memory like SFRsSFRs

Involves in the execution of many Involves in the execution of many instructionsinstructions

Can be the destination of many Can be the destination of many instructions.instructions.

Status Register

Status Register contd..