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Design of a PC Controlled Ploughing Vehicle
1. INTRODUCTION
1.1 EMBEDDED SYSTEMS
An embedded system is a special-purpose system in which the computer is
completely encapsulated by or dedicated to the device or system it controls. Unlike a
general-purpose computer, such as a personal computer , an embedded system performs
one or a few pre-defined tasks, usually with very specific requirements. Since the
system is dedicated to specific tasks, design engineers can optimize it, reducing the size
and cost of the product. Embedded systems are often mass-produced, benefiting from
economies of scale.
Personal digital assistants (PDAs) or handheld computers are generallyconsidered embedded devices because of the nature of their hardware design, even
though they are more expandable in software terms. This line of definition continues to
blur as devices expand.
Physically, embedded systems range from portable devices such as digital
watches and MP3 players, to large stationary installations like traffic lights, factory
controllers, or the systems controlling nuclear power plants. In terms of complexity
embedded systems can range from very simple with a single microcontroller chip, to
very complex with multiple units, peripherals and networks mounted inside a large
chassis or enclosure.
History of Embedded System
In the earliest years of computers in the 1940s, computers were sometimes
dedicated to a single task, but were too large to be considered "embedded". Over time
however, the concept of programmable controllers developed from a mix of computer
technology, solid state devices, and traditional electromechanical sequences. The first
recognizably modern embedded system was the Apollo Guidance Computer, developed
by Charles Stark Draper at the MIT Instrumentation Laboratory. At the project's
inception, the Apollo guidance computer was considered the riskiest item in the Apollo
project.
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Figure1.1 Earliest Computers
The first mass-produced embedded system was the Autonetics D-17 guidance
computer for the Minuteman (missile), released in 1961. It was built from transistor
logic and had a hard disk for main memory. When the Minuteman II went into
production in 1966, the D-17 was replaced with a new computer that was the first high-
volume use of integrated circuits. This program alone reduced prices on quad NAND
gate ICs from $1000/each to $3/each, permitting their use in commercial products.
Since these early applications in the 1960s, embedded systems have come down in
price. There has also been an enormous rise in processing power and functionality. For
example the first microprocessor was the Intel 4004, which found its way into
calculators and other small systems, but required external memory and support chips.
In 1978 National Engineering Manufacturers Association released the standard
for a programmable microcontroller. The definition was an almost any computer-based
controller. They included single board computers, numerical controllers, and sequential
controllers in order to perform event-based instructions.
By the mid-1980s, many of the previously external system components had
been integrated into the same chip as the processor, resulting in integrated circuits
called microcontrollers , and widespread use of embedded systems became feasible.
As the cost of a microcontroller fell below $1, it became feasible to replace
expensive knob-based analog components such as potentiometers and variable
capacitors with digital electronics controlled by a small microcontroller with up/down
buttons or knobs. By the end of the 80s, embedded systems were the norm rather than
the exception for almost all electronics devices, a trend which has continued since.
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1.2. ARM MICROCONTROLLER
The ARM7TDMI core is a 32 bit embedded RISC processor delivered as a hard
macro cell optimized to provide the best combination of performance, power and area
characteristics. The ARM7TDMI core enables system designers to build embedded
devices requiring small size, low power and high performance. The ARM7 family also
includes the ARM7TDMI processor, the ARM7TDMI-S processor, the ARM720T
processor and the ARM7EJ-S processors, each of which has been developed to address
different market requirements. The ARM7TDMI core is available via the ARM
Processor Foundry Program and the design Start Program.
ARM History
The ARM design was started in 1983 as a development project at Acorn
Computers Ltd. The team, led by Roger Wilson and Steve Furber , started development
of what in some ways resembles an advanced MOS Technology 6502. Acorn had a long
line of computers based on the 6502, so a chip that was similar to program could
represent a significant advantage for the company.
The team completed development samples called ARM1 by April1985, and the
first "real" production systems as ARM2 the following year. The ARM2 featured a 32-
bit data bus, a 26-bit address space giving a 64MB byte address range and sixteen 32-
bit registers. One of these registers served as the (word aligned) program counter with
its top 6 bits and lowest 2 bits holding the processor status flags. The ARM2 was
possibly the simplest useful 32-bit microprocessor in the world, with only 30,000
transistors (compare with Motorola's six-year older 68000 model with around 70,000
transistors). Much of this simplicity comes from not having microcode (whichrepresents about one-fourth to one-third of the 68000) and, like most CPUs of the day,
not including any cache.
This simplicity led to its low power usage, while performing better than the
Intel 80286. A successor, ARM3, was produced with a 4KB cache, which further
improved performance. In the late 1980s Apple Computer started working with Acorn
on newer versions of the ARM core. The work was so important that Acorn spun off the
design team in 1990 into a new company called Advanced RISC Machines Ltd.. For
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this reason, ARM is sometimes expanded as Advanced RISC Machine instead of Acorn
RISC Machine. Advanced RISC Machines became ARM Ltd when its parent company,
ARM Holdings plc, floated on the London Stock Exchange and NASDAQ in 1998.
This work would eventually turn into the ARM6. The first models were released
in 1991, and Apple used the ARM6-based ARM 610 as the basis for their Apple
Newton PDA. In 1994, Acorn used the ARM 610 as the main CPU in their RISC PC
computers. The core has remained largely the same size throughout these changes.
ARM2 had 30,000 transistors, while the ARM6 grew to only 35,000. The idea is that
the Original Design Manufacturer combines the ARM core with a number of optional
parts to produce a complete CPU, one that can be built on old semiconductor fabs and
still deliver lots of performance at a low cost. ARM's business has always been to sell
IP cores, which licensees use to create microcontrollers and CPUs based on this core.
The most successful implementation has been the ARM7TDMI with hundreds of
millions sold in almost every kind of microcontroller equipped device.
DEC licensed the architecture (which caused some confusion because they also
produced the DEC Alpha) and produced the Strong ARM. At 233 MHz this CPU drew
only 1 watt of power (more recent versions draw far less). This work was later passed to
Intel as a part of a lawsuit settlement, and Intel took the opportunity to supplement their
aging i960 line with the Strong ARM. Intel later developed its own high performance
implementation known as XScale which it has since sold to Marvell.
The common architecture supported on smart phones, Personal Digital
Assistants and other handheld devices is ARMv4. XScale and ARM926 processors are
ARMv5TE, and are now more numerous in high-end devices than the Strong ARM,
ARM925T and ARM7TDMI based ARMv4 processors.
1.3 MICRO CONTROLLER
A microcontroller (sometimes abbreviated µC, uC or MCU) is a small computer
on a single integrated circuit containing a processor core, memory, and programmable
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input/output peripherals. Program memory in the form of NOR flash or OTP ROM is
also often included on chip, as well as a typically small amount of RAM.
Microcontrollers are designed for embedded applications, in contrast to
the microprocessors used in personal computers or other general purpose applications.
Microcontrollers are used in automatically controlled products and devices,
such as automobile engine control systems, implantable medical devices, remote
controls, office machines, appliances, power tools, and toys. By reducing the size and
cost compared to a design that uses a separate microprocessor, memory, and
input/output devices, microcontrollers make it economical to digitally control even
more devices and processes. Mixed signal microcontrollers are common, integrating
analog components needed to control non-digital electronic systems.
Some microcontrollers may use Four-bit words and operate at clock rate frequencies as
low as 4 kHz, for low power consumption (milli watts or microwatts). They will
generally have the ability to retain functionality while waiting for an event such as a
button press or other interrupt; power consumption while sleeping (CPU clock and most
peripherals off) may be just nano watts, making many of them well suited for long
lasting battery applications. Other microcontrollers may serve performance-critical
roles, where they may need to act more like a digital signal processor (DSP), with
higher clock speeds and power consumption.
History:
The first single-chip microprocessor was the 4-bit Intel 4004 released in 1971,
with the Intel 8008 and other more capable microprocessors becoming available over
the next several years.
These however all required external chip(s) to implement a working system,
raising total system cost, and making it impossible to economically computerize
appliances.
The first computer system on a chip optimized for control applications was
the Intel 8048, released in 1975, with both RAM and ROM on the same chip. This chip
would find its way into over one billion PC keyboards, and other numerous
applications. At this time Intel’s President, Luke J. Valenter, stated that the
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Design of a PC Controlled Ploughing Vehicle
(Microcontroller) was one of the most successful in the company’s history, and
expanded the division's budget over 25%.
Most microcontrollers at this time had two variants. One had an
erasable EPROM program memory, which was significantly more expensive than
the PROM variant which was only programmable once.
In 1993, the introduction of EEPROM memory allowed microcontrollers
(beginning with the Microchip PIC16x84) to be electrically erased quickly without an
expensive package as required for EPROM, allowing both rapid prototyping, and In
System Programming. The same year, Atmel introduced the first microcontroller
using Flash memory. Other companies rapidly followed suit, with both memory types.
Cost has plummeted over time, with the cheapest 8-bit microcontrollers being
available for under $0.25 in quantity (thousands) in 2009, and some 32-bit
microcontrollers around $1 for similar quantities.
In the future, MRAM could potentially be used in microcontrollers as it has
infinite endurance and its incremental semiconductor wafer process cost is relatively
low.
Embedded Design:
A microcontroller can be considered a self-contained system with a processor,
memory and peripherals and can be used as an embedded system. The majority of
microcontrollers in use today are embedded in other machinery, such as automobiles,
telephones, appliances, and peripherals for computer systems. These are
called embedded systems. While some embedded systems are very sophisticated, many
have minimal requirements for memory and program length, with no operating system,
and low software complexity. Typical input and output devices include
switches, relays, solenoids, LEDs, small or custom LCD displays, radio frequency
devices, and sensors for data such as temperature, humidity, light level etc. Embedded
systems usually have no keyboard, screen, disks, printers, or other recognizable I/O
devices of a personal computer , and may lack human interaction devices of any kind.
1.4 EXISTING SYSTEM
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As with many successful devices, probably no single person could be credited
with the invention of the flight data recorder. However, one of the earliest and proven
attempts was made by François Hussenot and Paul Beaudouin in 1939 at the Marignane
flight test center, France, with their "type HB" flight recorder. This was an essentially
photograph-based device, because the record was made on a scrolling eight meters long
by 88 milimeters wide photographic film. The latent image was made by a thin ray of
light deviated by a mirror tilted according to the magnitude of the data to record
(altitude, speed, etc). A pre-production run of 25 "HB" recorders was ordered in 1941
and HB recorders remained in use in French test centers well into the seventies. In
1947, Hussenot, Beaudouin and associate Marcel Ramolfo founded the Société
Française d'Instruments de Mesure to market their design. This company went on
becoming a major supplier of data recorders, used not only aboard aircraft but also
trains and other vehicles. SFIM is today part of the Safran group and is still present on
the flight recorder market.
The advantage of the film technology was that it could be easily developed
afterwards and provide a durable, visual feedback of the flight parameters without
needing any playback device. On the other hand, unlike magnetic bands or later flash
memory-based technology, a photographic film cannot be erased and recycled, and so it
must be changed periodically. As such, this technology was reserved for one-shot uses,
mostly during planned test flights; and it was not mounted aboard civilian aircraft
during routine commercial flights. Also, the cockpit conversation was not recorded.
The first prototype coupled FDR/CVR designed with civilian aircraft in mind,
for explicit post-crash examination purposes, was produced in 1956 by Dr.David
Warren of the Defence Science and Technology Organisations', Aeronautical Research
Laboratories in Melbourne, Australia. In 1953 and 1954, a series of fatal accidents
involving the De Havilland DH106 Comet prompted the grounding of the entire fleet
pending an investigation. Dr. Warren, a chemist specializing in aircraft fuels, was
involved in a professional committee discussing the possible causes. Since there had
been neither witnesses nor survivors, Dr. Warren conceived of a crash-survivable
method to record the flight crew's conversation (and other pre-crash data), reasoning
they would greatly assist in determining a cause and enabling the prevention of future,
avoidable accidents of the same type.
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The Black Box units for motor vehicles were firstly planned in early seventies,
when the USA Nation Bureau for Road – Traffic Safety started using device, which was
able to work out the analog signal and was able to save gained data. In 1976 GM
introduced SDM module (Sensing and Diagnostic Module), which was improved to so
called DERM (Diagnostic and Energy Reserve Module) in 1990. The main target of
this module consists of recording and saving data from measuring sensors including
error messages at the time when the airbag is activated. In 1990 GM installed the first
sophisticated electronic accident data recorder in F1 cars.
1.5 PROPOSED SYSTEM
The main purpose of this project is to develop a prototype for the Black BoxSystem for vehicle diagnosis that can be installed into vehicle all over the world. This
prototype can be designed with minimum number of circuits. The black box for the
vehicle diagnosis can contribute to the constructing safer vehicles, improving the
treatment of crash victims helping insurance companies with their vehicle crash
investigations.
According to the World Health Organization, more than a million people in the
world die each year because of transportation-related accidents. In order to react to this
situation, the black box system draws the first step to solve problem. Like flight data
recorders in aircraft, "black box” technology can now play a key role in motor vehicle
crash investigations. A significant number of vehicles currently on the roads contain
electronic systems that record in the event of a crash. That is why it is so important to
have recorders that objectively track what goes on in vehicles before, during and after a
crash as a complement to the was used. Subjective input that is taken usually from
victims, eye witnesses and police reports.
2. DESIGN RATIONALISM
2.1 SYSTEM DESIGN
2.1.1 Description
The Ploughing Vehicle System comprises of two sections. This classification
can be done by the System working functionality. These two sections are
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Design of a PC Controlled Ploughing Vehicle
1. Vehicle section
2. Controlling section
Vehicle Section:
The vehicle section consists of an ARM7 Micro Controller(LPC 2129), RF
Transceiver, Wireless Camera ,DC Gear Motors and Power supply.
The Wireless camera connected to the vehicle captures the video where the
vehicle has to plough the field and the video transmits wirelessly to the controlling
section where the farmer can see the ploughing action but camera has not interfaced
with microcontroller in vehicle section. The RF Transceiver acts as a receiver on this
section ,which is used to receive the commands from the controlling section and make
to move the vehicle accordingly .The L293D dual H-Bridge motor driver interfaced to
two dc gear motors which can control the vehicle in both clockwise and anticlockwise
direction and another L293D motor drive us used to lift up and down the ploughing
prototype
BLOCK DIAGRAM:
Vehicle section:
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Design of a PC Controlled Ploughing Vehicle
Figure 2.1 Receiver controller side block diagram
Controlling station:
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Design of a PC Controlled Ploughing Vehicle
Figure 2.2 Transmitter Controller Side Block Diagram
The controlling section consists of a personal computer, a RF Transceiver
module, Video Receiver, TV Tuner Card. Personal computer is connected to the RF
Transceiver with the help of Windows HyperTerminal. By this we will pass the
commands in order to control the movement of the vehicle.
The commands transmitted by the RF Transceiver are received by the RF
Transceiver through antenna, after which these are decoded and sent to the LPC 2129 inVehicle section which drives the motor through L293D motor driver. The Ploughing
Vehicle starts moving as per the received commands. As the vehicle keeps moving, the
wireless camera transmits the video and it can be received by Video receiver and
through internal TV-tuner card displays the same on PC.
2.2.2 Working of the Project:
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Popularly referred to as a "Black Box," the data recorded by the EEPROM is
used for accident investigation, as well as for analyzing safety issues.
EEPROM stores the data recorded by the pressure sensor, proximity sensor and
the temperature sensor. Different modules of the system communicate with the
processor i.e. LPC 2129 using CAN protocol whereas the processor communicates with
the EEPROM using I2C protocol. CAN is a single bus simple protocol which offers
efficient and reliable communication using CSMA/CD and features like features like
multi-master, arbitration, fault detection. I2C is a low-bandwidth, short distance
protocol for on board communications. All devices are connected through two wires:
serial data (SDA) and serial clock (SCL). I2C has a master/slave protocol.
Initially the system waits for the ignition key to be pressed. As the key is
pressed, the system starts checking for the functioning of the critical modules viz brakes
and seat belt .If either or all the modules are found to be faulty, the test fails and motor
doesn’t turn on. For the demonstration purpose, jumpers are used for the seat belt and
the brakes.
After the critical modules are tested and passed, the system checks for the non
critical modules viz., the CAN and GSM. Even if either or both are found to be faulty,
the motor turns on. GSM status fails if the SIM is found missing or is not inserted
properly. CAN test fails if the sensors are not working properly or the data is not being
communicated properly.
After both critical and non critical modules are tested and the status of critical
modules is passed, the motor turns on. For the demonstration purpose, a toy car with dc
motors is used. The speed and direction of rotation is controlled by the user using RFcommunication. The commands are issued from the HyperTerminal of a PC, which is
connected to 8051 microcontroller.
This data is encoded and transmitted through RF transmitter, which is interfaced
to the 8051 microcontroller. The receiver part of the system consists of different
modules interfaced to LPC 2129 as shown in fig 2.2. The LPC 2129 is driven by 1.8 V
power supply whereas the peripherals use 3.3 V power supply.
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and how to configure the tools in the correct way. KEIL can then execute each tool with
the correct options. It is also possible to create new projects in KEIL. Source files are
added to the project and the tool options are set as required. The project can then be
saved to preserve the settings. The project also stores such things as which windows
were left open in the simulator/debugger, so when a project is reloaded and the
simulator or debugger started, all the desired windows are opened. KEIL project files
have the extension.
Simulator/Debugger
The simulator/ debugger in KEIL can perform a very detailed simulation of a
micro controller along with external signals. It is possible to view the precise executiontime of a single assembly instruction, or a single line of C code, all the way up to the
entire application, simply by entering the crystal frequency. A window can be opened
for each peripheral on the device, showing the state of the peripheral. This enables
quick trouble shooting of mis-configured peripherals. Breakpoints may be set on either
assembly instructions or lines of C code, and execution may be stepped through one
instruction or C line at a time. The contents of all the memory areas may be viewed
along with ability to find specific variables. In addition the registers may be viewed
allowing a detailed view of what the microcontroller is doing at any point in time.
The Keil Software 8051 development tools listed below are the programs you
use to compile your C code, assemble your assembler source files, link your program
together, create HEX files, and debug your target program. µVision2 for Windows™
Integrated Development Environment: combines Project Management, Source Code
Editing, and Program Debugging in one powerful environment.
• C51 ANSI Optimizing C Cross Compiler: creates relocatable object modules
from your C source code,
• A51 Macro Assembler: creates relocatable object modules from your
8051 assembler source code,
• BL51 Linker/Locator: combines relocatable object modules created by the
compiler and assembler into the final absolute object module,
•
LIB51 Library Manager: combines object modules into a library, which may beused by the linker,
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• OH51 Object-HEX Converter: creates Intel HEX files from absolute object
modules.
3.1.2. Embedded C
Sometimes, a tapset needs provide data values from the kernel that cannot be
extracted using ordinary target variables ($var). This may be because the values are in
complicated data structures, may require lock awareness, or are defined by layers of
macros. Systemtap provides an ``escape hatch'' to go beyond what the language can
safely offer.
In certain contexts, you may embed plain raw C in tapsets, exchanging power
for the safety guarantees listed in section 3.6. End-user scripts may not include
embedded C code, unless systemtap is run with the -g (``guru'' mode) option. Tapset
scripts get guru mode privileges automatically.
Embedded C can be the body of a script function. Instead enclosing the function
body statements in {and }, use %{ and %}. Any enclosed C code is literally transcribedinto the kernel module: it is up to you to make it safe and correct. In order to take
parameters and return a value, a pointer macro THIS is available. Function parameters
and a place for the return value are available as fields of that pointer. The familiar data-
gathering functions pid (), execname (), and their neighbors are all embedded C
functions.
Since systemtap cannot examine the C code to infer these types, optional
annotation syntax is available to assist the type inference process. Simply suffix
parameter names and/or the function name with string or long to designate the string
or numeric type.
In addition, the script may include a %{ %} block at the outermost level of the
script, in order to transcribe declarative code like #include <linux/foo.h>. These
enable the embedded C functions to refer to general kernel types. There are a number of
safety-related constraints that should be observed by developers of embedded C code.
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1. Do not dereference pointers that are not known or testable valid.
2. Do not call any kernel routine that may cause a sleep or fault.
3. Consider possible undesirable recursion, where your embedded C function calls
a routine that may be the subject of a probe. If that probe handler calls your
embedded C function, you may suffer infinite regress. Similar problems may
arise with respect to non-reentrant locks.
4. If locking of a data structure is necessary, use a trylock type call to attempt
to take the lock. If that fails, give up, do not block.
3.2 HARDWARE TOOLS
3.2.1 ATMEL AT89S52 Microcontroller
The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller
with 4K Bytes of In-System Programmable Flash memory. The device is manufactured
using Atmel’s high-density nonvolatile memory technology and is compatible with the
industry standard 80C51 instruction set and pin out.
The on-chip Flash allows the program memory to be reprogrammed in-system or
by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU
with In-System Programmable Flash on a monolithic chip, the Atmel AT89S52 is a
powerful microcontroller which provides a monolithic chip, the Atmel AT89S52 is a
powerful microcontroller which provides a highly-flexible.
The AT89S52 provides the following standard features: 4K bytes of Flash,128
bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, two 16-bit timer/counters, a
five-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and
clock circuitry. In addition, the AT89S52 is designed with static logic for operation down to
zero frequency and supports two software selectable power saving modes.
The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port,
and interrupt system to continue functioning. The Power-down mode saves the RAM
con- tents but freezes the oscillator, disabling all other chip functions until the next
external interrupt or hardware reset.
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Atmel microcontrollers internally have the different functional properties. This
functionality can be done in step by step process as shown in figure 3.1
Figure3.1 Block diagram of microcontroller
Pin Description
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VCC Supply voltage.
GND Ground.
Port0
Port 0 is an 8-bit open drain bi-directional I/O port. As an output port, each pin
can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as
high-impedance inputs. Port 0 can also be configured to be the multiplexed low-order
address/data bus during accesses to external program and data memory. In this mode,P0
has internal pull-ups. Port 0 also receives the code bytes during Flash programming and
outputs the code bytes during program verification.
Note: External pull-ups are required during program verification
Port1
Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1Output
buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are
pulled high by the internal pull-ups and can be Used as inputs. As inputs, Port 1 pins that
are externally being pulled Low, will source current (IIL) because of the internal pull-ups
Port 1 also receives the low-order address bytes during Flash Programming and
verification.
Table 3.1 Alternate Functions of Port1
Port2
Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output
buffers can sink / source four TTL inputs. When 1s are written to Port 2 pins, they are
pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins thatare externally being pulled low will source current () because of the internal pull-ups.
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Port 2 emits the high-order address byte during fetches from external program memory
and during accesses to external data memory that uses 16-bit addresses (MOVX @
DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During
accesses to external data memory that uses 8-bit addresses (MOVX @ RI), Port 2 emits
the contents of the P2 Special function Register. Port 2 also receives the high-order
address bits and some control signals during Flash programming and verification.
Port3
Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output
buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are
pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins thatare externally being pulled low will source current because of the pull-ups. Port 3
receives some control signals for Flash programming and verification. Port 3 also serves
the functions of various special features of the AT89S52, as shown in the following
table.
Table 3.2 Alternate Functions of PORT3
RST
Reset input. A high on this pin for two machine cycles while the oscillator is
running resets the device. This pin drives High for 98 oscillator periods after the
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Watchdog times out. The DIS-RTO bit in SFR AUXR (address 8EH) can be used to
disable this feature. In the default state of bit DISRTO, the RESET HIGH out feature is
enabled.
ALE/PROG
Address Latch Enable (ALE) is an output pulse for latching the low byte of the
address during accesses to external memory. This pin is also the program pulse input
(PROG) during Flash programming. In normal operation, ALE is emitted at a constant
rate of 1/6 the oscillator frequency and may be used for external timing or clocking
purposes. Note, however, that one ALE pulse is skipped during each access to external
data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction.
Otherwise, the pin is weakly pulled high ... setting the ALE-disable bit has no effect if
the microcontroller is in external execution mode.
PSEN
Program Store Enable (PSEN) is the read strobe to external program memory.
When the AT89S52 is executing code from external program memory, PSEN is
activated twice each machine cycle, except that two PSEN activations are skipped during
each access to external data memory.
EA/VPP
External Access Enable , EA must be strapped to GND in order to enable the
device to fetch code from external program memory locations starting at 0000H up to
FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched
on reset. EA should be strapped to Vcc for internal program executions. This pin also
receives the 12-volt programming enable voltage (Vff) During Flash programming.
UART
Atmel controller supports UART communication as Full Duplex UART Serial
channel. It can send and receive the data with respect to controller. It transmits data at
standard speeds of 9600, 19200 bps etc. UART automatically senses the start of
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transmission of RX line and then inputs the whole byte and when it has the byte, it
informs CPU to read that data from one of its registers. The UART always transmits
data on pin Port3.1 TXD; The UART always receives data on pin Port3.0 RXD.
Special Function Registers
A map of the on-chip memory area called the Special Function Register (SFR)
space is shown in Table 3.3 Note that not all of the addresses are occupied, and
unoccupied addresses may not be implemented on the chip. Read accesses to these
addresses will in general return random data, and write accesses will have an
indeterminate effect.
User software should not write 1s to these unlisted locations, since they may be
used in future products to invoke new features. In that case, the reset or inactive values
of the new bits will always be 0.
Interrupt Registers
The individual interrupt enable bits are in the IE register. Two priorities can be set
for each of the five interrupt sources in the IP register.
Table 3.3 AUXR (Auxiliary register)
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Dual Data Pointer Registers:
To facilitate accessing both internal and external data memory, two banks of 16-
bit Data Pointer Registers are provided: DP0 at SFR address locations 82H-83H and
DP1 at 84H-85H. Bit DPS = 0 in SFR AUXR1 selects DP0 and DPS = 1 selects DP1.
The user should ALWAYS initialize the DPS bit to the appropriate value before
accessing the respective Data Pointer Register.
Power off Flag:
The Power off Flag (POF) is located at bit 4 (PCON.4) in the PCON SFR. POF
is set to “1” during power up. It can be set and rest under software control and is not
affected by reset.
Table 3.4 AUXR1 (auxiliary register1)
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Memory Organization
MCS-51 devices have a separate address space for Program and Data Memory.
Up to 64k bytes each of external Program and Data Memory can be addressed.
Program Memory
If the EA pin is connected to GND, all program fetches are directed to external
memory. On the AT89S52, if EA is connected to Vcc, program fetches to addresses
0000H through FFFH are directed to internal memory and fetches to addresses 1000H
through FFFFH are directed to external memory.
Data Memory
The AT89S51 implements 128 bytes of on-chip RAM. The 128 bytes are
accessible via direct and indirect addressing modes. Stack operations are examples of
indirect addressing, so the 128 bytes of data RAM are available as stack space.
Interrupts
The AT89S52 has a total of five interrupt vectors: two external interrupts (INT0
and INT1), two timer interrupts (Timers 0 and 1), and the serial port interrupt. These
interrupts are all shown in Table 3.5 Each of these interrupt sources can be individually
enabled or disabled by setting or clearing a bit in Special Function Register IE. IE also
contains a global disable bit, EA, which disables all interrupts at once. Note that below
Table shows that bit positions IE.6 and IE.5 are unimplemented.
User software should not write 1s to these bit positions, since they may be used
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in future AT89 products. The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2
of the cycle in which the timers overflow. The values are then polled by the circuitry in
the next cycle.
Table 3.5 Interrupt Enable (IE) Register
Oscillator Characteristics
XTAL1 and XTAL2 are the input and output, respectively, of an inverting
amplifier that can be configured for use as an on-chip oscillator, as shown in Figure 3.2.
Either a quartz crystal or ceramic resonator may be used. To drive the device from an
external clock source, XTAL2 should be left unconnected while XTAL1 is driven, as
shown in Figure 3.3. There are no requirements on the duty cycle of the external clock
signal, since the input to the internal clocking circuitry is through a divide-by-two flip-
flop, but minimum and maximum voltage high and low time specifications must be
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observed.
Figure3.2 Oscillator connections
Note: C1,C2 = 30 pf ± 10 pf For Crystals
= 40 pf ± 10 pf For Ceramic Resonators
Figure3.3 Clock Drive Configuration
3.2.2 LPC2129
General description
The LPC2129 are based on a 16/32-bit ARM7TDMI-S CPU with real-time
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emulation and embedded trace support, together with 64/128/256 kB of embedded
high-speed flash memory. A 128-bit wide memory interface and unique accelerator
architecture enable 32-bit code execution at maximum clock rate. For critical code
size applications, the alternative 16-bit Thumb mode reduces code by more than 30
% with minimal performance penalty.
With their compact 64-pin package, low power consumption, various 32-bit
timers, 4-channel 10-bit ADC, two advanced CAN channels, PWM channels and 46
fast GPIO lines with up to nine external interrupt pins these microcontrollers are
particularly suitable for automotive and industrial control applications, as well as
medical systems and fault-tolerant maintenance buses. With a wide range of additional
serial communications interfaces, they are also suited for communication gateways and
protocol converters as well as many other general-purpose applications.
Key features of LPC2129
• Fast GPIO ports enable port pin toggling up to 3.5 times faster than the original
device. They also allow for a port pin to be read at any time regardless of its
function.
• Dedicated result registers for ADC(s) reduce interrupt overhead. The ADC pads
are 5 V tolerant when configured for digital I/O function(s).
• UART0/1 includes fractional baud rate generator, auto-bauding capabilities and
handshake flow-control fully implemented in hardware.
• Buffered SSP serial controller supporting SPI, 4-wire SSI, and Micro wire
formats.
• SPI programmable data length and master mode enhancement.
• Diversified Code Read Protection (CRP) enables different security levels to be
implemented. This feature is available in LPC2129 devices as well.
• General purpose timers can operate as external event counters.
Architectural overview
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The ARM7TDMI-S is a general purpose 32-bit microprocessor, which offers
high performance and very low power consumption. The ARM architecture is based
on Reduced Instruction Set Computer (RISC) principles, and the instruction set and
related decode mechanism are much simpler than those of micro programmed
Complex Instruction Set Computers. This simplicity results in a high instruction
throughput and impressive real-time interrupt response from a small and cost-
effective processor core.
Pipeline techniques are employed so that all parts of the processing and
memory systems can operate continuously. Typically, while one instruction is being
executed, its successor is being decoded, and a third instruction is being fetched from
memory.
The ARM7TDMI-S processor also employs a unique architectural strategy
known as Thumb, which makes it ideally suited to high-volume applications with
memory restrictions, or applications where code density is an issue.
The key idea behind Thumb is that of a super-reduced instruction set.
Essentially, the ARM7TDMI-S processor has two instruction sets:
• The standard 32-bit ARM set.
• A 16-bit Thumb set.
The Thumb set’s 16-bit instruction length allows it to approach twice the
density of standard ARM code while retaining most of the ARM’s performance
advantage over a traditional 16-bit processor using 16-bit registers.
Interrupt sources
Each peripheral device has one interrupt line connected to the Vectored
Interrupt Controller, but may have several internal interrupt flags. Individual interrupt
flags may also represent more than one interrupt source.
On-chip flash program memory
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The LPC2129 incorporate a 256 kB flash memory system, respectively. This
memory may be used for both code and data storage. Programming of the flash
memory may be accomplished in several ways. It may be programmed In System via
the serial port. The application program may also erase and/or program the flash while
the application is running, allowing a great degree of flexibility for data storage field
firmware upgrades, etc. When on-chip boot loader is used, 60/120/248 kB of flash
memory is available for user code.
The LPC2129 flash memory provides a minimum of 100000 erase/write cycles
and 20 years of data retention. On-chip boot loader (as of revision 1.60) provides Code
Read Protection (CRP) for the LPC2109/2119/2129 on-chip flash memory. When the
CRP is enabled, the JTAG debug port and ISP commands accessing either the on-chip
RAM or flash memory are disabled. However, the ISP flash erase command can be
executed at any time (no matter whether the CRP is on or off). Removal of CRP is
achieved by erasure of full on-chip user flash. With the CRP off, full access to the chip
via the JTAG and/or ISP is restored.
On-chip static RAM
On-chip static RAM may be used for code and/or data storage. The SRAM may be
accessed as 8 bit, 16 bit, and 32 bit. The LPC2129 provides 8 kB of static RAM for the
LPC2109 and 16 kB for the LPC2119 and LPC2129.
10-bit ADC
The LPC2129 each contains a single 10-bit successive approximation ADC
with four multiplexed channels.
ADC features available in LPC2129
Every analog input has a dedicated result register to reduce interrupt overhead.
Every analog input can generate an interrupt once the conversion is completed.
The ADC pads are 5 V tolerant when configured for digital I/O function(s).
UARTs
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The LPC2129 each contains two UARTs. In addition to standard transmit and
receive data lines, the UART1 also provide a full modem control handshake interface.
UART features available in LPC2129
Compared to previous LPC2000 microcontrollers, UARTs in LPC2129
introduce a fractional baud rate generator for both UARTs, enabling these
microcontrollers to achieve standard baud rates such as 115200 Bd with any crystal
frequency above 2MHz. In addition, auto-CTS/RTS flow-control functions are fully
implemented in hardware.
Fractional baud rate generator enables standard baud rates such as 115200 Bd
to be achieved with any crystal frequency above 2 MHz
Auto-bauding.
Auto-CTS/RTS flow-control fully implemented in hardware.
Pulse width modulator
The PWM is based on the standard Timer block and inherits all of its features,
although only the PWM function is pinned out on the LPC2129. The Timer is designedto count cycles of the peripheral clock (PCLK) and optionally generate interrupts or
perform other actions when specified timer values occur, based on seven match
registers. The PWM function is also based on match register events.
The ability to separately control rising and falling edge locations allows the
PWM to be used for more applications. For instance, multi-phase motor control
typically requires three non-overlapping PWM outputs with individual control of all
three pulse widths and positions. Two match registers can be used to provide a single
edge controlled PWM output. One match register (MR0) controls the PWM cycle rate,
by resetting the count upon match. The other match register controls the PWM edge
position. Additional single edge controlled PWM outputs require only one match
register each, since the repetition rate is the same for all PWM outputs.
Multiple single edge controlled PWM outputs will all have a rising edge at the
beginning of each PWM cycle, when an MR0 match occurs. Three match registers can be used to provide a PWM output with both edges controlled. Again, the MR0 match
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register controls the PWM cycle rate. The other match registers control the two PWM
edge positions. Additional double edge controlled PWM outputs require only two
matches registers each, since the repetition rate is the same for all PWM outputs.
With double edge controlled PWM outputs, specific match registers control the
rising and falling edge of the output. This allows both positive going PWM pulses
(when the rising edge occurs prior to the falling edge), and negative going PWM pulses
(when the falling edge occurs prior to the rising edge).
Features
Seven match registers allow up to six single edge controlled or three double
edge controlled PWM outputs, or a mix of both types.
The match registers also allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
Supports single edge controlled and/or double edge controlled PWM
outputs. Single edge controlled PWM outputs all go HIGH at the beginning of
each cycle unless the output is a constant LOW. Double edge controlled PWM
outputs can have either edge occur at any position within a cycle. This allows for
both positive going and negative going pulses.
Pulse period and width can be any number of timer counts. This allows
complete flexibility in the trade-off between resolution and repetition rate. All
PWM outputs will occur at the same repetition rate.
System control
Crystal oscillator
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The oscillator supports crystals in the range of 1 MHz to 30 MHz. The
oscillator output frequency is called f osc and the ARM processor clock frequency is
referred to as CCLK for purposes of rate equations, etc. f osc and CCLK are the same
value unless the PLL is running and connected.
PLL
The PLL accepts an input clock frequency in the range of 10 MHz to 25 MHz.
The input frequency is multiplied up into the range of 10 MHz to 60 MHz with a
Current Controlled Oscillator (CCO). The multiplier can be an integer value from 1 to
32 (in practice, the multiplier value cannot be higher than 6 on this family of
microcontrollers due to the upper frequency limit of the CPU). The CCO operates in therange of 156 MHz to 320 MHz, so there is an additional divider in the loop to keep the
CCO within its frequency range while the PLL is providing the desired output
frequency. The output divider may be set to divide by 2, 4, 8, or 16 to produce the
output clock. Since the minimum output divider value is 2, it is insured that the PLL
output has a 50 % duty cycle. The PLL is turned off and bypassed following a chip
Reset and may be enabled by software. The program must configure and activate the
PLL, wait for the PLL to Lock, then connect to the PLL as a clock source.
3.2.3 RADIO FREQUENCY COMMUNICATION
Radio frequency (abbreviated RF, rf, or r.f.) is a term that refers to alternating
current (AC) having characteristics such that, if the current is input to an antenna, an
electromagnetic (EM) field is generated suitable for wireless broadcasting and/or
communications. These frequencies cover a significant portion of the electromagnetic
radiation spectrum extending from nine kilohertz (9 kHz), the lowest allocated wireless
communications frequency (it's within the range of human hearing), to thousands of
gigahertz (GHz).The RF spectrum is divided into several ranges, or bands, with the
exception of the lowest-frequency segment, each band represents an increase of
frequency corresponding to an order of magnitude (power of 10). The table depicts the
eight bands in the RF spectrum, showing frequency and bandwidth ranges. The SHF
and EHF bands are often referred to as the microwave spectrum.
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Table3.6 Various Frequency ranges
Designation Abbreviation Frequencies
Free-space
Wavelengths
Very Low Frequency VLF 9 kHz - 30 kHz 33 km - 10 km
Low Frequency LF 30 kHz - 300 kHz 10 km - 1 km
Medium Frequency MF 300 kHz - 3 MHz 1 km - 100 m
High Frequency HF 3 MHz - 30 MHz 100 m - 10 m
Very High Frequency VHF30 MHz - 300
MHz
10 m - 1 m
Ultra High Frequency UHF 300 MHz - 3 GHz 1 m - 100 mm
Super High Frequency SHF 3 GHz - 30 GHz 100 mm - 10 mm
Extremely High
FrequencyEHF 30 GHz - 300 GHz 10 mm - 1 mm
Radio frequency (RF) is a frequency or rate of oscillation within the range of
about 3 Hz to 300 GHz. This range corresponds to frequency of alternating current
electrical signals used to produce and detect radio waves. Since most of this range is
beyond the vibration rate that most mechanical systems can respond to, RF usually
refers to oscillations in electrical circuits or electromagnetic radiation.
3.4 L293D
3.4.1 Block diagram
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Fig 3.3: Block diagram of L293D motor driver
3.4.2 Pin configuration
Fig 3.4: Pinning of L293D
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3.4.3 Description
The L293D is a monolithic integrated high voltage, high current four
channel driver designed to accept standard DTL or TTL logic levels and drive
inductive loads (such as relays solenoids, DC and stepping motors) andswitching power transistors. To simplify use as two bridges each pair of
channels is equipped with an enable input. A separate supply input is
provided for the logic, allowing operation at a lower voltage and internal
clamp diodes are included. This L293D is suitable for use in switching
applications at frequencies up to 5 kHz. The L293D is assembled in a 16
lead plastic package which has 4 centre pins connected together and used
for heat sinking. The L293DD is assembled in a 20 lead surface mount which
has 8 centre pins connected together and used for heat sinking.
3.4.4 Features
600mA output current capability channel.
1.2A peak output current (non repetitive) per channel.
Enable facility.
Over temperature protection.
Logical "0” input voltage up to 1.5 V.
Internal clamp diodes.
3.4.5 Interfacing the L293D with LPC 2129
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Fig 3.5: Interfacing L293D with LPC 2129
CC2500
Low-Cost Low-Power 2.4 GHz RF Transceiver
Applications
2400-2483.5 MHz ISM/SRD band systems
Consumer electronics
Wireless game controllers
Wireless audio
Wireless keyboard and mouse
RF enabled remote controls
Product Description
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The CC2500 is a low-cost 2.4 GHz transceiver designed for very low-power wireless
applications. The circuit is intended for the 2400-2483.5 MHz ISM (Industrial,
Scientific and Medical) and SRD (Short Range Device)frequency band. The RF
transceiver is integrated with a highly configurable baseband modem. The modem
supports various modulation formats and has a configurable data rate up to 500k
Baud.CC2500 provides extensive hardware support for packet handling, data buffering,
burst transmissions, clear channel assessment, link quality indication, and wake-on-
radio .The main operating parameters and the 64-byte transmit/receive FIFOs of
CC2500 can be controlled via an SPI interface. In a typical system, the CC2500 will be
used together with a microcontroller and a few additional passive
components.
Key Features
RF PerformanceHigh sensitivity (–104 dBm at 2.4 kBaud,1% packet error rate)
Low current consumption (13.3 mA in RX,250 k Baud, input well above sensitivity
limit)
Programmable output power up to +1 dBm
Excellent receiver selectivity and blocking performance
Programmable data rate from 1.2 to 500kBaud
Frequency range: 2400 – 2483.5 MHz
Low-Power Features 400 nA SLEEP mode current consumption
Fast startup time: 240 us from SLEEP to RX or TX mode (measured on EM
design)
Wake-on-radio functionality for automatic low-power RX polling
Separate 64-byte RX and TX data FIFOs(enables burst mode data transmission)
General Few external components: Complete onchip frequency synthesizer, no external
filters or RF switch needed
Green package: RoHS compliant and no antimony or bromine
Small size (QLP 4x4 mm package, 20pins)
Suited for systems compliant with EN 300328 and EN 300 440 class 2
(Europe),FCC CFR47 Part 15 (US), and ARIB STDT66Japan)
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Support for asynchronous and synchronous serial receive/transmit mode for
backwards compatibility with existing radio communication protocols
Operating ConditionsThe CC2500 operating conditions are listed in Table 2 below.
Parameter Min Max Unit Condition/Note
General Characteristics
Pin Configuration
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Pinout Overview
Circuit Description
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CC2500Simplified Block Diagram
A simplified block diagram of CC2500 is shown in Figure CC2500 features a low-IF
receiver. The received RF signal is amplified by the low noise amplifier (LNA) and
down-converted in quadrature (I and Q) to the intermediate frequency (IF). At IF, the
I/Q signals are digitised by the ADCs. Automatic gain control (AGC), fine channel
filtering, demodulation bit/packet synchronization are performed digitally. The
transmitter part of CC2500 is based on direct synthesis of the RF frequency. The
frequency synthesizer includes completely on-chip LC VCO and a 90 degrees phase
shifter for generating the I and Q LO signals to the down-conversion mixers in receive
mode. A crystal is to be connected to XOSC_Q1 and XOSC_Q2. The crystal oscillator
generates the reference frequency for the synthesizer, as well as clocks for the ADC and
the digital part. A 4-wire SPI serial interface is used for configuration and data buffer
access. The digital baseband includes support for channel configuration, packethandling, and data buffering.
1.Application CircuitOnly a few external components are required for using the CC2500. The recommended
application circuit is shown in Figure 3. The external components are described in
Table14, and typical values are given in Table 15.
1.1 Bias Resistor
The bias resistor R171 is used to set an accurate bias current.
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1.2 Balun and RF Matching
The components between the RF_N/RF_P pins and the point where the two signals are
joined together (C122, C132, L121, and L131) form a balun that converts the
differential RF signal on CC2500 to a single-ended RF signal. C121 and C131 areneeded for DC blocking. Together with an appropriate LC network, the balun
components also transform the impedance to match a 50 antenna (or cable).
Suggested values are listed in Table15. The balun and LC filter component values
andtheir placement are important to keep the performance optimized
1.3Crystal
The crystal oscillator uses an external crystal with two loading capacitors (C81 and
C101).
1.4Power Supply Decoupling
The power supply must be properly decoupled close to the supply pins. Note thatdecoupling capacitors are not shown in the application circuit. The placement and thesize of the decoupling capacitors are very important to achieve the optimum
performance
Table 14: Overview of External Components (excluding supply decoupling capacitors)
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Figure 3: Typical Application and Evaluation Circuit (excluding supply decouplingcapacitors)
11.Microcontroller Interface and Pin ConfigurationIn a typical system, CC2500 will interface to amicrocontroller. This microcontroller
must be able to:
Program CC2500 into different modes
Read and write buffered data
Read back status information via the 4-wire
SPI-bus configuration interface (SI, SO,SCLK and CSn)
11.1 Configuration Interface
The microcontroller uses four I/O pins for the SPI configuration interface (SI, SO,
SCLK and CSn)
11.2 General Control and Status Pins
The CC2500 has two dedicated configurablepins (GDO0 and GDO2) and one shared
pin(GDO1) that can output internal status information useful for control software.
These pins can be used togenerateinterrupts on the MCU. GDO1 is shared with the SO
pin in the SPI interface. The default setting for GDO1/SO is 3-state output. By selecting
any other of the programming options the GDO1/SO pin will become a generic pin.
When CSn is low, the pin will always function as a normal SO pin. In the synchronous
and asynchronous serial modes, the GDO0 pin is used as a serial TX data input pinwhile in transmit mode. The GDO0 pin can also be used for an on-chip analog
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temperature sensor. By measuring the voltage on the GDO0 pin with an external ADC,
the temperature can be calculated. With default PTEST register setting (0x7F) the
temperature sensor output is only available when the frequency synthesizer is enabled
(e.g. the MANCAL, FSTXON, RX and TX states). It is necessary to write 0xBF to the
PTEST register to use the analog temperature sensor in the IDLE state. Before leaving
the IDLE state, the PTEST register should be restored to its default value (0x7F)
11.3 Optional Radio Control Feature
The CC2500 has an optional way of controlling the radio, by reusing SI, SCLK and
CSn from the SPI interface. This feature allows for a simple three-pin control of the
major states of the radio: SLEEP, IDLE, RX and TX. This optional functionality is
enabled with the MCSM0.PIN_CTRL_EN configuration bit..
State changes are commanded as follows:
When CSn is high the SI and SCLK is set to the desired state according to Table 18.
When CSn goes low the state of SI and SCLK is latched and a command strobe is
generated internally according to the control coding. It is only possible to change state
with this functionality. That means that for instance RX
will not be restarted if SI and SCLK are set to RX and CSn toggles. When CSn is low
the SI and SCLK has normal SPI functionality. All pin control command strobes are
executed immediately, except the SPWD strobe, which is delayed until CSn goes high.
Table 18: Optional Pin Control Coding
TV tuner card
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A TV tuner card is a kind of television tuner that allows
television signals to be received by a computer . Most TV tuners also function as video
capture cards, allowing them to record television programs onto a hard disk much like
the digital video recorder (DVR) does
Fig: TV Tuner Card
Video capture cards are a class of video capture devices designed to plug directly into
expansion slots in personal computers and servers. Models from many manufacturers
are available; all comply with one of the popular host bus standards including PCI,
newer PCI Express (PCIe) or AGP bus interfaces.
These cards typically include one or more software
drivers to expose the cards' features, via various operating systems, to software
applications that further process the video for specific purposes. As a class, the cards
are used to capture baseband analog composite video, S-Video, and, in models
equipped with tuners, RF modulated video. Some specialized cards support digital
video via digital video delivery standards including Serial Digital Interface (SDI) and,
more recently, the emerging HDMI standard. These models often support both standard
definition (SD) and high definition (HD) variants. In this project, U-MAX-UTV 8300i
video capture card has been used .
This video capture card uses Philips 7130 chipset , which is newly built in TV
card integrating TV receiver. The users can watch, listen to and record TV programs on
PC. The powerful attached software enables to set and rename favorite channels .The
remote control makes watching TV through PC more convenient. We can transfer and
save the video captured from VCR , PC Camera(or)other video sources into hard disks
and burn into VCD/DVD by a CD burner
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Specifications of U-MAX-UTV 8300i:
1 .Full channel scan and auto scan
2. Screen display channel and volume
3. Encode MPEG-1, MPEG-2 files, create and burn VCD/DVD
4. Support still image snapshots and save to BMP, JPG file in PC.
5. It has resolution of PAL-720*576, NTSC-720*480
6. IR Control to watch /record TV
7. Picture in Picture (PIP)
8. Support Composite inputs
9. Working temperature-0 to 500C
10. Antenna-75 Ohm(UHF/VHF)
11. S-Video 4-pin mini DIP
12. RF reception range:49.25 MHZ-863.25MHZ
AV Receiver with Wireless Camera
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Figure: AV Receiver and Wireless Camera
AV receivers or audio-video receivers are one of the many consumer electronics
components typically found within a home theatre system. Their primary
purpose is to amplify sound from a multitude of possible audio sources as well as
route video signals to your TV from various sources. The user may program and
configure a unit to take inputs from devices such as DVD players, VCRs etc. and
easily select for which source he or she wants to route to their TV and have sound
output.
The term receiver basically refers to an amplifier that iscapable of receiving an audio & video signal from various devices. The basic
functionality is to receive an audio signal and amplify the same and to allow pass
through of the video signal onto a display device such as a projector or a television. As
home entertainment options expanded, so did the role of the receiver. The ability to
handle a variety of digital audio signals was added. More amplifiers were added for
surround sound playback. Video switching was added to simplify switching between
devices. Within the last few years, video processing has been added to many receivers.
AV inputs/outputs
There are a variety of possible connections on an AV receiver. Standard connectors
include:
• Analog audio (RCA connector , or occasionally XLR connector )
• Digital audio (S/PDIF; TOSLINK or RCA terminated coaxial cable)
• Composite video (RCA connector)
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• S-Video
• SCART video (primarily used in Europe and very uncommon in many other
parts of the world)
• Component video
• HDMI
• USB (usually involves special computer circuitry to read video formats from a
file system)
Analog audio connections usually use RCA plugs in stereo pairs. Inputs and outputs are
both common. Outputs are provided mainly for cassette tape decks.
Analog audio connections using XLR(Balanced) connectors are uncommon, andusually found on more expensive receivers.
Digital connections allow for the transmission of PCM, Dolby Digital or DTS audio.
Common devices include CD players, DVD players, or satellite receivers.
Composite video connections use a single RCA plug on each end. Composite video is
standard on all AV receivers allowing for the switching of video devices such as VHS
players, cable boxes, and game consoles. DVD players may be connected via composite
video connectors although a higher bandwidth connection is recommended.
S-Video connections offer better quality than composite video. It uses a DIN jack.
SCART connections generally offer the best quality video at standard-definition, due to
the use of pure RGB signalling (although composite and S-Video may alternatively be
offered over a SCART connector). SCART provides video and audio in one connection.
Component video has become the best connection for analog video as higher definitions
such as 720p have become common. The YPbPr signalling provides a good
compromise between resolution and colour definition.
HDMI is becoming common on AV receivers. It provides for the transmission of both
audio and video. HDMI is relatively new technology and there are reported issues with
devices not properly working with each other (referred to as hand-shake issues between
devices), especially cable/satellite boxes connected to a display through an AV receiver.
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Different levels of support are provided by receivers with HDMI connections. Some
will only switch video and not provide for audio processing. Some will not handle
multi-channel LPCM. Multi-channel LPCM is a common way for Blu-ray Disc and HD
DVD players to transmit the best possible audio.
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Description: Pinhole 1.2GHz Wireless Spy Camera Radio AV Receiver Set
Receiving Frequency: 1.2GHz
Intermediate Frequency: 480MhzFrequency Stabilization: +/-100Khz
Demodulation Mode: FM
Antenna: 50ohm SMA
Receiving Sensitivity: <-85dBm
Power Source: DC 9V
Dimension: 120x81x20mm (LxWxD)
Channels Available: 1
Channel Tuning for Multiple Cameras
AV OUT
Camera Specifications
Image Device: 1/3 CMOS
TV system: NTSC
Horizontal Definition: 380TV Lines
Angular Field of View: 38 deg
Minimum Illumination: 3.0 Lux
Synchronization System: Internal
Backlight Compensation: Auto
White Balance: Auto
S/N Ratio: >48dB
Operation Temperature: 0~35 deg C
Transmission Frequency: 1.2GHz
Locked Frequency
Power Adapter: DC 9V or 9V Battery
Dimension: 20x20x22mm (LxWxD)
Recommended Max Range for Objects: 5 Meters
Transmission Range: 12~15 Meters
Built In Microphone: Max Audio Range 1~2 Meters
Wireless or Wired RCA A/V Transmission
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It is mini wireless monitoring video camera and wireless receiver set for home and
small business surveillance and is used here for demonstration purpose. Simply install
the wireless camera in the room where we want to monitor and set the wireless receiver
in the next room (up to 15 meters away) and hook it up to a TV or DVR to watch the
action or record the footage for the security records. Here we are placing this wireless
camera in the ploughing vehicle.
Wireless camera specifications
1.380 TV lines picture display
2.Low radiation, safe and healthy
3.Built in microphone for audio monitoring
4.Suitable for monitoring children, elders and widely used for theft prevention ,home
security etc
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3.2.14 DC MOTOR
Figure 3.23 DC motor
In any electric motor, operation is based on simple electromagnetism. A current
carrying conductor generates a magnetic field; when this is then placed in an external
magnetic field, it will experience a force proportional to the current in the conductor,
and to the strength of the external magnetic field. As we know that opposite poles
attract, while like poles repel. The integral configuration of a dc motor is designed to
harness the magnetic interaction between a current carrying conductor and an external
magnetic field to generate magnetic field.
Let us consider a two pole DC Electric Motor where red represents the magnet
or winding with a north polarization while green represents the magnet or winding with
a south polarization.
Every DC Motor has six basic parts- axle, rotor, commutator, field magnet(s)
and brushes. In most common DC Motors the external magnetic field is produced by
high strength permanent magnet. The stator is the stationary part of the motor; this
includes motor casing, as well as two or more permanent magnet pole pieces. The rotor
along with the axle and attached commutator rotates with respect to stator. The rotor
consists of windings (generally on a core), the windings being electrically connected to
the commutator.
9V DC Gear Motors
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Fig:DC Gear Motor
A gear motor is a type of electrical motor. Like all electrical motors, it uses the
magnetism induced by an electrical current to rotate a rotor that is connected to a shaft.
The energy transferred from the rotor to the shaft is then used to power a connected
device. In a gear motor, the energy output is used to turn a series of gears in an
integrated gear train. There are a number of different types of gear motors, but the most
common are AC (alternating current) and DC (direct current).
In a gear motor, the magnetic current (which can be produced
by either permanent magnets or electromagnets) turns gears that are either in a gear
reduction unit or in an integrated gear box. A second shaft is connected to these gears.
The result is that the gears greatly increase the amount of torque the motor is capable of
producing while simultaneously slowing down the motor's output speed. The motor will
not need to draw as much current to function and will move more slowly, but will
provide greater torque.
Uses
Gear motors are commonly used in conveyor-belt drives, home appliances, in handicap
and platform lifts, medical and laboratory equipment, machine tools, packaging
machinery and printing presses.
A special type of gear motor, the servo motor, provides more power in a compact,
precise fashion, and is used when a motor with a rapid, accurate response is needed.
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DC Motor: High Torque Mini DC Gear Motor 3-12V, 5-25 rpm for
Hobby / Robots
Horse Power Cont. 0.075 ~ 0.3 WLength of Motor (excludingspindle)
40 mm
Gear Reduce Ratio 1: 108 Diameter of Motor 48. 8 mm
Voltage & Current
Torgue
3 ~12 V DC , Current
<25 mA (no load)
1000g-cm for starting @
6.0VDC
Length of Spindle 13.9 mm
RPM5rpm at 3V & 25 rpm at
12VDiameter of Spindle (with a flat) 7 mm
Reversibility Reversible Weight per Motor 4 oz
DC geared motor which gives good torque and rpm at lower voltages. This motor can run at approximately 150 rpm whendriven by a single Li-Ion cell.
Features
• Working voltage : 3V to 9V
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• Compatible wheel available as optional item • 40gm weight • Same size motor available in various rpm • 3 Kgf.cm torque • No-load current = 60 mA, Stall current = 700 mA
Universal asynchronous receiver/transmitter
A Universal Asynchronous Receiver/Transmitter , abbreviated UART ( /
ˈju ːɑr t/), is a type of "asynchronous receiver/transmitter", a piece of computer hardware that translates data between parallel and serial forms.UARTs are commonly used in conjunction with communication standardssuch as EIA, RS-232, RS-422 or RS-485. The universal designation indicatesthat the data format and transmission speeds are configurable and that theactual electric signaling levels and methods (such as differential signaling etc.) typically are handled by a special driver circuit external to the UART.
A UART is usually an individual (or part of an) integrated circuit used for serialcommunications over a computer or peripheral device serial port. UARTs arenow commonly included in microcontrollers. A dual UART, or DUART,combines two UARTs into a single chip. Many modern ICs now come with aUART that can also communicate synchronously; these devices are calledUSARTs (universal synchronous/asynchronous receiver/transmitter).
Transmitting and receiving serial dataSee also: Asynchronous serial communication
The Universal Asynchronous Receiver/Transmitter (UART) takes bytes of data and transmits the individual bits in a sequential fashion. [1] At thedestination, a second UART re-assembles the bits into complete bytes. Each
UART contains a shift register , which is the fundamental method of conversion between serial and parallel forms. Serial transmission of digitalinformation (bits) through a single wire or other medium is much more costeffective than parallel transmission through multiple wires.[citation needed ]
The UART usually does not directly generate or receive the external signalsused between different items of equipment. Separate interface devices areused to convert the logic level signals of the UART to and from the externalsignaling levels. External signals may be of many different forms. Examples of standards for voltage signaling are RS-232, RS-422 and RS-485 from theEIA. Historically, current (in current loops) was used in telegraph circuits.Some signaling schemes do not use electrical wires. Examples of such areoptical fiber , IrDA (infrared), and (wireless) Bluetooth in its Serial Port Profile
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(SPP). Some signaling schemes use modulation of a carrier signal (with or without wires). Examples are modulation of audio signals with phone linemodems, RF modulation with data radios, and the DC-LIN for power linecommunication.
Communication may be simplex (in one direction only, with no provision for the receiving device to send information back to the transmitting device), full duplex (both devices send and receive at the same time) or half duplex (devices take turns transmitting and receiving).
Character framing
The idle, no data state is high-voltage, or powered. This is a historic legacyfrom telegraphy, in which the line is held high to show that the line andtransmitter are not damaged. Each character is sent as a logic low start bit, aconfigurable number of data bits (usually 8, but legacy systems can use 5, 6,7 or 9), an optional parity bit, and one or more logic high stop bits. The startbit signals the receiver that a new character is coming. The next five to eightbits, depending on the code set employed, represent the character. Followingthe data bits may be a parity bit. The next one or two bits are always in themark (logic high, i.e., '1') condition and called the stop bit(s). They signal thereceiver that the character is completed. Since the start bit is logic low (0) and
the stop bit is logic high (1) there are always at least two guaranteed signalchanges between characters.
Obviously a problem exists if a receiver detects a line that is low for more thanone character time. This is called a "break." It is normal to detect breaks todisable a UART or switch to an alternative channel. Sometimes remoteequipment is designed to reset or shut down when it receives a break.Premium UARTs can detect and create breaks.
Receiver
All operations of the UART hardware are controlled by a clock signal whichruns at a multiple of the data rate. For example, each data bit may be as longas 16 clock pulses. The receiver tests the state of the incoming signal on eachclock pulse, looking for the beginning of the start bit. If the apparent start bitlasts at least one-half of the bit time, it is valid and signals the start of a newcharacter. If not, the spurious pulse is ignored. After waiting a further bit time,the state of the line is again sampled and the resulting level clocked into ashift register. After the required number of bit periods for the character length(5 to 8 bits, typically) have elapsed, the contents of the shift register is madeavailable (in parallel fashion) to the receiving system. The UART will set a flagindicating new data is available, and may also generate a processor interrupt
to request that the host processor transfers the received data.
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The best UARTs "resynchronize" on each change of the data line that is morethan a half-bit wide. In this way, they reliably receive when the transmitter issending at a slightly different speed than the receiver. (This is the normalcase, because communicating units usually have no shared timing systemapart from the communication signal.) Simplistic UARTs may merely detect
the falling edge of the start bit, and then read the center of each expecteddata bit. A simple UART can work well if the data rates are close enough thatthe stop bits are sampled reliably.
It is a standard feature for a UART to store the most recent character whilereceiving the next. This "double buffering" gives a receiving computer anentire character transmission time to fetch a received character. Many UARTshave a small first-in, first-out FIFO buffer memory between the receiver shiftregister and the host system interface. This allows the host processor evenmore time to handle an interrupt from the UART and prevents loss of receiveddata at high rates.
Transmitter
Transmission operation is simpler since it is under the control of thetransmitting system. As soon as data is deposited in the shift register after completion of the previous character, the UART hardware generates a startbit, shifts the required number of data bits out to the line, generates andappends the parity bit (if used), and appends the stop bits. Since transmissionof a single character may take a long time relative to CPU speeds, the UARTwill maintain a flag showing busy status so that the host system does not
deposit a new character for transmission until the previous one has beencompleted; this may also be done with an interrupt. Since full-duplexoperation requires characters to be sent and received at the same time,practical UARTs use two different shift registers for transmitted charactersand received characters.
Application
Transmitting and receiving UARTs must be set for the same bit speed,character length, parity, and stop bits for proper operation. The receivingUART may detect some mismatched settings and set a "framing error" flag bit
for the host system; in exceptional cases the receiving UART will produce anerratic stream of mutilated characters and transfer them to the host system.
Typical serial ports used with personal computers connected to modems useeight data bits, no parity, and one stop bit; for this configuration the number of ASCII characters per second equals the bit rate divided by 10.
Some very low-cost home computers or embedded systems dispensed with aUART and used the CPU to sample the state of an input port or directlymanipulate an output port for data transmission. While very CPU-intensive,since the CPU timing was critical, these schemes avoided the purchase of a
costly UART chip. The technique was known as a bit-banging serial port.
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RS232 serial connector pin assignment The RS232 connector was originally developed to use 25 pins. In this DB25
connector pinout provisions were made for a secondary serial RS232
communication channel. In practice, only one serial communication channel
with accompanying handshaking is present. Only very few computers have
been manufactured where both serial RS232 channels are implemented.
Examples of this are the Sun SparcStation 10 and 20 models and the Dec
Alpha Multia. Also on a number of Telebit modem models the secondary
channel is present. It can be used to query the modem status while the
modem is on-line and busy communicating. On personal computers, the
smaller DB9 version is more commonly used today. The diagrams show the
signals common to both connector types in black. The defined pins only
present on the larger connector are shown in red. Note, that the protective
ground is assigned to a pin at the large connector where the connector
outside is used for that purpose with the DB9 connector version.
The pinout is also shown for the DEC modified modular jack. This type of connector has been used on systems built by Digital Equipment Corporation; in the early days oneof the leaders in the mainframe world. Although this serial interface is differential (thereceive and transmit have their own floating ground level which is not the case withregular RS232) it is possible to connect RS232 compatible devices with this interface
because the voltage levels of the bit streams are in the same range. Where the definitionof RS232 focussed on the connection of DTE, data terminal equipment (computers,
printers, etc.) with DCE, data communication equipment (modems), MMJ wasprimarily defined for the connection of two DTE's directly.
RS232 DB9 pinout
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DB9 - DB25 conversion
DB
9
DB2
5Function
1 8Data carrier
detect
2 3 Receive data
3 2 Transmit data
4 20Data terminal
ready
5 7 Signal ground
6 6 Data set ready
7 4 Request to send
8 5 Clear to send
9 22 Ring indicator
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Chapter-5
SOFTWARE IMPLEMENTATIONS
5.1 Introduction to Embedded C
It is a set of language extensions for the C Programming language by
the C Standards committee to address commonality issues that exist
between C extensions for different embedded systems. Historically,
embedded C programming requires nonstandard extensions to the C
language in order to support exotic features such as fixed-point arithmetic,
multiple distinct memory banks, and basic I/O operations.
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PROGRAM BUILDING
C SOURCE (.C)
C51 Complier
L52/BL51 Linker
Listing File
MAP Files
Other Object
Files or Libraries
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Fig 5.1: Compiling with an embedded compiler
Why C for Microcontrollers?
Compatibility
Direct access to hardware address
Direct connection to interrupts
Optimization consideration
Development environment
Re-entrancy
5.2 Keil µVision
The µVision IDE from Keil combines project management, make
facilities, source code editing, program debugging and complete simulation
in one powerful environment. The µVision development platform is easy-to-
use and it helps one quickly create embedded programs that work. The
µVision editor and debugger are integrated in a single application that
provides a seamless embedded project development environment. The
µVision IDE is the easiest way for most developers to create embedded
applications using the Keil development tools.
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Absolute Object
DS51-Simulator/
In-Circuit
Emulator
OHS51 Object Hex
HEX File (.hex)
Program device
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The C51 Compiler translates C source files into relocatable object
modules which contain full symbolic information for debugging with the
µVision Debugger or an in-circuit emulator. In addition to the object file, the
compiler generates a listing file which may optionally include symbol table
and cross reference information.
Features:
Nine basic data types, including 32-bit IEEE floating-point.
Flexible variable allocation with bit, data, bdata, idata, xdata, and
pdata memory types.
Interrupt functions may be written in C.
Complete symbol and type information for source-level debugging.
Use of AJMP and ACALL instructions.
Bit-addressable data objects.
Built-in interface for the RTX51 Real-Time Kernel.
Support for dual data pointers on Atmel, AMD, Cypress, Dallas
Semiconductor, Infineon, Philips, and Triscend microcontrollers.
5.2.1 Software Development Cycle
When you use the Keil µVision3/ARM, the project development cycle is
roughly the same as it is for any other software development project.
1. Create a project, select the target chip from the device database, and
configure the tool settings.
2. Create source files in C or assembly.
3. Build your application with the project manager.
4. Correct errors in source files.
5. Test the linked application.
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5.2.2 Keil µVision3 IDE
The µVision3 IDE is a Windows-based software development platform that
combines a robust editor, project manager, and makes facility. µVision3
integrates all tools including the C compiler, macro assembler, linker/locator,
and HEX file generator. µVision3 helps expedite the development process of
your embedded applications by providing the following,
Full-featured source code editor.
Device database for configuring the development tool setting.
Project manager for creating and maintaining your projects.
Integrated make facility for assembling, compiling, and linking your
embedded applications.
Dialogs for all development tool settings.
True integrated source-level Debugger with high-speed CPU and
peripheral simulator.
Flash programming utility for downloading the application program
into Flash ROM.
Links to development tools manuals, device datasheets & user’s
guides.
5.2.3 Start µVision3
µVision3 is a standard window application and startes by clicking on the
program icon.
Create a Project File:
To create a new project file select from the µVision3 menu Project –
New Project . This opens a standard Windows dialog that asks you for the new
project file name.
It is good to use a separate folder for each project. You can simply use
the icon Create New Folder in this dialog to get a new empty folder. Then
select this folder and enter the file name for the new project, i.e. Project1.
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µVision3 creates a new project file with the name PROJECT1.UV2 which
contains a default target and file group name. You can see these names in
the Project Workspace – Files.
Select a Device:
When you create a new project µVision3 asks you to select a CPU for
your project. The Select Device dialog box shows the µVision3 device
database. Just select the microcontroller LPC 2129.
Fig 5.2: Selecting device window
Create New Source Files:
Create a new source file with the menu option File – New . This opens
an empty editor window where you can enter your source code. Save your file
with the dialog File – Save As under a filename with the extension *.asm.
Once you have created your source file you can add this file to your
project. Select the file group in the Project Workspace-Files page and click
with the right mouse key to open a local menu. The option Add Files opens
the standard files dialog. Select the file *.asm you have just created.
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Fig 5.3: Create new source window
Set Tool Options for Target:
µVision3 lets you set options for your target hardware. The dialog
Options for Target opens via the toolbar icon or via the Project - Options for
Target menu item. In the Target tab you specify all relevant parameters of
your target hardware and the on-chip components of the device you have
selected.
Build Project and Create a HEX File:
We can translate all source files and line the application with a click on
the Build Target toolbar icon. µVision3 will display errors and warning
messages in the Output Window – Build page. A double click on a message
line opens the source file on the correct location in a µVision3 editor window.
5.3 Flash magic
Philips Semiconductors produce a range of Microcontrollers that
feature both on chip Flash memory and the ability to be reprogrammed
using In-System Programming technology.
Flash Magic is Windows software from the Embedded Systems
Academy that allows easy access to all the ISP features provided by the
devices. These features include:
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Erasing the Flash memory (individual blocks or the whole device)
Programming the Flash memory
Modifying the Boot Vector and Status Byte
Reading Flash memory
Performing a blank check on a section of Flash memory
Reading the signature bytes
Reading and writing the security bits
Direct load of a new baud rate (high speed communications)
Sending commands to place device in BootROM mode
Flash Magic provides a clear and simple user interface to these
features and more as described in the following sections. Under Windows,
only one application may have access the COM Port at any one time,
preventing other applications from using the COM Port. Flash Magic only
obtains access to the selected COM Port when ISP operations are being
performed. This means that other applications that need to use the COM
Port, such as debugging tools, may be used while Flash Magic is loaded.
5.4
1. Hardware InstallationTo install the TV&FM Video Capture Card series into your computer, please follow the
steps as below:
Turn off all your computer power sources and remove the cover of your PCPlug the TV&FM Video Capture Card into any free PCI slot.
And connect the TV Antenna/Cable/FM Antenna/audio-out/remote Sensor etc. device
to the TV card
2. Driver Installation: Before installation, it is highly recommended that all background Programs be
disabled .These include such applications as anti-virus software and system monitoring
applications.
Turn on your PC and start up your windows. Shortly afterentering the Windows, you
will see the “Found NEW HardwareWizard dialog box”
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Click the option for “In stall from a list or specific location”.Then click “NEXT”
The wizard will prompt you to choose your search andinstallation options.
Insert the Driver CD into CD-ROM(assumed to be E:\).Tick “include this Location in the search” then click on “Browse”to find the driver in CD-ROM As below: E:\driver .Click NEXT to Continue.
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Click “Continue Anyway” .Windows New Hardware Wizardwillguide you to the process step by step until the installation is
finished.
3. Application Software Installation:
Insert the Driver CD into CD-ROM .Double click MyComputer CD-ROMAPPSetup.exe
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Click NEXT
Select “I accept the terms of the license agreement” and click NETXT
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Click NEXT
Click NEXT
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Press finish, software installing finished.
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4. RESULTS
This Black Box System Classified into two main sections. This classification
can be done by the System working functionality. These two sections are
1. Vehicle section
2. Controlling section
4.1 VEHICLE SECTION
The vehicle section consists of an ARM7 Micro Controller(LPC 2129), RF
Receiver, and various sensors like Temperature sensor(LM35), Pressure Sensor,
Ultrasonic sensor, Proximity Sensor, GSM modem, Power supply and LCD.The sensors
are used to record values at the time of the accident. The values are very useful in the
post accident investigations. LCD is used to display all the recorded values at the time
of accident. These values are retrieved from the EEPROM of LPC2129. The SIM300
GSM module is used to send the message to the user when an accident is occurred to
the vehicle.
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Figure 4.1(a) Top section of Vehicle section
Figure 4.1(b) LPC2129 Kit
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LC
GSM Pressure LM3
LPC212
CAN2
Power ON Reset EEPROM Seat BeltCAN 1
Brake
IGNITION Key
LC
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Fig 4.1(c) Sensor section
4.2 CONTROLLING SECTION:
The controlling section consists of an ATMEL Microcontroller, RF transmitter and
Personal computer. The ATMEL Microcontroller is connected to the personal computer
by using a RS232 cable and Windows HyperTerminal. The RF Transmitter is connected
to the port pins of the micro controller. The RF section is useful for controlling the
movement of the vehicle. This is done by connecting it to the hyper terminal of the
computer.
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Ultrasonic
Sensor
Proximity SensorRF Receiver
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Figure4.2 Controlling Section
5.3 Experimental Results:
Ignition on Module:
When the IGNITION is ON it has to initialize the LCD. Then it displays the
message Black Box For Vehicle Diagnosis. Later it waits for an IGNITION Key. This
key represents the start of the vehicle. Then it checks for the critical parameters like
BRAKE, SEAT BELT, CAN and GSM. When all these conditions are passed then only
the DC Motor gets started otherwise it displays Failure message.
The below figures represents the outputs of the Black Box.
Figure4.3 Display of Black Box message
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RF
Transmitt
ATMEL Micro
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Figure 4.4 Display of IGNITION KEY
Figure 4.5 Checking of Critical modules
Figure4.6 Seat Belt Test
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Figure 4.7 Brake Test
Figure 4.8 CAN Test
Figure 4.9 GSM Test
Figure 4.10 Display of Status
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Figure 4.11 DC Motor Status
If any of the condition fails then a message is shown on the LCD saying the
status is failed and the DC motor is never turned ON until it is rectified. This condition
prevents accidents while it checks for every critical parameter at the start of the vehicle.
Figure 4.12 Brake Failure condition
Figure 4.13 Seat Belt Failure condition
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Figure 4.14 Display of failure status
Whenever an accident is occurred it will stop the vehicle and displays a message
ACCIDENT OCCURED. The GSM module present in the vehicle send a message to
the owner saying the accident is occurred. At this point of time the sensors will
calculate the parameters and stores them into the memory. These values are retrievedlater in order to determine how the accident is occurred.
Figure 4.15 Display of Accident Occurrence
Figure 4.16 Vehicle Condition
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Figure 4.17 Display of Message Sent
Retrieving data from EEPROM:
After the accident is occurred then every details of sensors is calculated and
stored in the memory. These values are very useful to know how the accident is
occurred. The values which are recovered are shown in the below figures.
Figure 4.18 Data Retrieving from EEPROM
Figure 4.19 Pressure Sensor Value
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Figure 4.20 Temperature Sensor Value
Figure 4.21 Ultrasonic sensor Value
Figure 4.22 Proximity Sensor Value
Figure 4.23 Seat Belt status
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Figure 4.24 Message From Black Box
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FUTURE ENHANCEMENTS
The present system which already has the abilities to test the critical
components like seat belt and brake and warns about the non critical components like
the lane detection can be enhanced further by including more components like tyre
pressure, fuel level warning, working of headlights and other parts of the vehicle.
After the accident, the system has an ability to inform to the stored numbers
through SMS. The system can be enhanced by including a GPS module which can
inform about the exact location of the accident, which may help the rescue team to
reach the accident location as quickly as possible.
The EEPROM used as the black box stores the situation in which the accident
has occurred. The present system stores the parameters like engine temperature, lane,
and pressure of the collision. The number of parameters can be increased and cameras
can be placed at front and back side of the vehicle which record and store the videos of
the accident. This may help in investigation job.
The present system is designed for four wheelers. In future it may be applied to
two wheelers also.
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BIBLIOGRAPHY
[1] E. Cauer, W. Mathis, and R. Pauli, "Life and Work of Wilhelm Cauer (1900 –
1945)", Proceedings of the Fourteenth International Symposium of Mathematical
Theory of Networks and Systems (MTNS2000), p4, Perpignan, June, 2000.
[2] Belevitch, V, "Summary of the history of circuit theory", Proceedings of the IRE,
vol 50, Iss 5, pp848-855, May 1962.
[3] Black-Box Testing: Techniques for Functional Testing of Software and Systems, by
Boris Beizer, 1995.
[4] Cybernetics: Or the Control and Communication in the Animal and the Machine,
by Norbert Wiener, page xi, MIT Press, 1961.
[5] Thomas K. Kowalick, "Fatal Exit: The Automotive Black Box Debate", Wiley,
IEEE Press, Feb. 2005.
[6] M. A. Mazidi, J. C. Mazidi, R. D. Mckinaly, the 8051 Microcontroller and
Embedded Systems, Pearson Education, 2006
[7] ARM Architecture reference manual - David Seal
[8] ARM System-on-Chip Architecture - Steve Furber
[9] ARM System Developer’s Guide – Elsevier
[10] The Microcontroller Idea Book - John Axelson
[11] The Microcontroller Application Cookbook - Matt Gilliland
[12] http://www.keil.com
[13] http://www.microcontroller.com/EmbeddedSystems.asp?c=11
[14] http://www.hcc-embedded.com/en
[15] http://www.scienceprog.com/arm7-lpc2129-mini-board/
[16] www.arm.com
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