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Implement of digital PID Controller

Based on FPGA and the System Co-simulation

Dajun Feng

School of Electronic EngineeringXidian University

Xi'an 710071, Chinae-mail: djfeng@mail.xidian.edu.cn

Luping Xu

School of Electronic EngineeringXidian University

Xi'an 710071, China

e-mail: xd203@yahoo.com.cn

Lijuan Yan

School of Electronic Engineering

Xidian UniversityXi'an 710071, China

e-mail: yanzi_126@126.com

Woheng Li

School of Electronic Engineering

Xidian UniversityXi'an 710071, China

e-mail: liwoheng@163.com

AbstractThis paper presents the hardware implementation

of PID control algorithm based on FPGA.The design adopts

the three levels pipeline and ping pong operation in order to

strike a balance between the speed and the exhausted FPGA

resources. In the process of verifying the design performance,

the paper introduces a sine microstepping driver system model

of stepper motor. This model needs PID control to generate

the ideal sine wave phase current, achieving the constant

torque output. The system adopts co-simulation method. The

simulation chooses EDA Simulator link MQ as an interface to

connect the Modelsim and the Simulink.The co-simulation

method breaks the gap between software and hardware

design ,and accelerates the function simulation. The simulationresult demonstrates that the design can achieve conventional

analog PID control .

Keywords-PID;Field-programmable Gate Array (FPGA);Co-

simulation; EDA Simulator link MQ

I. INTRODUCTION

PID controller is a classical, widely used and effectivecontrol algorithm. PID controller can be implemented byanalog and digital circuits. This paper analyses the PIDcontrolling theory, and adopts FPGA to achieve the designof PID. Considering the influences of calculating speed andthe consumed resources, we adopt three levels pipelining to

make a good balance between them.The simulation chooses EDA Simulator link MQ as the

test bench. The PID is designed by hardware compilinglanguage VHDL, while the other departments by Simulinkmodule.

II. PIDDIGITAL DESIGN THEORY

In analog system, PID can be expressed as following:

( )( ) [ ( ) ( ) ]

p i d

de tp t k e t T e t dt T

dt

Where ( )p t is the out of PID, ( )e t is the error

between the ideal value and actual output, pk

is the

proportional constant, iTis the integral time, dT is differentialtime.

Substituting (1) with digital difference equation can be:

0 0

( ) ( ) ( )n n

e t dt e k t T e k

( ) ( ) ( 1)

( ) ( 1)

de t e k e k dt t

e k e k

T

0

( ) { ( ) ( )

[ ( ) ( 1)]}

K

p

jI

d

Tp k k e k e j

T

Te k e k

T

1

0

( 1) { ( 1) ( )

[ ( 1) ( 2)]}

k

p

jI

d

Tk k e k e j

T

T

e k e k T

(5)

Subtracting ( 1)p k from ( )p k can be:

( ) ( 1) ( ) ( )

( 2 ) ( 1) ( 2)

p i d

p d d

p k p k k k k e k

k k e k k e k

(6)

When knowing the values of the ( 1)p k( )e k , ( 1)e k and ( 2)e k ,the design can calculate the( )p k

.

2011 International Conference on Instrumentation, Measurement, Computer, Communication and Control

978-0-7695-4519-6/11 $26.00 2011 IEEE

DOI 10.1109/IMCCC.2011.232

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III. PID HARDWARE IMPLEMENTATION

A. PID Controller Module

The digital PID mainly concerns with addition,subtraction and multiplication. Every time operation needsthree times multiplication, seven times addition orsubtraction. The design can be achieved by many methods.

Because multiplication expends substantial resources, thedesign adopts three levels pipelining and stator [1]. Thedetail can be seen as figure 1:

Figure 1 FGPA implementation of PID

In figure 2, the reg module presents a register group,including three registers, respectively

storing ( ) ( 1) ( 2)e k e k e k .After every time ofcalculating, new ( )e k is loaded into the reg. During the

calculating of (p k, mux chooses one of them accordingthe value of the stator.

B. Stator Machine Conversion

The stator includes five states, which are st0, st1, st2, st3and st4:

st0: when reset signal is high, system goes to state 0,initialing some controlling signal;

st1: adder outputs dk , ( )e k is loaded into Reg, Mux(data

selector) chooses ( 2)e k , sum sums

the ( ) ( )i p d

k k k e k , ( )dk e k an 2 i pk k ;

st2:adder outputs ( 2 )p dk k ,Mux chooses

( 1)e k ,Mul multiplies dk and ( 2)e kst3: adder outputs ( )

i p dk k k , Mux chooses ( )e k ,

Mul multiplies ( 2 )p dk k and ( 1)e k , Sum sums

( )dk e k ;

st4: adder outputs 0, Mux outputs ( )e k , Mul

multiplies ( )i p dk k k and ( )e k ,Sum sums ( )dk e k and

( 2 ) ( 1)p dk k e k ;The five states conversion sequences are showed in

figure 2.

Figure 2 States conversion design

IV. SYSTEM CO-SIMULATION

In the design of FPGA, simulation is an importantsection. This paper chooses EDA Simulator link MQ as thesimulation tool.

EDA Simulator link MQ is one module of Simulink. Itprovides an interface between Simulink and the hardwaresimulation tool such as Modelsim. User can connect thesoftware module in Simulink with hardware program. Oncethe controlled model is correctly built, the designer canverify the whole system before completely constructing thehardware circuits. This chapter adopts sine microsteppingdriver as a simulation example.

A. Sin Microstepping Mode Introduction

Now we take a two phase stepper as an example. The

electrical degree between A and B is 90 degrees. So thecurrent phase passing A and B is also 90 degrees. Applyingcurrents to both phases of the motor creates a torque phasor,which is proportional to the vector sum of both currents. Thecurrent A and current B can change follow equation (7),(8):

0cos

Ai I (7)

0 sinBi I (8)The resulting torque generated by the corresponding

phases is (9)

0

0

cos

sin

A M A M

B M B M

M K i K I

M K i K I

(9)

Where = 90 sn

,

n number of microstep ,

s Number of steps,

0I Motor rated current,

KTorque constant of motor.

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Substituting (7) into (8) and doing vector summation, the

resulting total generated torque measured on the motor shaft

is given by:

2 2

0O A B M M M K I (10)

The sum current vector i

2

0

j j

A Bi i i e I e

(11)

From (10) and (11) we can see that when is changing,

the sum vector i

rotates corresponding degrees and keeps

the absolute value of O constant, achieving the constanttorque output and stable speed rotation.

Since the drive waveforms are sinusoidal instead ofsquare, the step-to-step oscillations are eliminated and theassociated velocity ripples. This greatly improvesperformance at low rotational speeds and avoids resonanceproblems [2]-[4].

An example of the required current for full step and fourmicro steps per step operation are showed in figure 3 and 4.

Figure 3 Full step drive waveforms

Figure 4 Four microstep/ step drive waveforms

Figure 5 shows the system blocks and hardware programdesigne.

To rotate the stepper motor, the currents in the phases ofmotor are controlled to follow sin or cosine waves. In order

to do this, FPGA needs to generate Iref (sin referentcurrent) as a reference. The PID controller will adjust theduty cycle according to the current error. The PWM receivesthe duty cycle and produces the corresponding switching

pulses to send to H-bridge circuit. PID controller canincrease the input error and decrease the stable error, thusaccelerating the modulating time. The H-bridge circuit isused to switch the current in phase of motor. The ADC, anti-aliasing filter and amplifier are used to get the feedbackcurrent value for the PI controller .

Figure 5 Block diagram of microstep mode

1. Figure 6 show the detail implementation of themicrostep controller.

Figure 6 FPGA module connection diagram

The frequency demultiplier can generate differentfrequency clock signal according to the in/de signal. The 256up/down counter is a reversible 256 counter. The start/stopinput is connected to its enable port, controlling the start orstop of the counter. The dir signal controlls the countersdecreasing or increasing, thus controlling the motor rotationdirection. The counter can generate address to sine/cos ROM.On the rising edge of clk, the counter outputs a new addressto sin/cos ROM.

2. PWM circuit IXMS150 is a double channels PWMmodulator, insuring that the sine duty cycle and the cosineduty cycle can be handled synchronously.

3. L6506 and L298N constitute the full bridge driver formotion control application. The full bridge circuits

can drive the power MOSFETS to on and off to controlthe currents in the windings.

4. Feed back circuits, including low pass filter, ADC.Because the voltage supplied to the phase of the motor is aperiodic function, the Fourier series contains the DC termsand harmonic terms.

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By analyzing the controlled stepper motor output currentwave and other hardware circuits except FPGA ,they can be

presented as transfer function 212.5 0.00376 2.4 1s s .

B. Co-simulation model design

The controlled object transfer function is

2

12.5

0.00376 2.4 1s s ,which is gained by building the models ofthe PWM, the H-bridge, the low pass filter and the ADC.

Figure 7 and 8 respectively show the waves of theModelsim and Simulink. From the result, it can be seen thatthe sine microstepper control mode can make the steppermotor follow the sine wave very well [5].

Figure 7 Co-simulation system model

Figure 8 Simulink and Modelsim simulation results

V. CONCLUSION

This paper introduces a new digital PID based on FPGA.The implementation is suitable for some systems in whichideal output is available and constant. For some systemswhich are sensitive to external environment, they need toadopt adaptive PID such as fuzzy PID.

REFERENCES

[1] CHEN Jun-Wei, ZHOU Yu-Jie,FPGA implantation of digital PID

controller and hardware software co-simulation, 1994-2010 ChinaAcademic Journal Electronic Publishing House ,pp. 38-41.

[2] Xiaodong Zhang, Junjun He and Chunlei Sheng,An Approach of

Micro-stepping Control for the StepMotors Based on FPGA, IEEE

International Conference on Industrial Technology,pp.125-

230,Dec.2005.

[3] Gheorghe BALUTA ,Microsteppoing Mode for Stepper MotorControl, IEEE, ISBN 1-4244-0969- 1/07.

[4] Ngoc Quy Le and Jae Wook Jeon,An Open-loop Motor Driver Based

on FPGA, International Conference on Control, Automation andSystems 2007, pp.1322-1326.

[5] The link for modelsim documentation. Mathworks [J/CL].http://www.

mathwork.com

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