Basic Motors

This section covers some of the basic Start / Stop Motor logic. The purpose of this section is to give PLC programmers a sense of some of the basics in Motor control in ladder logic. We have included some of the most used controls. More advanced section for motor section is available later on in the training section.

Example 1

Assume we have a motor that could be started and stopped from 3 different places. What this mean is that we have 3 sets of Start/Stop buttons that can start and stop the motor.

Solution:

Rung 0: Here we have put Star1/Start2 /Start3 in parallel and then pass it thru a one shot. We are assuming that the start button could also have a maintained (1) signal as well as momentary (2) signal. So to cover both cases, this will prevent the motor from starting automatically after any of the 3 stop buttons is pressed. It is just a precaution and better as far as security is concerned.

Rung 1 : Here we have the stop buttons in series, since pressing any of the buttons should stop the motor and will disallow any of the start button to pass thru.

Note

Maintained signal is a signal that stays on when a push button is pressed. Typically a selector has a maintained signal. Some type of push buttons has a maintained signal.

When you press on lets say on a start push button, the start bit will stay on until the stop button is press.

A momentary signals is a signal that will go on for as long as the operator pushes the button. When the operator release the button the signal will go off. That is why most of the time we use the OSR instruction to lock on the signal.

Introduction

In this section we will cover the count up count down and reset instruction. Counters are very essential in ladder logic programming. Counters are used to index, increment or decrement values.

Definition

The following is a list of counter instructions in SLC 500:

CTU - Count Up CTD - Count Down RES - Reset

CTU Count UP

Symbol

Definition

Increments the accumulated value at each false to true transition and retains the accumulated value when the instruction goes false or when power cycle occurs.

The CTU is an instruction that counts false to true transition. When this transition happens the accumulated value is incremented by one count.

A CTU accumulation is reset by the RES instruction. If the accumulation value is over the maximum range then the overflow (OV) bit will be true.

Each counter address is made of a 3-word element.

Word 1 is the control word

Bit 0-7: Internal Use Bit 10: UA - Update accumulation value. Bit 11: UN - Underflow bit. Bit 12: OV - Overflow bit. Bit 13: DN - Done

Bit 14: CD - Count down is enabled. Bit 15: CU - Count up is enabled.

Word 2 stores the preset value. (PRE)

Specifies the value, which the counter must reach before the controller sets the done bit. When the accumulator value becomes equal to or greater than the preset value, the done status bit is set. You can use this bit to control an output device.

Preset value is from -32,768 to 32,767 If a timer-preset value is negative an error will occur.

Word 3 stores the accumulated value. (ACC)

This is the number of times of false to true transitions that have occurred since the counter was last rest.

CTD Count Down

Symbol

Definition

Decrements the accumulate value at each false to true transition and retains the accumulated value when the instruction goes false or when power cycle occurs.

The CTD is an instruction that counts false to true transition. When this transition happen the accumulated value is decrements by one count.

A CTD accumulation is reset by the RES instruction. If the accumulation value is below the minimum range then the underflow (UN) bit will be

true.

· Each counter address is made of a 3-word element.

Word 1 is the control word

Bit 0-7: Internal Use Bit 10: UA - Update accumulation value. Bit 11: UN - Underflow bit. Bit 12: OV - Overflow bit. Bit 13: DN - Done Bit 14: CD - Count down is enabled. Bit 15: CU - Count up is enabled.

Word 2 stores the preset value. (PRE)

Specifies the value, which the counter must reach before the controller sets the done bit. When the accumulator value becomes equal to or greater than the preset value, the done status bit is set. You can use this bit to control an output device.

Preset value is from -32,768 to 32,767 If a timer-preset value is negative an error will occur.

· Word 3 stores the accumulated value. (ACC)

RES Reset

Symbol

Definition

Resets the accumulated value and status bit of a timer or counter. Use a RES instruction to reset timers or counters. When the RES instruction is enabled, it

resets the Timer On Delay, Retentive Timer, and Counter Up, Counter Down instruction having the same address as the RES instruction.

CTU - Count Up

Increments the accumulated value at each false to true transition and retains the accumulated value when the instruction goes false or when power cycle occurs.

The CTU is an instruction that counts false to true transition. When this transition happens the accumulated value is incremented by one count.

A CTU accumulation is reset by the RES instruction. If the accumulation value is over the maximum range then the overflow (OV) bit will

be true.

Example 1

Count the number of times a switch goes from off to on. Once we reach a count of 10 energize a light. We should also have a button to reset the counter.

Input / Output

Input I:1.0/0 Light O:2.0/0 Button I:1.0/1

Ladder Logic Solution

When Input goes from off to on the counter C5:0.Acc will increment by one. When Acc is equal to preset then C5:0.DN will be true.

When C5:0.DN is true then the light will go on.

Once the button is pressed the counter C5: 0.Acc will be reset to zero. Hence the counter will start over.

Note

When the counters done bit goes on the counter will keep counting up. Therefore if the input keeps going from false to true at one point we will get the overflow bit on.

If the accumulation value is over the maximum range then the overflow (OV) bit will be true.

CTD - Count Down

Decrements the accumulate value at each false to true transition and retains the accumulated value when the instruction goes false or when power cycle occurs.

The CTD is an instruction that counts false to true transition. When this transition happen the accumulated value is decrements by one count.

A CTD accumulation is reset by the RES instruction. If the accumulation value is below the minimum range then the underflow (UN) bit

will be true.

RES - Reset

Resets the accumulated value and status bit of a timer or counter. Use a RES instruction to reset timers or counters. When the RES instruction is

enabled, it resets the Timer On Delay, Retentive Timer, and Counter Up, Counter Down instruction having the same address as the RES instruction.

Example 1

We want to have a count down on an input signal. Once we reach a count of 0 we will energize a light. When a button is pressed then count will be reset.

Input / Output

Input I:1.0/0 Light O:2.0/0 Button I:1.0/1

Ladder Logic Solution

When Input goes from off to on the counter Acc value will decrement by 1. When the Acc > = Preset then the bit done will be true; hence the light will go on.

When Input goes on the counter Acc value will decrement by 1. When the Acc < Preset then the bit done will be false, hence the light will go off.

When the button is pressed this will energize the rung for only one scan and so resetting the counter. This will reset the Acc value to 0.

Note

When the done bit of the counter goes on the counter will keep counting. Therefore if the input keeps going from false to true at one point we will get an underflow bit on.

If the accumulation value is below the minimum range then the underflow (UN) bit will be true.

Introduction

SLC 500 Training: In this section we will cover timers used in ladder logic programming. Timers are very important in ladder logic programming. Timers gives the precision in time. Timer on delay starts timing when instruction is true. Timers are used to track time when instruction are on or off. They could also keep track on a retentive base.

Definition

The following is a list of timer instructions in SLC 500:

TON - Timer On Delay TOF - Timer Off Dealy RTO - Retentive Timer

TON Timer On Delay

Symbol

Definition

Count time base intervals when the instruction is true. The Timer On Delay instruction begins to count time base intervals when rung conditions

become true. As long as rung conditions remain true, the timer adjust its accumulated value (ACC) each evaluation until it reaches the preset value (PRE). The accumulated value is reset when rung conditions go false, regardless of whether the timer has timed out.

Each Timer on Delay is made of a 3-word element.

Word 1 is the control word

Bit 0-12: Internal Use Bit 13: Done (DN) this bit is on when the Accumulation value >= Preset Value Bit 14: Timer Timing (TT) this bit is on when the timer is timing Bit 15: Enabled (EN), this bit is on when the timer is energized.

Word 2 stores the preset value. (PRE)

The programmer specifies this value. When the accumulated time reaches the preset value the controller sets the done bit. When the accumulated value becomes equal to or greater than the preset value, the done bit is set. Usually preset value is from 0 - 32,767

If a timer-preset value is negative an error will occur.

· Word 3 stores the accumulated value. (ACC)

This is the time elapsed since the timer was last reset. When enabled the timer updates this continually.

Time Base: is the timing update interval, this can vary from 0 - 1 second.

TOF Timer Off Delay

Symbol

Definition

Counts time base intervals when the instruction is false. The Timer Off Delay instruction begins to count time base intervals when the rung makes a

true to false transition. As long as rung conditions remain false, the timer increments its accumulated value (ACC each scans until it reaches the preset value (PRE). The accumulated value is reset when rung conditions go true regardless of whether the timer has timed out.

Each timer address is made of a 3-word element.

Word 1 is the control word

Bit 0-12: Internal Use Bit 13: DN- Done Bit 14: TT - Timer Timing Bit 15: EN - Timer is enabled

Word 2 stores the preset value. (PRE)

Specifies the value, which the timer must reach before the controller sets the done bit. When the accumulated value becomes equal to or greater than the preset value, the done bit is se.

Preset value is from 0 - 32,767 If a timer-preset value is negative an error will occur.

Word 3 stores the accumulated value. (ACC)

This is the time elapsed since the timer was last reset. When enabled the timer updates this continually.

Time Base: is the timing update interval, this can vary from 0 - 1 second.

RTO Retentive Timer

Symbol

Definition

Counts time base intervals when the instruction is true and retains the accumulated value when the instruction goes false or when power cycle occurs.

The Retentive Timer instruction is a retentive instruction that begins to count time base intervals when rung conditions become true.

The Retentive Timer instruction retains its accumulated value when any of the following occurs:

Rung conditions become false. Changing Processor mode from REM run /Test / program mode. The processor loses power while battery back up is still maintained.and a fault occurs.

Note:To reset the accumulated value in RTO, you must use a reset instruction (RES) with the same address.

Each Retentive Timer is made of a 3-word element.

Word 1 is the control word

Bit 0-12: Internal Use Bit 13: DN- Done Bit 14: TT - Timer Timing Bit 15: EN - Timer is enabled

Word 2 stores the preset value. (PRE)

Specifies the value, which the timer must reach before the controller sets the done bit. When the accumulated value becomes equal to or greater than the preset value, the done bit is se.

Preset value is from 0 - 32,767 If a timer-preset value is negative an error will occur.

Word 3 stores the accumulated value. (ACC)

This is the time elapsed since the timer was last reset. When enabled the timer updates this continually.

Time Base: is the timing update interval, this can vary from 0 - 1 second.

Introduction

Basic Ladder Logic instructions allow very simple logical decisions. Arithmetic Ladder Logic instructions go beyond the simple true or false operation to give the ability to more complex operations. It retrieves one or more value, perform an operation and store the result in memory.

Status File

There is a very close relation between math instruction and some of the control status bits. After a math instruction is

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executed, the arithmetic status bits in the control status file are updated. Control status file is the data file "S2 - Status".

S:0/0 Carry (C) Sets if carry is generated; otherwise it is cleared.

S:0/1 Overflow (V) Indicates that the actual result of a math instruction does not fit in the designated destination

S:0/2 Zero (Z) Indicates a 0 value after a math, move or a logic instruction

S:0/3 Sign (S) Indicates a negative value after a math, move or logic instruction.

S:5/0 Minor Error Minor error bit is set upon detection of a mathematical overflow, or division by zero. This error can cause a CPU fault, which could be avoided if the bit is unlatched before the END, TND, or REF statement.

S:13S:14 Math register S:13 -Contains the least significant word of the 32 bit values of MUL, DDV, FRD, and TODS:14 -Contains the Most significant word of the 32 bit values of MUL, DDV, FRD and TOD

Definition

The following is a list of the comparison instructions in SLC 500:

ADD - Adding SUB - Subtract MUL - Multiply DIV - Division DDV - Double Divide

ADD - Adding

Symbol

Definition

When rung conditions are true, this output instruction adds Source A to Source B and stores the result at the destination address. Source A and Source B can either be values or

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addresses that contain values, however Source A and Source B cannot both be constants.

Carry (C), Sets if carry is generated; otherwise resets. Cleared For floating value

Overflow (V), Sets if underflow; otherwise resets Zero (Z), Sets if the result is Zero; otherwise resets; Sign (S), Sets if result is negative; otherwise resets;

SUB - Subtract

Symbol

Definition

When rung conditions are true, the SUB output instruction subtracts Source B from Source A and stores the result in the destination. Source A and Source B can either be values or addresses that contain values, however Source A and Source B cannot both be constants.

Carry (C), Sets if borrow is generated; otherwise resets. Cleared For floating value

Overflow (V), Sets if underflow; otherwise resets Zero (Z), Sets if the result is Zero; otherwise resets; Sign (S), Sets if result is negative; otherwise resets;

MUL - Multiply

Symbol

Definition

Use the MUL instruction to multiply one value (source A) by another (source B) and place the result in the destination. Source A and Source B can either be constant values or addresses that contain values, however Source A and Source B cannot both be constants.

The math register contains the 32-bit signed integer result of the multiply operation. This result is valid at overflow.

Carry (C), Always reset Overflow (V), Sets if overflow; otherwise resets Zero (Z), Sets if the result is Zero; otherwise resets; Sign (S), Sets if result is negative; otherwise resets;

DIV - Divide

Symbol

Definition

When rung condition is true, this output instruction divides Source A by Source B and stores the result in the destination and the math register. The value stored in the destination is rounded. The value stored in the math register consists of the unrounded quotient (placed in the most significant word) and the remainder (placed in the least significant word).

Source A and Source B can either be constant values or addresses that contain values, however Source and Source B cannot both be constants.

Carry (C), Sets if carry is generated; otherwise resets. Cleared For floating value

Overflow (V), Sets if division by zero or overflow; otherwise resets

Zero (Z), Sets if the result is Zero; otherwise resets, undefined if overflow

Sign (S), Sets if result is negative; otherwise resets; undefined if overflow.

DDV - Double Divide

Symbol

Definition

When rung conditions are true, this output instruction divides the contents of the math register (S:13 and S:14), containing 32 bits of data, by the source (16 bits of data) and stores the result in the destination and the math register.

The math register initially contains the dividend of the DDV operation. Upon execution the unrounded quotient is placed in the most significant word of the math register. The remainder is placed in the least significant word of the math register.

Carry (C), Sets if carry is generated; otherwise resets. Cleared For floating value

Overflow (V), Sets if division by zero or result > 32 767 or < 32768; otherwise resets

Zero (Z), Sets if the result is Zero; otherwise resets; Sign (S), Sets if result is negative; otherwise resets; undefined

if overflow.

Introduction

This chapter give the definition of comparison instructions and the way they are used. In general comparison instruction are used to test a pair of values to energize or de-energize a rung.

Definition

The following is a list of the comparison instructions in SLC 500:

EQU - Equal NEQ - Not Equal LES - Less Than LEQ - Less Than or Equal GRT - Greater Than GEQ - Greater or Equal

MEQ - Masked Comparison for Equal LIM - Limit Test

EQU - Equal

Symbol

Definition

Test whether two values are equal or not. If source A and Source B are equal, the instruction is logically true. Source A must be an

address. Source B can either be a program constant or an address. Negative integers are stored in two's complement.

NEQ - Not Equal

Symbol

Definition

Test whether one value is not equal to a second value. If Source A and Source B are not equal, the instruction is logically true. If the two values are

equal, the instruction is logically false. Source A must be an address. Source B can be either a program constant or an address.

Negative integers are stored in two's complement.

LES - Less Than

Symbol

Definition

Test whether one value is less than a second value. If Source A is less than the value at source B the instruction is logically true. If the value at

source A is greater than or equal to the value at source B, the instruction is logically false. Source A must be an address. Source B can either be a program constant or an address.

Negative integers are stored in two's complement.

LEQ - Less Than or Equal

Symbol

Definition

Test whether one value is less than or equal to a second value. If value at source A is less than or equal to the value at source B, the instruction is logically

true. If the value at source A is greater than or equal to the value at source B, the instruction is

logically false. Source A must be an address. Source B can either be a program constant or an address.

Negative integers are stored in two's complement.

GRT - Greater Than

Symbol

Definition

Test whether one value is greater than the second value. If the value at source A is greater than the value at source B, the instruction is logically true. If the value at source A is less than or equal to the value at source B, the instruction is

logically false. Source A must be an address. Source B can either be a program constant or an address.

Negative integers are stored in two's complement.

GEQ - Greater or Equal

Symbol

Definition

Test whether one value is greater or equal to a second value. If the value at source A is greater than or equal the value at source B, the instruction is

logically true. If the value at source A is less than to the value at source B, the instruction is logically false. Source A must be an address. Source B can either be a program constant or an address.

Negative integers are stored in two's complement.

MEQ - Masked Comparison for Equal

Symbol

Definition

Test portion of two values to see whether they are equal. Compares 16 bit data of a source address to 16 bit data at a reference address through a mask

Use the MEQ instruction to compare data at a source address with data at a compare address. Use of this instruction allows portions of the data to be masked by a separate word.

Source is the address of the value you want to compare. Mask is the address of the mask through which the instruction moves data. The mask can be

a hexadecimal value. Compare is an integer value or the address of the reference. If the 16 bits of data at the source address are equal to the 16 bits of data at the compare

address (less masked bits), the instruction is true. The instruction becomes false as soon as it detects a mismatch. Bits in the mask word mask data when reset; they pass data when set.

LIM - Limit Test

Symbol

Definition

Test whether one value is within the limit range of two other values The Low limit, Test, and High Limit values can be word addresses or constants, restricted to

the following combination: If the Test parameter is a program constant, both the Low Limit and High Limit parameters

must be word addresses. If the Test parameter is a word address, the Low Limit and High Limit parameters can be

either a program constant or a word address.

Introduction

We have started with PLC Math instructions the next step is to have a look at some of the Math functions. These functions do some specific but rather more frequently used Math functions. Anything done in these functions could be achieved by simple combination of math instructions.

Definition

The following is a list of the Math Functions in SLC 500:

CLR - Clear SQR - Square Root SCP - Scale with Parameters SCL - Scale Data ABS - Absolute Value CPT - Compute SWP - Swap XPY - X to the Power of Y

CLR - Clear

Symbol

Definition

When Clear instruction is executed it sets all bits of a word to zero. Upon execution of this instruction, all arithmetic status bits are reset

SQR - Square Root

Symbol

Definition

When rung conditions are true, this output instruction calculates the square root of the absolute value of the source and places the rounded result in the destination.

This instruction calculates the square root of a negative number without overflow or faults.

SCP - Scale with Parameters

Symbol

Definition

Produces a scaled output value that has a linear relationship between the input and scaled values. The scaled result is returned to the address indicated by the output parameter.

SCL - Scale Data

Symbol

Definition

Use this instruction to scale data from your analog module and bring it into the limits prescribed by the process variable or another analog module. When rung conditions are true, this instruction multiplies the source by a specified rate. The rounded result is added to an offset value and placed in the destination.

ABS - Absolute Value

Symbol

Definition

Absolute value |x| of a number x is itself, if x is positive or zero, but if x is negative, then its absolute value |x| is its negation –x, that is, the corresponding positive value. For example, |-1| = 1, but |2| = 2. The absolute value function strips a number of its sign.

CPT - Compute

Symbol

Definition

When compute is executed then copy, arithmetic, logical, or conversion operation residing in the expression field of this instruction is performed and the result is sent to the destination. The execution time of a Compute instruction is longer than that of a single arithmetic operation and uses more instruction words.

SWP - Swap

Symbol

Definition

Swaps the low and high bytes of a specified number of words in a bit, integer, ASCII, or string file.

XYP - X to the Power of Y

Symbol

Definition

When this instruction is executed then it will calculate X to the power of Y and stores the result in the destination.

Introduction

The next step in math instruction is Trigonometric functions. These functions are very useful when trig functionality is need. These functions are more advanced than math instruction.

Definition

The following is a list of the Trigonometric Functions in SLC 500:

ASN - Arc Sine ACS - Arc Cosine ATN - Arc Tangent

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Function Block

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SFC

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Ladder Logic

COS - Cosine LN - Natural Log LOG - Log to the Base 10 SIN - Sine TAN - Tangent

ASN - Arc Sine

Symbol

Definition

Takes the arc sine of a number and stores the result (in radians) in the destination

Carry (C), Always resets Overflow (V), Sets if overflow or an unsupported input is

detected Zero (Z), Sets if the result is Zero; otherwise resets; Sign (S), Sets if result is negative; otherwise resets;

ACS - Arc Cosine

Symbol

Definition

Takes the arc cosine of a number and stores the result (in radians) in the destination

Carry (C), Always resets Overflow (V), Sets if overflow or an unsupported input is

detected Zero (Z), Sets if the result is Zero; otherwise resets; Sign (S), Always resets

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ATN - Arc Tangent

Symbol

Definition

Takes the arc tangent of a number and stores the result (in radians) in the destination

Carry (C), Always resets Overflow (V), Sets if overflow; otherwise resets Zero (Z), Sets if overflow or an unsupported input is detected Sign (S), Sets if result is negative; otherwise resets;

COS - Cosine

Symbol

Definition

Takes the cosine of a number and stores the result in the destination.

Carry (C), Always resets Overflow (V), Sets if overflow; otherwise resets Zero (Z), Sets if overflow or an unsupported input is detected Sign (S), Sets if result is negative; otherwise resets;

LN - Natural Log

Symbol

Definition

Takes the natural log of value in the source and stores it in the destination

Carry (C), Always resets Overflow (V), Sets if overflow; otherwise resets Zero (Z), Sets if overflow or an unsupported input is detected Sign (S), Sets if result is negative; otherwise resets;

LOG - Log to the Base 10

Symbol

Definition

Takes the log base 10 of the value in the source and stores the result in the destination

Carry (C), Always resets Overflow (V), Sets if overflow; otherwise resets Zero (Z), Sets if overflow or an unsupported input is detected Sign (S), Sets if result is negative; otherwise resets;

SIN - Sine

Symbol

Definition

Takes the sine of a number and stores the result in the destination.

Carry (C), Always resets Overflow (V), Sets if overflow; otherwise resets Zero (Z), Sets if overflow or an unsupported input is detected Sign (S), Sets if result is negative; otherwise resets;

TAN - Tangent

Symbol

Definition

Takes the tangent of a number and stores the result in the destination

Carry (C), Always resets Overflow (V), Sets if overflow; otherwise resets Zero (Z), Sets if overflow or an unsupported input is detected Sign (S), Sets if result is negative; otherwise resets;