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Basics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center (NIRC), National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba Central 2, 1-1-1 Umezono, Tsukuba, Ibaraki 305-8568, Japan International Symposium on Advanced Gate Stack Technology September 29 - October 1, 2010, Albany, NY "Functional Stacks for Logic and Memory Devices"

Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

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Page 1: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

Basics of RRAM based on transition metal oxides

SHIMA Hisashi and AKINAGA Hiroyuki

Nanodevice Innovation Research Center (NIRC), National Institute of Advanced Industrial Science and Technology (AIST),Tsukuba Central 2, 1-1-1 Umezono, Tsukuba, Ibaraki 305-8568, Japan

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

Page 2: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

Outline

1. Introduction and overview of RRAM technology

2. Fundamental resistance switching operation

3. Challenges

4. Summary

Page 3: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

Outline

1. Introduction and overview of RRAM technology

2. Fundamental resistance switching operation

3. Challenges

4. Summary

Page 4: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

IRS: initial resistance stateLRS: low resistance state

0 2 4 6 8 10

LRS

HRS

Res

ista

nce

Switching cycle

IRS

IRS: initial resistance stateLRS: low resistance stateHRS: high resistance state

RRAM: Resistance Random Access MemoryRRAM based on oxides:

RRAM based on metallic bridge:

Connection and disconnection of metallic bridgein the insulating matrix governs the resistance switching

Defects (oxygen vacancies) in oxide materialplay a key role for the resistance switching

Reset

Set

Page 5: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

2010 2012 2014 2016 2018 20200

5

10

15

20

Calendar year

Hig

hest

W/E

vol

tage

(V)

102

103

104

105

106

107

108

109

Cyc

le e

ndur

ance

NAND Flash technology (Table PIDS5a)

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

Non-volatile memory (NVM) technologies

10152025303540

NA

ND

Fla

sh te

chno

logy

F (n

m)

Lower operating voltage Higher cycle

endurance

Continues increase of

Memory density of NAND Flash

Flash memory is one of the current most major NVM and the memory density of Flash memory is expected to be continuously increased.

Higher performance NVM is essentialfor the next generation, ultra-high speed broadband era. RRAM is one of the best solutions

• Data non-volatility• Low power operation• High speed operation• High cycle endurance

ITRS2007

•Improving broadband technology•Cloud computing

Page 6: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

Europe

USA

Asia

Research Center Julich (Nature Mater.)

IBM, Zurich Research Laboratory (MRS, Adv. Mater)

Spansion LLC (IEDM2005 & 2006, APL)University of Houston (PCMO, APL2000)Hewlett-Packard Labs. (NVMDS2007, Nature, Sciecne)

Samsung (APL2004-2010, JAP, JJAP,Patents, IEDM2004, 2005,2007, 2008)

Seoul National Univ. (IEDM2006, APL,Nature Nanotechnology)

SHARP (IEDM2006, Patents, IMW)AIST(MRS, APL, JJAP)ULVAC (MRS, Patents)Osaka Univ., Kanazawa Univ.Univ. of Tokyo (APL)Kyoto Univ. (APL)Tottori Univ.(APL)NEC (APL, IEDM2009)Fujitsu (NVMDS, IEDM2007)Panasonic (APL, IEDM2007, 2008)Toshiba (Nikkei Microdevice)

IMEC (Collaboration with Samsung, Hynics,Micron Technology)IBM, Zurich Research Laboratory (MRS, Adv. Mater)

CNR-INFM, Italy (IEDM, MRS)

ITRI (IEEE, IEDM2008, 2009)

KIST(APL), GIST(APL)

MINATEC (MRS)

Unity Semiconductor, SEMATEC (IEDM2011)Stanford University (IEEE, APL)

RRAM R&D in the world

Page 7: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

1ns 10ns 100ns 1μs 10μs

1mA

10mA

100μA

10μA

Ope

ratin

g cu

rren

t

Operating speed

High speed operation

Low current operation

< 25 μA

I. G. Baek et al.,Samsung, IEDM2004

Y. Hosoi et al.,SHARP&AIST,IEDM2006

K. Tsunodaet al.,FujitsuIEDM2007

Z. Wei et al., Panasonic,IEDM2008

S. E. Ahn et al.,Samsung,Adv. Mater 2008

H. Y. Lee et al.,ITRIIEDM2008

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

Operating current and speed in RRAM

Y. Tamai et al.,SHARP & AISTSSDM2008

®

Page 8: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

2002 2004 2006 2008 2010 2012 2014 2016101

102

103

104

Cur

rent

(μA)

Calendar year

NMOS drive current(ITRS2007, Low operating power technology)for gate width of 100 nm

Planar bulk UTB FD DG

Comparison with MOSFET drive current

I. G. Baek et al.,Samsung, IEDM2004

Y. Hosoi et al.,SHARP&AIST,IEDM2006

K. Tsunodaet al.,FujitsuIEDM2007

Z. Wei et al., Panasonic,IEDM2008

Y. Tamai et al.,SHARP & AISTSSDM2008

S. E. Ahn et al.,Samsung,Adv. Mater 2008

H. Y. Lee et al.,ITRI, IEDM2008

Operating current of RRAMcan be lower than theMOSFET drive current,indicating that RRAM is appropriate for the low operating powertechnology.

These NMOS drive current was calculated for the gatewidth of 100 nm.

Page 9: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014103

104

105

106

107

108

109

1010

1011

1012

Cyc

le e

ndur

ance

Calendar Year

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

Cycle endurance (CE)Estimation on

required cycle endurance:• Writing frequency: 1Hz

(1 time / 1 sec)• A period of use: 1 yrs

A practical CE for 1 memoryelement is in the order of 107 times.

= 3.1 x 107 sec

CE for single bit Flash memory

CE for multi-bit Flash memory

CE in RRAM exceeds current Flash memories

SamsungI. G. Baek et al., IEDM2004(Pt/NiO/Pt)

Panasonic

Z. Wei et al., IEDM2008(Pt/Ta2O5/Pt)

ITRI

H. Y. Lee et al, IEDM2008(TiN/HfOx/Ti/TiN)

ITRIH. Y. Lee et al, JJAP(TiN/HfOx/Ta)

NECM. Terai et al,IEDM2009(BE/TiOx/Ta2O5/Pt)

National Tsin-Hua UniversityY. H. Zheng, et al,IEDM2009 (Si/SiO2/TiON/TiN/W)

ITRI

H. Y. Lee et al, JJAP(TiN/HfOx/Ti/TiN)

:Pt free devices

C. Yoshida et al,APL2007(Pt/TiOx/TiN)

Fujitsu

ITRI

H. Y. Lee et al.,IEDM2010Technical program(19.7), HfOx-RRAM

Page 10: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

2003 2004 2005 2006 2007 2008 2009 2010 2011101

102

103

104

105

106

Dev

ice

size

(nm

)

Calendar Year

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

Memory element size miniaturization

Submicron-scaledevices

Large devicesfor the basic researches

50 nm x 50 nmCross-point structure(HP, Samsung)

30 nm x 30 nmTiN/HfOx/TiOx/TIN device(ITRI, IEDM2009)

50 nm φAl/PCMO/Pt device(GIST, IEDM2009)

Page 11: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

Outline

1. Introduction and overview of RRAM technology

2. Fundamental resistance switching operation

3. Challenges

4. Summary

Page 12: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

Oxygen ion/vacancy movement in oxide materialMiyaoka H et al., Solid State Commun. 123, 399 (2002).Electromigration of defects in TiOx

V = 35 V, in vacuum

Dark blue region contains higher density of VO

VO electromigration is possible andit piles up around the negatively biased electrode.

This electromigration can beregarded as the oxidation/reduction reaction of oxidesat the interface, or, dopingof defects to the interface

Page 13: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

Pt(BE)/TiOx/Pt(TE) Switchable diode

-2 -1 0 1 20

1

2

3

4

5

V (V)

I (nA

)

+7V/100ms

-2 -1 0 1 2-15

-12

-9

-6

-3

0

V (V)

I (nA

)

-7V/100ms-2 -1 0 1 2

0

1

2

V (V)

I (nA

)

+7V/100ms

-2 -1 0 1 2-7-6-5-4-3-2-101

V (V)

I (nA

)

-7V/100ms-2 -1 0 1 2

0

1

2

V (V)

I (nA

)

+7V/100ms

Positive voltage pulse

Negative voltagepulse

Positive voltage pulse

Negative voltagepulse

Positive voltage pulse

Schottky

Ohmic Schottky

OhmicPt TE

Pt BE

Pt TE

Pt BE

TiOx TiOx

Negative voltage to TE

Positive voltage to TE

5μm x 5μm Pt/TiOx/Pt junction

H. Shima et al., APL 94, 082905 (2009) BE: bottom electrode, TE: top electrode

Page 14: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

2.0 2.5 3.0 3.5 4.0-12

-10

-8

-6

-4

-2

Δ =

(b) After breakdown(-0.1V)

(w=500ms)-7.0V

0.8

1.7

Log 10

(I -1.0

V(A))

Log10(APtTE(μm2))

0.1

Initial

-10

-8

-6

-4

-2

Δ = 0.1After breakdown(+0.1V)

1.0

1.2Log 10

(I +1.0

V(A))

Pt/TiOx/Pt(w=500ms)

-7.0V

Initial

(a)

-10 -9 -8 -7 -6 -5 -4 -3 -2 -1 010-10

10-8

10-6

10-4

10-2

100

102

I (m

A)

V (V)

Pt/TiOx/Pt, 20 x 20 μm2

Breakdown of junction Hysteresis (Rectification switching)

Breakdownfilamentary conduction path

Rectification switchingconduction by wholearea of the junction

Categorization by resistance switching area

No device sizedependence

A clear device sizedependence

Page 15: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

LRS

HRS

V

ILRS

HRS

Categorization by operational voltage polarityReset Switching from LRS to HRSSet Switching from HRS to LRS

Forming The first resistance switching

• Unipolar resistance switchingVoltage polarities for set and reset are identical

• Bipolar resistance switchingVoltage polarities for set andreset are opposite

Page 16: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

-2 -1 0 1 2 3 40.00000

0.00003

0.00006

0.00009

0.00012

0.00015

SetReset

I (A

)

V (V)

(b) Pt/CoO/Ti

Forming

0 1 2 30.0000

0.0003

0.0006

0.0009

0.0012

0.0015

Forming

Reset

I (

A)

V (V)

Set

(a) Pt/CoO/Pt

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

-3 -2 -1 0 1 2 30.0000

0.0005

0.0010

0.0015

0.0020

0 1 2 3 40.0000

0.0001

0.0002

0.0003

0.0004

0.0005

Forming

RS = 10 kohm

I (A

)V (V)

(b) TiN/HfOx/TiRS = 10 kohm

0 1 2 3 4 50.0000

0.0002

0.0004

0.0006

0.0008

0.0010

RS = 10 kohm

0 1 2 3 4 5 60.0000

0.0001

0.0002

0.0003

0.0004

0.0005

Forming(a) TiN/HfOx/Pt

RS = 10 kohm

V (V)

I (A

)URS: BRS:

TiN/HfOx/Pt TiN/HfOx/Ti

•The stable operation mode depends on the TE material. For the precious metal (i.e. inert material), URS can be observed. On the other hands, BRS is preferred for the reactive electrode materials such as Ti.

Electrode material dependent switchingPt/CoO/Pt Pt/CoO/Ti

Page 17: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

Electrode material dependent switchingElectrode materialdependent operationin HfOx-RRAM

Pt, Au → URS

Ti, Ta, TiN→ BRS

•Inert material:

•Reactive material:

BE: bottom electrodeTE: top electrode

[1] K.-R. Kim, et al., J. Korean Phys. Soc. 59, S548 – S551 (2006). [2] H.-Y. Lee, et al., Jpn. J. Appl. Phys. 46, 2175 – 2179 (2007).[3] M. Y. Chan, et al, Microelectric. Engineer. 85, 2420 – 2424 (2008). [4] H. Y. Lee, et al., Tech. Dig. Int. Electron Devices Meeting, San Francisco, 2008, pp. 297-300.[5] Y.-M. Kim, and J.-S. Lee, J. Appl. Phys. 104, 114115-1 – 114115-5 (2008). [6] S. Lee, et al., J. Electrochem. Soc. 115, H92 – H96 (2008).[7] H. Y. Lee, et al., Appl. Phys. Lett. 92, 142911-1 – 142911-3 (2008). [8] Y. S. Chen, et al., Tech. Dig. Int. Electron Devices Meeting, San Francisco, 2009, pp. 105-108.[9] C. Walczyk, et al., J. Appl. Phys. 105, 114103-1 – 114103-6 (2009). [10] L. Goux, et al., Electrochem. Solid-State Lett. 13, G54 – G56 (2010).[11] S. Yu, et al., Electrochem. Solid-State Lett. 13, H36 – H38 (2010). [12] P.-S. Chen, et al., Jpn. J. Appl. Phys. 49, 04DD18-1 – 04DD18-5 (2010).[13] P. Gonon, et al., J. Appl. Phys. 107, 074507-1 – 074507-9 (2010).[14] Z. Fang, et al., Proceedings of 2010 IEEE Int. Reliability Physics Symposium, MY.4.1.-MY4.2.

Page 18: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

Electrochemical reaction in BRSCommon point:

Pt/TiOx/TiNExamples:

Fujimoto et al., Appl. Phys. Lett. 89, 223509 (2006).

H. Akinaga and H. Shima, proceedings of IEEE, in press

TiN/HfOx/TiOx/TiNY. S. Chen et al., IEDM 2009

• The drift of oxygen ions (or oxygen vacancies) is considered toplay a key role. When the oxygen ions are supplied from the oxygen reserving layer, the device is switched into HRS. On the other hands, when the oxygen ions are absorbed by the oxygen r e s e r v i n g l a y e r , t h e d e v i c e i s s w i t c h e d i n t o L R S .Namely, the electrochemical reaction (oxidation and reduction) is the mechanism of the resistance switching

Page 19: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

Joule heating in URS

U. Russo, et al., IEDM2007

S. H. Chang, et al., Appl. Phys. Lett. 92, 183507 (2008).

Pt/NiO/Pt

Pt/NiO/Pt

Y. Sato et al., Appl. Phys. Lett. 90, 033503 (2007).Pt/NiO/Pt

• In LRS, the current conduction isgoverned by the spatially confinedarea, the temperature rise by Jouleheating is expected. Therefore, nanoscale thermal management will b e requ i red fo r t he u l t ima te miniaturization of memory cells.

Page 20: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

Outline

1. Introduction and overview of RRAM technology

2. Fundamental resistance switching operation

3. Challenges

4. Summary

Page 21: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

• Since the resistance switching speed is very fast, especially for the switching process into LRS, i.e., for the forming and set processes, the reliable current regulation is required. From this viewpoint, 1T1R configuration is appropriate. *H. Shima et al.Appl.Phys.Lett.93, 113504(2008).

1R with an externalload resistor (LR)*

1T1R configuration1R with a current compliance(CC) imposed by semiconductor

parameter analyzer RRAM element

RRAM element

externalload resistor

RRAM element

Transistor

-600 -400 -200 0 2000

20

40

60

80

100

LR

0 4 8 120.00.51.01.52.0

I (m

A)

LR(RS=6.8kΩ)

V (V)

CC(1mA)

I OSC

(mA

)Time (ns)

Pt(BE)/CoO/Pt(TE)

CC

0 3 6 9 12 150

2

4

6

I (m

A)

V (V)

Pt/CoO/Pt CoO = 8 nm 24 nm 50 nm

-200 -100 0 100 200 3000

1

2

3

4

5Pt/CoO/Ptcompliance = 5 mAtrigger = 300 mV (6 mA)

CoO = 50 nm

8 nm

V

CH

3O

SC (V

)

Time (ns)

24 nm

Regulation of overshoot current

Page 22: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

Reduction of forming voltage

0 5 10 15 20 2510-9

10-8

10-7

10-6

10-5

10-4

10-3

10-2

Ti thickness (nm)I F D

C (A

)

IFDC, AS(negative)

IFDC, PDA(positive)

IFDC, PDA(negative)

IFDC, AS(positive)

PDA at 420C

nDUT = 3

V

IForming process

(VFDC, IFDC)

•The reactive electrode material can effectively decreases the forming voltage VF of TiN/high-k oxide/Ti/TiN RRAM after the appropriate annealing process. Depending on the annealing condition and layer structures in the RRAM element, the leak current becomes too large.

0 5 10 15 20 25 30-5

-4

-3

-2

-1

0

1

2

3

4

5

nDUT = 3

PDA at 420C

VFDC, PDA

VFDC, PDA

VFDC, AS

V FDC (V

)

Ti thickness (nm)

VFDC, AS

Page 23: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

Nanoscale characterization of oxides

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 160

5000

10000

15000

20000

25000

30000

Ti-L (PDA)

Pt(BE)/high-k/Ti(05nm)/Pt Ti-L (PDA) O-K (PDA)

Relative positionIn

tegr

ated

EEL

S si

gnal

BE (a) TE (b)

O-K (PDA)

Pt

Pt

Tihigh-k

•Electron energy loss spectroscopy (EELS) is a powerful toolto characterize oxides with a nanoscale resolution. H o w e v e r , e s p e c i a l l y f o r t h e h i g h - k o x i d e ,the characterization of metal edge EELS signal becomes difficult because of the severe signal intensity decay.Development of nanoscale metrology for RRAM is crucialin order to improve the operating reliability of RRAM in association with the material characteristics.

HADEF-STEM image of high-k/Ti interface

Page 24: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

Outline

1. Introduction and overview of RRAM technology

2. Fundamental resistance switching operation

3. Challenges

4. Summary

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

Page 25: Basics of RRAM based on transition metal oxides H Shima.pdfBasics of RRAM based on transition metal oxides SHIMA Hisashi and AKINAGA Hiroyuki Nanodevice Innovation Research Center

International Symposium on Advanced Gate Stack TechnologySeptember 29 - October 1, 2010, Albany, NY"Functional Stacks for Logic and Memory Devices"

• The excellent memory properties of RRAM, high speed and low power operation, good cycle endurance and compatibility with the CMOS device miniaturization has been evidenced and the potential of RRAM as the best candidate for the nonvolatile memory in the next generation is being steadily consolidated.

• The comprehensive development including the circuit design, nanoscale thermal management, as well as the nanoscale metrology suitable for RRAM are crucial for the further improvement of RRAM operational performance.

Summary