BJT

Department of Electronics and Communication Engineering,Manipal Institute of Technology, Manipal, INDIA

MODULE 3

Bipolar Junction Transistor

Prepared by

H V Balachandra AcharSenior Lecturer,

Dept. of E&C Engg.,M I T, Manipal

BASIC ELECTRONICS


Syllabus

• Introduction to Bipolar Junction Transistor• BJT Operation• BJT Configurations• Tutorials• BJT Biasing• Tutorials• BJT Amplifier• Tutorials


Reference Books

1. “Electronic Devices and Circuit Theory” by Boylestad & Nashelsky,

2. “Integrated Electronics” by Millman & Halkias,


Introduction

• Solid state transistor was invented by a team of scientists at Bell laboratories during 1947-48

• It brought an end to vacuum tube era

• Advantages of solid state transistor over vacuum devices:

– Smaller size, light weight

– No heating elements required

– Lower power consumption and operating voltages

– Low price


Introduction

Figure showing relative sizes of transistor, IC and LED

Figure showing different transistor packages


Introduction

• Bipolar Junction Transistor (BJT) is a sandwich consisting of three layers of two different types of semiconductor

• Two kinds of BJT sandwiches are: NPN and PNP


Introduction

• The three layers of BJT are called Emitter, Base and Collector

• Base is very thin compared to the other two layers

• Base is lightly doped. Emitter is heavily doped. Collector is moderately doped

• NPN – Emitter and Collector are made of N-type semiconductors; Base is P-type

• PNP – Emitter and Collector are P-type, Base is N-type

• Both types (NPN and PNP) are extensively used, either separately or in the same circuit


Introduction

• Transistor symbols:

Note: Arrow direction from P to N (like diode)


Introduction

• BJT has two junctions – Emitter-Base (EB) Junction and Collector-Base (CB) Junction

• Analogous to two diodes connected back-to-back:

– EB diode and CB diode

• The device is called “bipolar junction transistor” because current is due to motion of two types of charge carriers – free electrons & holes


Transistor Operation

• Operation of NPN transistor is discussed here; operation of PNP is similar with roles of free electrons and holes interchanged

• For normal operation (amplifier application)

– EB junction should be forward biased

– CB junction should be reverse biased

• Depletion width at EB junction is narrow (forward biased)

• Depletion width at CB junction is wide (reverse biased)





Un-biased transistor showing barriers at the junctions



C-B junction is reverse biased – increased barrier height



E-B junction is forward biased – aids charge flow



Electron-hole combination – leads to small base current



• When EB junction is forward biased, free electrons from emitter region drift towards base region

• Some free electrons combine with holes in the base to form small base current

• Inside the base region (p-type), free electrons are minority carriers. So most of the free electrons are swept away into the collector region due to reverse biased CB junction



• Three currents can be identified in BJT

1. Emitter current • This is due to flow of free electrons from emitter to base

• Results in current from base to emitter

2. Base current• This is due to combination of free electrons and holes in the base

region

• Small in magnitude (usually in micro amperes)

3. Collector current• Has two current components:

• One is due to injected free electrons flowing from base to collector

• Another is due to thermally generated minority carriers



• Note the current directions in NPN and PNP transistors

• For both varieties: ---(1)

C

E

B

IC

IE

IB

NPN

C

E

B

IC

IE

IB

PNP

BCE III +=



• As noted earlier, collector current has two components:

– One due to injected charge carriers from emitter

– Another due to thermally generated minority carriers

• Both results in current in the same direction. Hence

--- (2)

αdc is the fraction of charge carriers emitted from emitter, that enter into the collector region

ICBO is the reverse saturation current in CB diode

--- (3)

CBOEdcC III +=α

E

CBOCdc I

II −=α



• As approximation, we can neglect ICBO compared to IE and IC

• Hence approximate equations are:

• Like the reverse saturation current of ordinary diode, ICBO also doubles for every 10o rise in temperature.

• So ICBO cannot be neglected at higher temperatures

• The parameter αdc is called common-base dc current gain

• Value of αdc is around 0.99

EdcC II α=

E

Cdc I

I=α



• We have

• Substituting for IE, we get

CBOEdcC III +=α

( ) CBOBCdcC IIII ++=α

CBOBdcCdc III +=− αα )1(

)1()1( dc

CBOB

dc

dcC

III

ααα

−+

−=

CEOBdcC III += β

• Where and

)1( dc

dcdc α

αβ−

= ( ) CBOdcdc

CBOCEO I

II 1

)1(+=

−= β

α

--- (4)



• Equations (2) and (4) are two alternate forms of BJT current equation

• Since value of αdc is around 0.99, ICEO >> ICBO

• However, ICEO is still very small compared to IC

• Hence approximation of (4) gives: or

• Parameter βdc is called common emitter dc current gain

• Values of αdc and βdc vary from transistor to transistor. Both αdc and βdc are sensitive to temperature changes

BdcC II β=B

Cdc I

I=β


Problems

1. A BJT has alpha (dc) 0.998 and collector-to-base reverse sat current 1µA. If emitter current is 5mA, calculate the collector and base currents. (Ans: 4.99 mA, 10 µA)

2. An npn transistor has collector current 4mA and base current 10 µA. Calculate the alpha and beta values of the transistor, neglecting the reverse sat current ICBO (Ans: 0.9975, 400)

3. In a transistor, 99% of the carriers injected into the base cross over to the collector region. If collector current is 4mA and collector leakage current is 6 µA, Calculate emitter and base currents (Ans: 4.034 mA, 34 µA)


Transistor Configurations

• BJT has three terminals

• For two-port applications, one of the BJT terminals needs to be made common between input and output

• Accordingly three configurations exist:

– Common Base (CB) configuration

– Common Emitter (CE) configuration

– Common Collector (CC) configuration• (The last one is not discussed in this course)

Input Output2-port device


Transistor Configurations• Common Base configuration

(Resistors are not shown here for simplicity)

• Base is common between input and output

– Input voltage: VEB Input current: IE

– Output voltage: VCB Output current: IC



• CB Input characteristics

– A plot of IE versus VEB

for various values of VCB

– It is similar to forward biased diode characteristics

– As VCB is increased, IE

increases only slightly

– Note that second letter in the suffix is B (for base)



constVwithI

Vr CB

E

EBi ∆

∆=

constIwithV

VA E

EB

CBV ∆

∆=

• Input resistance ri

• Voltage amplification factor AV

• Both can be determined from the CB input characteristics



21

21

EE

EBEBi II

VVr

−−

=21

21

EBEB

CBCBV VV

VVA

−−

=



• CB Output characteristics– A plot of IC versus VCB for various values of IE

– Three regions are identified: Active, Cutoff, Saturation– Active region:

• E-B junction forward biased• C-B junction reverse biased• IC is positive, VCB is positive• IC increases with IE

• For given IE, IC is almost constant; increases only slightly with increase in VCB. This is due to base-width modulation (Early effect)



CB Output characteristics



• Base Width modulation

– As the reverse bias voltage VCB is increased, the depletion region width at the C-B junction increases. Part of this depletion region lies in the base layer. So, effective base width decreases. Hence number of electron-hole combination at the base decreases. So base current reduces and collector current increases.

– Note that IE = IC + IB



• When IE = 0, IC = ICBO

– ICBO is collector to base current with emitter open

– Below this line we have cut-off region

– Here both junctions are reverse biased

• Region to the left of y-axis (VCB negative) is saturation region

– Here both junctions are forward biased

– IC decreases exponentially, and eventually changes direction



• Both can be measured from output characteristics

constIwithI

Vr E

C

CBO ∆

∆=

• Output resistance ro

• Current amplification factor AI or αac

constVwithI

ICB

E

Cac ∆

∆=α


Transistor Configurations• Common Emitter configuration

(Resistors are omitted for simplicity)

• Emitter is common between input and output– Input voltage: VBE Input current: IB

– Output voltage: VCE Output current: IC



CE input characteristics

• Plot of IB versus VBE forvarious values of VCE

• Similar to diodecharacteristics

• As VCE is increased, IB

decreases only slightly• This is due to base-width

modulation• Note that second suffix is E

(for emitter)



• CE output characteristics

– A plot of IC versus VCE for various values of IB

– Three regions identified: Active, Cut-off, Saturation

– Active region:

• Linear region in the output characteristics

• E-B junction forward biased

• C-B junction reverse biased

• IC increases with IB

• For given IB, IC increases slightly with increase in VCE; this is due to base-width modulation (Early effect)



CE output characteristics



• Note that VCE = VCB + VBE

• So if VCE is increased, effectively VCB also increases

• For saturation to take place, C-B junction should be forward biased.

• This happens when VCE is approximately 0.3 V (or less) for Si

• Note that when VCE= 0.3V, and VBE= 0.6 V, VCB= –0.3V (a forward bias of 0.3 V)

• So region to the left of the vertical line VCE=VCE(sat)=0.3V (for silicon) is considered as saturation region

• Region below IB=0 line (or IC=ICEO) is cut-off region



• ICEO is much larger than ICBO because of the relation:

dc

CBOCEO

II

α−=

1 • Note that value of αdc is around 0.99

• The values of αdc & αac, and βdc & βac are almost the same. Hence the subscripts can be omitted for simplicity



• Input resistance ri

• Voltage gain AV

• Output resistance ro

• Current gain AI or βac

constVwithI

Vr CE

B

BEi =

∆∆

=

constIwithV

VA B

BE

CEV =

∆∆

=

constIwithI

Vr B

C

CEo =

∆∆

=

constVwithI

ICE

B

Cac =

∆∆

=β

• All these parameters can be determined from CE characteristics



• Experimental setup for determining CE characteristics:


Tutorials1. A Ge transistor with β = 100 has collector-to-base leakage

current of 5 µA. If the transistor is connected in common-emitter operation, find the collector current for base current (a) 0 (b) 40 µA.

Sol: Given that ICBO = 5µA, and β = 100

We know that

When IB = 0, IC = ICEO = (β+1)ICBO = 505 µA

When IB = 40 µA, IC = βIB + ICEO

= (100 × 40 × 10–6) + (505 × 10–6)

= 4.505 mA

CEOBdcC III += β


Tutorials

2. A Ge Transistor has collector current of 51 mA when the base current is 0.4 mA. If β = 125, then what is its collector cutoff current ICEO? (Ans: 1 mA)

3. In a transistor circuit, when the base current is increased from0.32 mA to 0.48 mA, the emitter current increases from 15 mA to 20 mA. Find αac and βac values. (Ans: 0.968, 30.25)

4. A transistor with α = 0.98 and ICBO = 5 µA has IB = 100 µA. Find IC and IE. (Ans: 5.15 mA, 5.25 mA)


Transistor Biasing

• What is meant by biasing the transistor?

– Applying external dc voltages to ensure that transistor operates in the desired region

• Which is the desired region?

– For amplifier application, transistor should operate in active region

– For switch application, it should operate in cut-off and sat.

• What is meant by quiescent point (Q-point)?

– The point we get by plotting the dc values of IC , IB and VCE

(when ac input is zero) on the transistor characteristics


Transistor Biasing

• Transistor characteristics showing Q-point– Q-point is in the middle

of active region.– This is called “Class-A”

operation. (Other classes are discussed later)


Transistor Biasing

• Types of biasing: – Fixed bias and Self bias

• Fixed bias:– The value of IB is “fixed” by choosing

proper value for RB

– Equations to consider are:

B

BECCB R

VVI

−=

CCCCCE RIVV −=


Transistor Biasing

• Pros and Cons of Fixed bias:

– Pros: 1) Simple circuit

2) Uses very few resistors

– Cons: Q-point is unstable

1) If temperature increases, then β increases, and hence ICQ and VCEQ vary (effectively Q-point shifts)

2) If the transistor is replaced with another transistor having different β value, then also Q-point shifts


Transistor Biasing

• Load Line

– We have: CCCCCE RIVV −=

– This is an equation of straight line with points VCC/RC and VCC lying on y-axis and x-axis respectively

– This line is called “Load line” because it depends on resistor RC considered as “Load” and VCC

– Intersection of load line and transistor characteristic curve is the Q-point or operating point

– This point is the common solution for characteristics and load line equation


Transistor Biasing

Variation in load line with circuit parameters VCC, RC

and RB


Transistor Biasing

• Voltage divider bias or Self bias

– Resistor RE connected between emitter and ground

– Voltage-divider resistors R1 & R2

replace RB

– Circuit can be analyzed in two methods:

• Exact method (using Thevenin’s theorem)

• Approximation method (neglecting base current)


Transistor Biasing

• Exact method:

– Input side of self-bias (Fig. a) transformed into Thevenin’s equivalent circuit (Fig. b) where, RTH is the resistance looking into the terminals A & B (Fig. c) and VTH is given by:

21

2

RR

RVV CC

TH +=

21

2121 ||

RR

RRRRRTH +

==


Transistor Biasing

ETH

BETHB RR

VVI

)1( ++−

=β

E

BETHB R

VVI

β−

≈E

BETHBC R

VVII

−== β

• Equations to consider:

• Since β >> 1 and (β+1)RE >> RTH

• Since IC is almost independent of β, Q-point is stable

• Self-bias circuit redrawn with input side replaced by Thevenin’s equivalent :

EECCCCCE RIRIVV −−=


Transistor Biasing

• Approximate analysis:

– Carried out only if βRE ≥ 10R2

• IB is negligible compared to I1 and I2

• So,

EECCCCCE RIRIVV −−=

21

2

RR

RVV CC

B +=

E

BEBE R

VVI

−=

EC II α=


Tutorials

1. For a fixed bias circuit using Si transistor, RB = 500 kΩ, RC = 2 kΩ, VCC = 15 V, ICBO = 20 µA and β = 70. Find the collector current ICQ and VCEQ at Q-point. Take VBE as 0.7 V. (Ans: 3.422mA, 8.156V)

2. A Si transistor is biased for a constant base current. If β = 80, VCEQ = 8 V, RC = 3 kΩ and VCC = 15 V, find ICQ and the value of RB required.

(Ans: 2.33 mA, 493 K)

3. Repeat problem 2 if the transistor is a germanium device. (VBE=0.3V) (Ans: 2.33 mA, 507 K)

4. For a fixed bias circuit, VCC = 12 V and RC = 4 kΩ. The Ge transistor used is characterized by β = 50, ICEO = 0 and VCE sat = 0.2 V. Find the value of RB that just results in saturation. (Ans: 198.3K)


Tutorials5. For a self bias circuit using silicon transistor, RE = 300 Ω, RC = 500 Ω,

VCC = 15 V, β = 100 and . If 10R2= βRE, then determine the value of R1

to get VCEQ = VCC / 2. (Ans: 9.85K)

6. For a self bias circuit, the transistor is a Si device, RE = 200 Ω, R1 = 10R2 = 10 kΩ, RC = 2 kΩ, β = 100 and VCC = 15 V. Determine the values of ICQ and VCEQ.

7. Suppose if the transistor used in problem 6 failed, and was replaced with a new transistor with β = 75. Is the new transistor still biased for active region operation?

8. A self bias circuit uses Si transistor, RC = 330 Ω, RE = 100 Ω and VCC = 12 V. Estimate the values of R1 and R2 required to provide a base current of 0.3 mA, so as to locate the operating point at ICQ = 18 mA and VCEQ = 4.25 V.


Transistor Amplifier

• Amplifier– Device which gives larger swing in output voltage

proportional to the input voltage swing

– BJT basically amplifies current: Collector current equals beta times Base current

– With proper circuit designs, we can get voltage amplification and power (both voltage and current) amplification

– For faithful amplification (no distortion), BJT should operate in Active region throughout the input cycle (Class A)



– Without any bias, transistor is in cut-off (IC=0, VCE=0)

– Biasing circuit fixes the operating point in the middle of active region required for faithful amplification

– Figure shows common-emitter amplifier circuit employing fixed bias



• With reference to the fig in previous slide, as input voltage vinvaries, iin varies, thus base current iB varies

• This variation in base current is amplified beta times to get variation in collector current iC

• Output voltage vout is VCC – iC RC

• Note that if vin increases, there is proportional decrease in vout,but of greater magnitude

• Similarly if vin decreases, vout increases proportionally• Thus output voltage of CE amplifier is 180o out of phase with

input voltage• (Note that small letters are used to represent ac quantities)



• Voltage gain or voltage amplification factor is vout /vinwhich is dependent on β, RC

and other physical parameters of the transistor

• Figure shows input and output waveforms for the amplifier circuit shown previously

• Note the dc shift in the output voltage waveform. i.e., when vin = 0, vout = VCEQ



• This animation shows the working of Common Emitter transistor circuit



• Gain of the amplifier is usually expressed in decibels

• (AV)dB = 20 log10 | AV |

• Usually a gain of 100 (i.e., 40 dB) can be obtained using singletransistor. For higher gain requirement, two or more amplifier stages are to be cascaded

• Overall gain is product of individual gains; But when expressedin dB, overall gain is sum of individual gains (in dB)

VNVVV AAAA ........ 21=

dBVNdBVdBVdBV AAAA )(.......)()()( 21 +++=



• RC coupling– Fig shows CE amplifier

employing self bias

– Additional components are CC and CE

– CC is called coupling capacitor – used to prevent dc component from entering or leaving amplifier stage



– CE is called emitter bypass capacitor – used to bypass the ac emitter current – preventing it from flowing through RE

– If ac emitter current is allowed to pass through RE, then vBEreduces and hence output voltage reduces

• Frequency response of amplifier– It’s important to know the behavior of amplifier at different

frequencies – Gain is NOT constant at all frequencies – depends on

various factors– Frequency response is a plot of gain versus frequency



• Figure shows frequency response plot

• At lower and higher frequencies, gain is less

• Gain attains const value at mid frequencies

• Bandwidth of amplifier is range of frequencies over which gain is not less than 3 dB of maximum gain

20 log | 0.707 AVO | = 20 log | AVO | – 3



• Analysis of frequency response curve– At very low frequencies, reactance of coupling capacitors is

high, hence there is loss of signal voltage across capacitors, resulting in reduced gain

– Also at low frequencies, emitter bypass capacitor does not fully bypass the ac emitter current, hence ac voltage drop develops across RE, resulting in reduced gain

– At very high frequencies, shunt capacitances due to wiring and inter-layer junction capacitances will be prominent, hence resulting in signal loss

– At mid frequencies, gain is maximum and constant



• Classification of amplifiers:– Based on mode of operation:

• Class A: collector current flows throughout the complete input cycle (360o); Q-point is in the centre of active region (no distortion)

• Class B: collector current flows during (positive or negative) half cycle of input; Q-point is at “just cut-off” or “just saturation”

• Class AB: collector current flows for more than half cycle, but less than full cycle of input waveform; Q-point is “near cut-off” or “near saturation”

• Class C: collector current flows for less than half cycle of input waveform; Q-point is in “deep cutoff” or “deep saturation”

• (For classes B, AB and C, output is distorted or clipped)


Tutorials

1. A three-stage amplifier circuit has first stage gain of 45 dB, second stage gain of 50 dB and third stage gain of –5 dB. What is the overall gain? If input to the first stage is 0.1mV,what is the output of final stage?

2. An amplifier has maximum gain of 200 and bandwidth of 500 kHz. If lower cutoff freq is 50 Hz, what is the upper cutoff freq and gain at this frequency?

3. Design a self bias circuit, given the following parameters:

IC=1mA, VCC=12V, VCE=VCC/2, VB=VCC/10, beta=100, VBE=0.6V, R2=2K


End of Module 3

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