B.tech(Computer Science Engineering)- Syllabus of B.tech III Year - I Sem

7/31/2019 B.tech(Computer Science Engineering)- Syllabus of B.tech III Year - I Sem

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w.e.f. 2010-2011 academic year

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADAKAKINADA-533003, Andhra Pradesh (India)

COMPUTER SCIENCE AND ENGINEERING

COURSE STRUCTURE

I YEAR I SEMISTER

S. No. Subject T P Credits

1 English I 3 - 2

2 Mathematics - I 3 - 2

3 Engineering Physics I 3 - 2

4 Engineering Chemistry I 3 - 2

5 C Programming 3 - 2

6 Mathematical Methods 3 - 2

7 Engineering Physics & Engineering Chemistry Laboratory -I - 3 2

8 Engineering Workshop (Carpentry, Fitting, House wiring, ) - 3 2

9 C Programming Lab - 3 210 English Proficiency Lab - 3 2

Total 20

I YEAR II SEMISTER


1 English II 3 - 2

2 Mathematics II 3 - 2

3 Engineering Physics II 3 - 2

4 Engineering Chemistry- II 3 - 2

5 Engineering Drawing 3 - 2

6 Environmental Studies 3 - 27 Engineering Physics & Engineering Chemistry Laboratory -II - 3 2

8 English - Communication Skills Lab - 3 2

9 IT Workshop - 3 2

Total 18

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COURSE STRUCTURE

II YEAR I SEMISTER


1 Managerial Economics and Financial Analysis 4 - 4

2 Probability & Statistics 4 - 4

3Mathematical Foundations of Computer Science andEngineering

4 - 4

4 Digital Logic Design 4 - 4

5 Electronic Devices And Circuits 4 - 4

6 Data Structures 4 - 4

7 Electronic Devices and Circuits Lab - 3 28 Data Structures Lab - 3 2

9 Professional Communicational skills - 2 110 Professional Ethics and Morals-I 2 - -

Total 29

II YEAR II SEMISTER


1 Software Engineering 4 - 4

2Principles of ProgrammingLanguages

4 - 4

3Object Oriented Programming

through Java

4 - 4

4 Computer Organization 4 - 4

5 Data Base Management Systems 4 - 4

6Formal Languages and AutomataTheory

4 - 4

7 Object Oriented Programming Lab - 3 2

8 Data Base Management Systems Lab - 3 2

9 Professional Communicational skills - 2 1

10 Professional Ethics and Morals-I 2 - -

Total 29

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COURSE STRUCTURE

III YEAR I SEMISTER


1 Compiler Design 4 - 4

2 Computer Networks 4 - 4

3 Micro Processors and Multicore Systems 4 - 4

4 Operating Systems 4 - 4

5 Computer Graphics 4 - 4

6 Advanced Data Structures 4 - 4

7 Operating System & Compiler Design Lab - 3 2

8 Advanced Data Structures Lab - 3 2

9 IPR and Patents- 1 2 - -

Total 28

III YEAR II SEMISTER


1 Advanced Computer Networks 4 - 4

2 Computer Architecture 4 - 4

3 Design and Analysis of Algorithms 4 - 4

4 UNIX Programming 4 - 4

5 Management Science 4 - 4

6 Advanced Java and Web Technologies 4 - 4

7 Computer Networks and Unix Lab - 3 2

8 Advanced Java and Web Technologies Lab - 3 2

9 IPR and Patents- 2 2 - -

Total 28

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COURSE STRUCTURE

IV YEAR I SEMISTER


1 Cryptography and Network Security 4 - 4

2 UML & Design Patterns 4 - 4

3 Data Ware Housing and Data Mining 4 - 4

4 Mobile Computing 4 - 4

5

Open Electivei. MATLABii.Web Servicesiii. Open Source Software

iv.Cyber Laws

4 - 4

6

Elective I:i. Computer Forensicsii. Cloud Computingiii. Software Project Managementiv. Machine Learningv. Distributed Databases

4 - 4

7 UML & Design Patterns Lab - 3 2

8 Mobile Application Development Lab - 3 2

Total 28

IV YEAR II SEMISTER


1

Elective IIi) Human Computer Interactionii) Advanced Operating Systemsiii)Mobile Adhoc & Sensor Networksiv)Pattern Recognitionv) Digital Image Processing

4 - 4

2

Elective IIIi) Embedded and Real Time Systemsii) Simulation Modelingiii)Information Retrieval Systemsiv) Artificial Intelligencev) Multimedia & Application Development

4 - 4

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3

Elective IVi) Software Testing Methodologiesii) Neural Networks & SoftComputingiii)Social Networks and the Semantic Webiv) Parallel Computingv) E- Commerce

4 - 4

4 Distributed Systems 4 - 45 Project 12

Total 28

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JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY KAKINADA

III Year B. Tech. Computer Science and Engineering I Sem.

COMPILER DESIGN

Unit I : Overview of language processing preprocessors compiler assembler interpreters linkers & loaders - structure of a compiler phases of a compiler.

Unit II : Lexical Analysis Role of Lexical Analysis Lexical Analysis Vs. Parsing Token,patterns and Lexemes Lexical Errors Regular Expressions Regular definitions for thelanguage constructs Strings, Sequences, Comments Transition diagram for recognition oftokens, Reserved words and identifiers, Examples.

Unit III : Syntax Analysis Role of a parser classification of parsing techniques Topdown parsing First and Follow- LL(1) Grammars, Non-Recursive predictive parsing Errorrecovery in predictive parsing.

Unit IV : Introduction to simple LR Why LR Parsers Model of an LR Parsers OperatorPrecedence- Shift Reduce Parsing Difference between LR and LL Parsers, Construction of

SLR Tables.

Unit V : More powerful LR parses, construction of CLR (1), LALR Parsing tables, DanglingELSE Ambiguity, Error recovery in LR Parsing.

Unit VI : Semantic analysis, SDT, evaluation of semantic rules, symbol tables, use of symboltables. Runtime Environment: storage organization, stack allocation, access to non-local data,heap management, parameter passing mechanisms.

Unit VII: Intermediate code , three address code, quadraples, triples, abstract syntax trees,basic blocks, CFG. Machine independent code optimization - Common sub expressionelimination, constant folding, copy propagation, dead code elimination, strength reduction, loopoptimization, procedure inlining.

Unit VIII: Machine dependent code optimization: Peephole optimization, register allocation,

instruction scheduling, inter procedural optimization, garbage collection via reference counting.

Text books:1. Compilers, Principles Techniques and Tools- Alfred V Aho, Monical S Lam, Ravi Sethi, Jeffrey

D. Ullman,2nd ed, Pearson,2007.2. Principles of compiler design, V. Raghavan, 2nd ed, TMH, 2011.3. Principles of compiler design, 2nd ed, Nandini Prasad, Elsevier

Reference books:1. http://www.nptel.iitm.ac.in/downloads/106108052/2. Compiler construction, Principles and Practice, Kenneth C Louden, CENGAGE3. Implementations of Compiler, A new approach to Compilers including the algebraic methods,

Yunlinsu, SPRINGER

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COMPUTER NETWORKS

Unit - I: Introduction:Data Communication, components, data representation, data flow;Networks: distributed processing, network criteria, physical structures, network models,categories of network, inter connection of networks; The Internet: brief history, internet today,Protocols &standard layers: protocols, standards, standard organization, internet standards,Layered Tasks: sender, receiver, carrier, hierarchy.The OSI models: layered architecture, peer to peer process, encapsulation, Layers in OSImodel: physical layer, data link layer, Network layer, transport layer, session layer ,presentation layer , application layer , TCP/IP protocol suite: physical and data link layers,network layer, transport layer, application layer, Addressing: physical address, logicaladdress, port address, specific address.

Unit-II: Physical layer and overview of PL Switching: Multiplexing: frequency divisionmultiplexing, wave length division multiplexing, synchronous time division multiplexing,statistical time division multiplexing, introduction to switching: Circuit Switched Networks,Datagram Networks, Virtual Circuit Networks.

Unit -III : Framing: fixed size framing, variable size framing, , Flow control, Error control ,Errordetections Error correction: block coding, linear block codes, cyclic codes: cyclicredundancy check, hard ware implementation, polynomials, cyclic code analysis, advantages,Checksum: idea, ones complement internet check sum, services provided to Network Layer,elementary Data link Layer protocols- Unrestricted Simplex protocol, Simplex Stop-and-WaitProtocol, Simplex protocol for Noisy Channel.

Unit-IV: Sliding Window Protocol: One bit, Go back N, Selective Repeat-Stop and waitprotocol , data link layerHDLC: configuration and transfer modes, frames, control field, pointto point protocol( PPP): framing, transition phase, multi plexing, multi link PPP.

Unit -V: Random Access : ALOHA, career sense multiple access (CSMA), career sense

multiple access with collision detection, career sense multiple access with collision avoidance , Controlled Access: Reservation, Polling, Token Passing, Channelization: frequency divisionmultiple access(FDMA),time division multiple access(TDMA), code division multipleaccess(CDMA).

Unit-VI: IEEE Standards: data link layer, physical layer, Manchester encoding, StandardEthernet: MA C Sub Layer, physical layer, Fast Ethernet: MAC Sub Layer, physical layer,IEE-802.11:Architecture, MAC sub layer, addressing mechanism , frame structure.

Unit -VII : Blue tooth : Architecture, blue tooth layers, Protocol stack, Frame structure ,cellurTelephony-frequency reuse Transmitting, receiving, roaming, Satellite Networks GEO,LEO,MEO satellite.

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Unit-VIII : Data Link Layer Switching-Bridges, Local internet working Spanning tree bridges,remote bridges, switch virtual LANs.

Text Books:1) Data communications and networking 4th edtion Behrouz A Fourzan, TMH2) Computer networks 4th editon Andrew S Tanenbaum, Pearson3) Computer networks, Mayank Dave, CENGAGE

Reference Books:1) http://nptel.iitm.ac.in/courses/Webcourse-

contents/IIT%20Kharagpur/Computer%20networks/New_index1.html2) Computer networks, A system Approach, 5th ed, Larry L Peterson and Bruce S Davie, Elsevier

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MICROPROCESSORS AND MULTICORE SYSTEMS

UNIT I: overview of microcomputer structure and operation., execution of a three instructionprogram, microprocessor evolution and types, the 8086 micro processor family , 8086 internalarchitecture , introduction to programming the 8086,8086 family assembly languageprogramming :Program development steps , constructing the machine codes for 8086instructions, writing programs for use with an assembler, assembly language programdevelopment tools.

UNIT II : Implementing standard program structures in 8086 assembly languageSimple sequence programs, jumps, flags and conditional jumps, if-then, if-then-else andmultiple if-then-else programs, while-do programs, repeat-until programs, instruction timingand delay loops.

UNIT III : Strings , procedures and macrosThe 8086 string instructions, writing and using procedures, writing and using assembler

macros.

UNIT IV: 8086 instruction descriptions and assembler directivesInstruction descriptions, assembler directives , DB, DD, DQ, DT, DW, end-program, endp,ends, equ ,even-align on even memory address, extrn , global, public / extrn, group, include,label, length- not implemented IBM MASM, name off set, ORG, proc, ptr, segment, short,type.

UNIT V: 8086: 8086 interrupts and interrupt applications8086 interrupts and interrupt responses, hardware interrupt applications, Software Interrupts,priority of interrupts, software interrupt applications, programming.

UNIT VI: 8086 ASSEMBLY LANGUAGE PROGRAMMES - Bit & Logic operations, strings,procedures, Macros, Number Format, Conversions, ASCII operations, signed Numbers

Arithmetic, Programming using High level language constructs.

UNIT VII: CPU: architecture of Intel 80286 CPU, Intel 80386, and 32-bit CPU- 80486-Microprocessor( No instruction set).UNIT VIII: Introduction to Pentium Processor architecture, dual Core and Core Duo Basiccharacteristics, Architecture and comparison with other CPUs.

Text Books:1. Microprocessors and Interfacing, Douglas V Hall, Revised 2nd ed, TMH2. The X86 Microprocessors, architecture, Programming and Interfacing(8086 to Pentium), Lyla B

Das, PEA3. The 8086 Microprocessor: Programming & Interfacing the PC, Ayala: Cengage

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Reference Books:1. http://nptel.iitm.ac.in/courses/Webcourse-contents/IIT-

KANPUR/microcontrollers/micro/ui/Course_home4_29.htm2. http://nptel.iitm.ac.in/courses/Webcourse-contents/IISc-

BANG/Microprocessors%20and%20Microcontrollers/pdf/Teacher_Slides/mod1/M1L3.pdf3. Microcomputer Systems: The 8086.8088 Family, Architecture, Programming and Design, Yu-

Cheng Liu, Glenn A Gibson, 2nd ed,4. The 8086 Microprocessor: Programming & Interfacing the PC, Kenneth J Ayala, CENGAGE5. Microprocessors, The 8086/8088, 80186/80286, 80386/80486 and the Pentium Family, Nilesh

B Bahadure, PHI6. Microprocessors and Microcontrollers, Senthil Kumar, Saravanan, Jeevanathan, OXFORD

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OPERATING SYSTEMS

UNIT I : Computer System and Operating System Overview: Overview of computeroperating systems, operating systems functions, protection and security, distributed systems,special purpose systems, operating systems structures and systems calls, operating systemsgeneration.

UNIT II : Process Management Process concept- process scheduling, operations, Interprocess communication. Multi Thread programming models. Process scheduling criteria andalgorithms, and their evaluation.

UNIT III : Concurrency : Process synchronization, the critical- section problem, PetersonsSolution, synchronization Hardware, semaphores, classic problems of synchronization,monitors, Synchronization examples

UNIT IV : Memory Management : Swapping, contiguous memory allocation, paging, structure

of the page table , segmentation

UNIT V : Virtual Memory Management:virtual memory, demand paging, page-Replacement, algorithms, Allocation of Frames,Thrashing

UNIT VI : Principles of deadlock system model, deadlock characterization, deadlockprevention, detection and avoidance, recovery form deadlock,

UNIT VII : File system Interface- the concept of a file, Access Methods, Directory structure,File system mounting, file sharing, protection.File System implementation- File system structure, file system implementation, directoryimplementation, allocation methods, free-space management

UNIT VIII : Mass-storage structure overview of Mass-storage structure, Disk structure, disk

attachment, disk scheduling, swap-space management

TEXT BOOKS :1. Operating System Concepts- Abraham Silberchatz, Peter B. Galvin, Greg Gagne 7thEdition, John Wiley.2. Operating Systems Internal and Design Principles Stallings, Sixth Edition2005, Pearsoneducation

REFERENCES :1. http://nptel.iitm.ac.in/courses/Webcourse-contents/IISc-BANG/Operating%20Systems/New_index1.html2. Operating systems- A Concept based Approach-D.M.Dhamdhere, 2nd Edition, TMH

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3. Operating System A Design Approach-Crowley, TMH.4. Modern Operating Systems, Andrew S Tanenbaum 3rd edition PHI.



COMPUTER GRAPHICS

UNIT I : Introduction:Application of Computer Graphics, raster scan systems, random scansystems, raster scan display processors.Output primitives : Points and lines, line drawing algorithms( Bresenhams and DDA Linederivations and algorithms), mid-point circle and ellipse algorithms.

UNIT II : Filled area primitives: Scan line polygon fill algorithm, boundary-fill and flood-fillalgorithms. Inside and outside tests.

UNIT III : 2-D geometrical transforms: Translation, scaling, rotation, reflection and sheartransformations, matrix representations and homogeneous coordinates, composite transforms,transformations between coordinate systems. (p.nos 204-227 of text book-1).

UNIT IV : 2-D viewing : The viewing pipeline, viewing coordinate reference frame, window toview-port coordinate transformation, viewing functions, Cohen-Sutherland and Cyrus-beck lineclipping algorithms, Sutherland Hodgeman polygon clipping algorithm.

UNIT V : 3-D object representation : Polygon surfaces, quadric surfaces, splinerepresentation, Hermite curve, Bezier curve and B-Spline curves, Bezier and B-Splinesurfaces.

UNIT VI : 3-D Geometric transformations : Translation, rotation, scaling, reflection and sheartransformations, composite transformations. 3D Viewing pipeline, clipping, projections( Paralleland Perspective).

UNIT VII : Visible surface detection methods: Classification, back-face detection, depth-buffer, scan-line, depth sorting, BSPtree methods, area sub-division and octree methods.

UNIT VIII : Computer animation : Design of animation sequence, general computeranimation functions, raster animation, computer animation languages, key frame systems,

motion specifications.

TEXT BOOKS:1. Computer Graphics Cversion, Donald Hearn, M.Pauline Baker, Pearson2. Computer Graphics with Virtual Reality Systems, Rajesh K Maurya, Wiley3. Introduction to Computer Graphics, Using Java 2D and 3D, Frank Klawonn, Springer4. Computer Graphics, Steven Harrington, TMH5. Computer Graphics, Amarendra N Sinha, Arun Udai, TMHREFERENCE BOOKS:1. Computer Graphics Principles & practice, 2/e, Foley, VanDam, Feiner, Hughes, Pearson2. Computer Graphics, Peter, Shirley, CENGAGE3. Principles of Interactive Computer Graphics, Neuman , Sproul, TMH.

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4. The Computer Graphics manual, Vol 2, David, Soloman, Springer5. Procedural elements for Computer Graphics, David F Rogers, 2/e, TMH



ADVANCED DATA STRUCTURES(Note: C++ and Java implementation is not included in the syllabus)

Unit I : Dictionaries : Sets, Dictionaries, Hash Tables, Open Hashing, Closed Hashing(Rehashing Methods), Hashing Functions( Division Method, Multiplication Method, UniversalHashing), Analysis of Closed Hashing Result (Unsuccessful Search, Insertion, SuccessfulSearch, Deletion), Hash Table Restructuring, Skip Lists, Analysis of Skip Lists. (Reference 1)

Unit II : Balanced Trees : AVL Trees: Maximum Height of an AVL Tree, Insertions andDeletions. 2-3 Trees : Insertion, Deletion.

Unit III : Priority Queues :Binary Heaps : Implementation of Insert and Delete min, Creating Heap.Binomial Queues : Binomial Queue Operations, Binomial Amortized Analysis, Lazy BinomialQueues

Unit IV : Graphs : Operations on Graphs: Vertex insertion, vertex deletion, find vertex, edgeaddition, edge deletion, Graph Traversals- Depth First Search and Breadth First Search(Nonrecursive) .Graph storage Representation- Adjacency matrix, adjacency lists.

Unit V : Graph algorithms : Minimum-Cost Spanning Trees- Prim's Algorithm, Kruskal'sAlgorithm Shortest Path Algorithms: Dijkstra's Algorithm, All Pairs Shortest Paths Problem:Floyd's Algorithm, Warshall's Algorithm,

Unit VI : Sorting Methods : Order Statistics: Lower Bound on Complexity for SortingMethods: Lower Bound on Worst Case Complexity, Lower Bound on Average CaseComplexity, Heap Sort, Quick Sort, Radix Sorting, Merge Sort.

Unit VII : Pattern matching and Tries : Pattern matching algorithms- the Boyer Moorealgorithm, the Knuth-Morris-Pratt algorithm

Tries: Definitions and concepts of digital search tree, Binary trie, Patricia , Multi-way trie

Unit VIII : File Structures: Fundamental File Processing Operations-opening files, closingfiles, Reading and Writing file contents, Special characters in files.Fundamental File Structure Concepts- Field and record organization, Managing fixed-length,fixed-field buffers.( Reference 5)

Text Books :

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1. Data Structures, A Pseudocode Approach, Richard F Gilberg, Behrouz AForouzan, Cengage.

2. Fundamentals of DATA STRUCTURES in C: 2nd ed, , Horowitz , Sahani,Anderson-freed, Universities Press

3. Data structures and Algorithm Analysis in C, 2nd edition, Mark Allen Weiss, Pearson

Reference Books:

1. Web : http://lcm.csa.iisc.ernet.in/dsa/dsa.html2. http://utubersity.com/?page_id=8783. http://freevideolectures.com/Course/2519/C-Programming-and-Data-Structures4. http://freevideolectures.com/Course/2279/Data-Structures-And-Algorithms5. File Structures :An Object oriented approach with C++, 3rd ed, Michel J Folk, Greg

Riccardi, Bill Zoellick6. C and Data Structures: A Snap Shot oriented Treatise with Live examples

from Science and Engineering, NB Venkateswarlu & EV Prasad, S Chand, 2010.

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OPERATING SYSTEM & COMPILER DESIGN LABPART A:1. Design a Lexical analyzer for the given language. The lexical analyzer should ignore

redundant spaces, tabs and newlines. It should also ignore comments. Although thesyntax specification states that identifiers can be arbitrarily long, you may restrict thelength to some reasonable value.

2. Implement the lexical analyzer using JLex, flex or lex or other lexical analyzergenerating tools.

3. Design Predictive parser for the given language4. Design LALR bottom up parser for the given language.5. Convert the BNF rules into Yacc form and write code to generate abstract syntax tree.

PART- B:1. Simulate the following CPU scheduling algorithms

a) Round Robin b) SJF c) FCFS d) Priority2. Simulate all file allocation strategies

a) Sequentialb) Indexed c) Linked3. Simulate MVT and MFT4. Simulate all File Organization Techniques

a) Single level directory b) Two level c) Hierarchical d) DAG5. Simulate Bankers Algorithm for Dead Lock Avoidance6. Simulate Bankers Algorithm for Dead Lock Prevention7. Simulate all page replacement algorithms

a) FIFO b) LRU c) LFU Etc. 8. Simulate Paging Technique of memory management.

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ADVANCED DATA STRUCTURES Lab

1. To implement functions of Dictionary using Hashing ( division method, Multiplicationmethod, Universal hashing)

2. To perform various operations i.e, insertions and deletions on AVL trees3. To perform various operations i.e., insertions and deletions on 2-3 trees.4. To implement operations on binary heap.5. To implement operations on graphs

i) vertex insertionii) Vertex deletioniii) finding vertexiv)Edge addition and deletion

6. . To implement Depth First Search for a graph nonrecursively.7. To implement Breadth First Search for a graph nonrecursively.8. To implement Prims algorithm to generate a min-cost spanning tree.

9. To implement Krushkals algorithm to generate a min-cost spanning tree.10. To implement Dijkstras algorithm to find shortest path in the graph.11. To implement pattern matching using Boyer-Moore algorithm.12. To implement Knuth-Morris-Pratt algorithm for pattern matching.

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INTELLUCTUAL PROPERTY RIGHTS AND PATENTS -1

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B.tech(Computer Science Engineering)- Syllabus of B.tech III Year - I Sem