Jan 02 18:38:53.270 VTTY: Console port: waiting connection on tcp port 2002 for protocol IPv4 (FD 17)Jan 02 18:38:53.270 VTTY: AUX port: waiting connection on tcp port 2502 for protocol IPv4 (FD 18)Jan 02 18:38:53.285 slot0: C/H/S settings = 16/4/32Jan 02 18:38:53.291 slot1: C/H/S settings = 0/4/32Jan 02 18:38:53.604 C3745_BOOT: starting instance (CPU0 PC=0xffffffffbfc00000,idle_pc=0x60bc2cf8,JIT on)Jan 02 18:38:53.605 CPU0: CPU_STATE: Starting CPU (old state=2)...Jan 02 18:38:53.693 ROM: Microcode has started.Jan 02 18:38:53.697 ROM: trying to read bootvar 'WARM_REBOOT'Jan 02 18:38:53.699 CPU0: IO_FPGA: write to unknown addr 0x30, value=0x0, pc=0xffffffff80bb88c8 (size=1)Jan 02 18:38:53.699 CPU0: IO_FPGA: read from unknown addr 0x30, pc=0xffffffff80bb88dc (size=1)Jan 02 18:38:53.798 CPU0: IO_FPGA: read from unknown addr 0x6, pc=0x60252ef0 (size=2)Jan 02 18:38:53.800 CPU0: IO_FPGA: read from unknown addr 0x10000a, pc=0x6025ac24 (size=2)Jan 02 18:38:53.800 CPU0: IO_FPGA: write to unknown addr 0x10000a, value=0x0, pc=0x6025ac34 (size=2)Jan 02 18:38:53.800 ROM: unhandled syscall 0x00000047 at pc=0x60bba074 (a1=0x80007df4,a2=0x63803338,a3=0x0000011c)Jan 02 18:38:54.145 ROM: trying to read bootvar 'RANDOM_NUM'Jan 02 18:38:54.181 CPU0: IO_FPGA: write to unknown addr 0x2e, value=0x20, pc=0x60268558 (size=2)Jan 02 18:38:54.182 CPU0: PCI: read request for device 'gt96100' at pc=0x6026b444: bus=0,device=0,function=0,reg=0x00Jan 02 18:38:54.183 CPU0: PCI: read request for device 'gt96100' at pc=0x6026b448: bus=0,device=0,function=0,reg=0x00Jan 02 18:38:54.183 CPU0: PCI: read request for device 'gt96100' at pc=0x6026b1f8: bus=0,device=0,function=0,reg=0x08Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x6026b340: bus=0,device=0,function=0,reg=0x10Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x6026b344: bus=0,device=0,function=0,reg=0x10Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x6026b340: bus=0,device=0,function=0,reg=0x90Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x6026b344: bus=0,device=0,function=0,reg=0x90Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x10000000) for device 'gt96100' at pc=0x6026b340: bus=0,device=0,function=0,reg=0x14Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x10000000) for device 'gt96100' at pc=0x6026b344: bus=0,device=0,function=0,reg=0x14Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x10000000) for device 'gt96100' at pc=0x6026b340: bus=0,device=0,function=0,reg=0x94Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x10000000) for device 'gt96100' at pc=0x6026b344: bus=0,device=0,function=0,reg=0x94Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x04000000) for device 'gt96100' at pc=0x6026b340: bus=0,device=0,function=0,reg=0x20Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x04000000) for device 'gt96100' at pc=0x6026b344: bus=0,device=0,function=0,reg=0x20Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x04000000) for device 'gt96100' at pc=0x6026b340: bus=0,device=0,function=0,reg=0xa0Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x04000000) for device 'gt96100' at pc=0x6026b344: bus=0,device=0,function=0,reg=0xa0Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x00000146) for device 'gt96100' at pc=0x6026b340: bus=0,device=0,function=0,reg=0x04Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x00000146) for device 'gt96100' at pc=0x6026b344: bus=0,device=0,function=0,reg=0x04Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x00000146) for device 'gt96100' at pc=0x6026b340: bus=0,device=0,function=0,reg=0x84Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x00000146) for device 'gt96100' at pc=0x6026b344: bus=0,device=0,function=0,reg=0x84Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x00000007) for device 'gt96100' at pc=0x6026b340: bus=0,device=0,function=0,reg=0x0cJan 02 18:38:54.183 CPU0: PCI: write request (data=0x00000007) for device 'gt96100' at pc=0x6026b344: bus=0,device=0,function=0,reg=0x0cJan 02 18:38:54.183 CPU0: PCI: write request (data=0x00000007) for device 'gt96100' at pc=0x6026b340: bus=0,device=0,function=0,reg=0x8cJan 02 18:38:54.183 CPU0: PCI: write request (data=0x00000007) for device 'gt96100' at pc=0x6026b344: bus=0,device=0,function=0,reg=0x8cJan 02 18:38:54.183 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x6026b340: bus=0,device=0,function=0,reg=0x10Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x6026b344: bus=0,device=0,function=0,reg=0x10Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x6026b340: bus=0,device=0,function=0,reg=0x90Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x00000000) for device 'gt96100' at pc=0x6026b344: bus=0,device=0,function=0,reg=0x90Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x20000000) for device 'gt96100' at pc=0x6026b340: bus=0,device=0,function=0,reg=0x14Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x20000000) for device 'gt96100' at pc=0x6026b344: bus=0,device=0,function=0,reg=0x14Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x20000000) for device 'gt96100' at pc=0x6026b340: bus=0,device=0,function=0,reg=0x94Jan 02 18:38:54.183 CPU0: PCI: write request (data=0x20000000) for device 'gt96100' at pc=0x6026b344: bus=0,device=0,function=0,reg=0x94Jan 02 18:38:54.183 CPU0: PCI: write request (data=0xc0000000) for unknown device at pc=0x6026b340 (bus=0,device=0,function=1,reg=0x10).Jan 02 18:38:54.183 CPU0: PCI: write request (data=0xc0000000) for unknown device at pc=0x6026b344 (bus=0,device=0,function=1,reg=0x10).Jan 02 18:38:54.183 CPU0: PCI: write request (data=0xc0000000) for unknown device at pc=0x6026b340 (bus=0,device=0,function=1,reg=0x90).Jan 02 18:38:54.183 CPU0: PCI: write request (data=0xc0000000) for unknown device at pc=0x6026b344 (bus=0,device=0,function=1,reg=0x90).Jan 02 18:38:54.183 CPU0: PCI: write request (data=0xe0000000) for unknown device at pc=0x6026b340 (bus=0,device=0,function=1,reg=0x14).Jan 02 18:38:54.183 CPU0: PCI: write request (data=0xe0000000) for unknown device at pc=0x6026b344 (bus=0,device=0,function=1,reg=0x14).Jan 02 18:38:54.183 CPU0: PCI: write request (data=0xe0000000) for unknown device at pc=0x6026b340 (bus=0,device=0,function=1,reg=0x94).Jan 02 18:38:54.184 CPU0: PCI: write request (data=0xe0000000) for unknown device at pc=0x6026b344 (bus=0,device=0,function=1,reg=0x94).Jan 02 18:38:54.184 CPU0: IO_FPGA: write to unknown addr 0x4c, value=0xf000, pc=0x60268b9c (size=2)Jan 02 18:38:54.184 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b454: bus=0,device=1,function=0,reg=0x00Jan 02 18:38:54.184 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b458: bus=0,device=1,function=0,reg=0x00Jan 02 18:38:54.184 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b454: bus=0,device=1,function=0,reg=0x40Jan 02 18:38:54.184 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b458: bus=0,device=1,function=0,reg=0x40Jan 02 18:38:54.184 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x04Jan 02 18:38:54.184 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x04Jan 02 18:38:54.184 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x0cJan 02 18:38:54.184 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x0cJan 02 18:38:54.184 CPU0: PCI: write request (data=0x00040100) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x18Jan 02 18:38:54.185 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00040100) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x18Jan 02 18:38:54.185 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x02801f00) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x1cJan 02 18:38:54.185 CPU0: PCI: write request (data=0x02801f00) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x1cJan 02 18:38:54.185 CPU0: PCI: write request (data=0x4d704d00) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x20Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x4d704d00) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x20Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00014d01) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x24Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00014d01) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x24Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x30Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x30Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x3cJan 02 18:38:54.185 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x3cJan 02 18:38:54.185 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x40Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x40Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x64Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x64Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x68Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x68Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x04Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x04Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0xf0Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0xf0Jan 02 18:38:54.185 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b454: bus=0,device=2,function=0,reg=0x00Jan 02 18:38:54.185 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b458: bus=0,device=2,function=0,reg=0x00Jan 02 18:38:54.185 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b454: bus=0,device=2,function=0,reg=0x40Jan 02 18:38:54.185 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b458: bus=0,device=2,function=0,reg=0x40Jan 02 18:38:54.185 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x04Jan 02 18:38:54.185 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x04Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x0cJan 02 18:38:54.185 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x0cJan 02 18:38:54.185 CPU0: PCI: write request (data=0x00080500) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x18Jan 02 18:38:54.185 PCI: PCI bridge 0,2,0 -> pri: 00, sec: 05, sub: 08Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00080500) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x18Jan 02 18:38:54.185 PCI: PCI bridge 0,2,0 -> pri: 00, sec: 05, sub: 08Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x02803f20) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x1cJan 02 18:38:54.185 CPU0: PCI: write request (data=0x02803f20) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x1cJan 02 18:38:54.185 CPU0: PCI: write request (data=0x4df04d80) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x20Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x4df04d80) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x20Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00014d81) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x24Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00014d81) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x24Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x30Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x30Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x3cJan 02 18:38:54.185 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x3cJan 02 18:38:54.185 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x40Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x40Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x64Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x64Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x68Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x68Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x04Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x04Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0xf0Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0xf0Jan 02 18:38:54.185 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b454: bus=0,device=3,function=0,reg=0x00Jan 02 18:38:54.185 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b458: bus=0,device=3,function=0,reg=0x00Jan 02 18:38:54.185 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b454: bus=0,device=3,function=0,reg=0x40Jan 02 18:38:54.185 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b458: bus=0,device=3,function=0,reg=0x40Jan 02 18:38:54.185 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=3,function=0,reg=0x04Jan 02 18:38:54.185 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=3,function=0,reg=0x04Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x6026b320: bus=0,device=3,function=0,reg=0x0cJan 02 18:38:54.185 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=3,function=0,reg=0x0cJan 02 18:38:54.185 CPU0: PCI: write request (data=0x000c0900) for device 'ti2050b' at pc=0x6026b320: bus=0,device=3,function=0,reg=0x18Jan 02 18:38:54.185 PCI: PCI bridge 0,3,0 -> pri: 00, sec: 09, sub: 12Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x000c0900) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=3,function=0,reg=0x18Jan 02 18:38:54.185 PCI: PCI bridge 0,3,0 -> pri: 00, sec: 09, sub: 12Jan 02 18:38:54.185 CPU0: PCI: write request (data=0x02809f80) for device 'ti2050b' at pc=0x6026b320: bus=0,device=3,function=0,reg=0x1cJan 02 18:38:54.185 CPU0: PCI: write request (data=0x02809f80) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=3,function=0,reg=0x1cJan 02 18:38:54.186 CPU0: PCI: write request (data=0x4e704e00) for device 'ti2050b' at pc=0x6026b320: bus=0,device=3,function=0,reg=0x20Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x4e704e00) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=3,function=0,reg=0x20Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00014e01) for device 'ti2050b' at pc=0x6026b320: bus=0,device=3,function=0,reg=0x24Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00014e01) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=3,function=0,reg=0x24Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x6026b320: bus=0,device=3,function=0,reg=0x30Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=3,function=0,reg=0x30Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=3,function=0,reg=0x3cJan 02 18:38:54.186 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=3,function=0,reg=0x3cJan 02 18:38:54.186 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=3,function=0,reg=0x40Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=3,function=0,reg=0x40Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=3,function=0,reg=0x64Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=3,function=0,reg=0x64Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=3,function=0,reg=0x68Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=3,function=0,reg=0x68Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x6026b320: bus=0,device=3,function=0,reg=0x04Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=3,function=0,reg=0x04Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x6026b320: bus=0,device=3,function=0,reg=0xf0Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=3,function=0,reg=0xf0Jan 02 18:38:54.186 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b454: bus=0,device=4,function=0,reg=0x00Jan 02 18:38:54.186 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b458: bus=0,device=4,function=0,reg=0x00Jan 02 18:38:54.186 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b454: bus=0,device=4,function=0,reg=0x40Jan 02 18:38:54.186 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b458: bus=0,device=4,function=0,reg=0x40Jan 02 18:38:54.186 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=4,function=0,reg=0x04Jan 02 18:38:54.186 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=4,function=0,reg=0x04Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x6026b320: bus=0,device=4,function=0,reg=0x0cJan 02 18:38:54.186 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=4,function=0,reg=0x0cJan 02 18:38:54.186 CPU0: PCI: write request (data=0x00100d00) for device 'ti2050b' at pc=0x6026b320: bus=0,device=4,function=0,reg=0x18Jan 02 18:38:54.186 PCI: PCI bridge 0,4,0 -> pri: 00, sec: 13, sub: 16Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00100d00) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=4,function=0,reg=0x18Jan 02 18:38:54.186 PCI: PCI bridge 0,4,0 -> pri: 00, sec: 13, sub: 16Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x0280bfa0) for device 'ti2050b' at pc=0x6026b320: bus=0,device=4,function=0,reg=0x1cJan 02 18:38:54.186 CPU0: PCI: write request (data=0x0280bfa0) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=4,function=0,reg=0x1cJan 02 18:38:54.186 CPU0: PCI: write request (data=0x4ef04e80) for device 'ti2050b' at pc=0x6026b320: bus=0,device=4,function=0,reg=0x20Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x4ef04e80) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=4,function=0,reg=0x20Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00014e81) for device 'ti2050b' at pc=0x6026b320: bus=0,device=4,function=0,reg=0x24Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00014e81) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=4,function=0,reg=0x24Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x6026b320: bus=0,device=4,function=0,reg=0x30Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=4,function=0,reg=0x30Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=4,function=0,reg=0x3cJan 02 18:38:54.186 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=4,function=0,reg=0x3cJan 02 18:38:54.186 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=4,function=0,reg=0x40Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=4,function=0,reg=0x40Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=4,function=0,reg=0x64Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=4,function=0,reg=0x64Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=4,function=0,reg=0x68Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=4,function=0,reg=0x68Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x6026b320: bus=0,device=4,function=0,reg=0x04Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=4,function=0,reg=0x04Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x6026b320: bus=0,device=4,function=0,reg=0xf0Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=4,function=0,reg=0xf0Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x24000000) for device 'gt96100' at pc=0x6026b340: bus=0,device=0,function=0,reg=0x20Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x24000000) for device 'gt96100' at pc=0x6026b344: bus=0,device=0,function=0,reg=0x20Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x24000000) for device 'gt96100' at pc=0x6026b340: bus=0,device=0,function=0,reg=0xa0Jan 02 18:38:54.186 CPU0: PCI: write request (data=0x24000000) for device 'gt96100' at pc=0x6026b344: bus=0,device=0,function=0,reg=0xa0Jan 02 18:38:54.186 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x6025af3c (size=2)Jan 02 18:38:56.701 ROM: unhandled syscall 0x0000003e at pc=0x60bba074 (a1=0x80007de4,a2=0x63803314,a3=0x000000f8)Jan 02 18:38:56.701 ROM: unhandled syscall 0x00000047 at pc=0x60bba074 (a1=0x80007dec,a2=0x63803338,a3=0x0000011c)Jan 02 18:38:57.450 CPU0: JIT: partial JIT flush (count=174)Jan 02 18:38:57.489 CPU0: JIT: flushing data structures (compiled pages=222)Jan 02 18:38:57.567 CPU0: JIT: partial JIT flush (count=175)Jan 02 18:38:57.577 ROM: trying to read bootvar 'BOOT'Jan 02 18:38:57.577 ROM: trying to read bootvar 'CONFIG_FILE'Jan 02 18:38:57.577 ROM: trying to read bootvar 'BOOTLDR'Jan 02 18:38:57.577 ROM: trying to read bootvar 'RSHELF'Jan 02 18:38:57.577 ROM: trying to read bootvar 'DSHELF'Jan 02 18:38:57.577 ROM: trying to read bootvar 'DSHELFINFO'Jan 02 18:38:57.577 ROM: trying to read bootvar 'RESET_COUNTER'Jan 02 18:38:57.577 ROM: trying to read bootvar 'CHRG_LOCRECSN'Jan 02 18:38:57.578 ROM: trying to read bootvar 'CHRG_ID'Jan 02 18:38:57.578 ROM: trying to read bootvar 'SLOTCACHE'Jan 02 18:38:57.578 ROM: trying to read bootvar 'OVERTEMP'Jan 02 18:38:57.578 ROM: trying to read bootvar 'DIAG'Jan 02 18:38:57.578 ROM: trying to read bootvar 'DIAMETER_ORIGIN_ID'Jan 02 18:38:57.578 ROM: trying to read bootvar 'WARM_REBOOT'Jan 02 18:38:57.617 CPU0: JIT: flushing data structures (compiled pages=227)Jan 02 18:38:57.695 CPU0: JIT: partial JIT flush (count=182)Jan 02 18:38:57.803 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x608fa658 (size=2)Jan 02 18:38:57.803 CPU0: MTS: read access to undefined address 0x3c080022 at pc=0x608fa248 (size=1)Jan 02 18:38:57.803 CPU0: MTS: read access to undefined address 0x3c08002b at pc=0x608fa28c (size=1)Jan 02 18:38:57.803 CPU0: MTS: write access to undefined address 0x3c08002b at pc=0x608fa298, value=0x00000020 (size=1)Jan 02 18:38:57.803 CPU0: MTS: read access to undefined address 0x3c08002b at pc=0x608fa29c (size=1)Jan 02 18:38:57.803 CPU0: MTS: write access to undefined address 0x3c08002b at pc=0x608fa2a4, value=0x00000000 (size=1)Jan 02 18:38:57.803 CPU0: MTS: read access to undefined address 0x3c08002b at pc=0x608fa2b0 (size=1)Jan 02 18:38:57.803 CPU0: MTS: write access to undefined address 0x3c08002b at pc=0x608fa2bc, value=0x00000040 (size=1)Jan 02 18:38:57.803 CPU0: MTS: read access to undefined address 0x3c080023 at pc=0x608fa2d0 (size=1)Jan 02 18:38:57.803 CPU0: MTS: write access to undefined address 0x3c080023 at pc=0x608fa2dc, value=0x00000000 (size=1)Jan 02 18:38:57.803 CPU0: MTS: read access to undefined address 0x3c080023 at pc=0x608fa2e8 (size=1)Jan 02 18:38:57.803 CPU0: MTS: write access to undefined address 0x3c080023 at pc=0x608fa2f8, value=0x00000080 (size=1)Jan 02 18:38:57.803 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x608fc110 (size=1)Jan 02 18:38:57.803 CPU0: MTS: write access to undefined address 0x3c000002 at pc=0x608fc11c, value=0x00000080 (size=1)Jan 02 18:38:57.803 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x608fc120 (size=1)Jan 02 18:38:57.896 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x608fc14c (size=1)Jan 02 18:38:57.983 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x608fc14c (size=1)Jan 02 18:38:58.067 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x608fc14c (size=1)Jan 02 18:38:58.159 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x608fc14c (size=1)Jan 02 18:38:58.251 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x608fc14c (size=1)Jan 02 18:38:58.355 CPU0: MTS: read access to undefined address 0x3c000002 at pc=0x608fc14c (size=1)Jan 02 18:38:58.356 CPU0: MTS: write access to undefined address 0x3c080007 at pc=0x608fa3e4, value=0x00000002 (size=1)Jan 02 18:38:58.356 CPU0: MTS: write access to undefined address 0x3c080008 at pc=0x608fa3ec, value=0x00000002 (size=1)Jan 02 18:38:58.356 CPU0: MTS: write access to undefined address 0x3c080009 at pc=0x608fa3f4, value=0x00000002 (size=1)Jan 02 18:38:58.356 CPU0: MTS: write access to undefined address 0x3c08000a at pc=0x608fa3f8, value=0x00000002 (size=1)Jan 02 18:38:58.356 CPU0: MTS: write access to undefined address 0x3c08000b at pc=0x608fa3fc, value=0x00000002 (size=1)Jan 02 18:38:58.356 CPU0: MTS: write access to undefined address 0x3c08000c at pc=0x608fa400, value=0x00000002 (size=1)Jan 02 18:38:58.356 CPU0: MTS: read access to undefined address 0x3c080022 at pc=0x608fb314 (size=1)Jan 02 18:38:58.373 CPU0: JIT: flushing data structures (compiled pages=231)Jan 02 18:38:58.439 CPU0: JIT: partial JIT flush (count=193)Jan 02 18:38:58.482 CPU0: JIT: flushing data structures (compiled pages=231)Jan 02 18:38:58.551 CPU0: IO_FPGA: read from unknown addr 0x10000a, pc=0x60268600 (size=2)Jan 02 18:38:58.551 CPU0: IO_FPGA: write to unknown addr 0x10000a, value=0x1000, pc=0x60268608 (size=2)Jan 02 18:38:58.551 CPU0: IO_FPGA: read from unknown addr 0x10000a, pc=0x60268600 (size=2)Jan 02 18:38:58.551 CPU0: IO_FPGA: write to unknown addr 0x10000a, value=0x2000, pc=0x60268608 (size=2)Jan 02 18:38:58.736 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b454: bus=0,device=1,function=0,reg=0x3cJan 02 18:38:58.736 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b458: bus=0,device=1,function=0,reg=0x3cJan 02 18:38:58.736 CPU0: PCI: write request (data=0x00400000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x3cJan 02 18:38:58.736 CPU0: PCI: write request (data=0x00400000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x3cJan 02 18:38:58.737 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b454: bus=0,device=1,function=0,reg=0x3cJan 02 18:38:58.737 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b458: bus=0,device=1,function=0,reg=0x3cJan 02 18:38:58.737 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x3cJan 02 18:38:58.737 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x3cJan 02 18:38:58.813 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b454: bus=0,device=2,function=0,reg=0x3cJan 02 18:38:58.813 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b458: bus=0,device=2,function=0,reg=0x3cJan 02 18:38:58.813 CPU0: PCI: write request (data=0x00400000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x3cJan 02 18:38:58.813 CPU0: PCI: write request (data=0x00400000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x3cJan 02 18:38:58.813 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b454: bus=0,device=2,function=0,reg=0x3cJan 02 18:38:58.813 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b458: bus=0,device=2,function=0,reg=0x3cJan 02 18:38:58.813 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x3cJan 02 18:38:58.813 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x3cJan 02 18:38:58.901 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b454: bus=0,device=1,function=0,reg=0x00Jan 02 18:38:58.901 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b458: bus=0,device=1,function=0,reg=0x00Jan 02 18:38:58.901 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b454: bus=0,device=1,function=0,reg=0x40Jan 02 18:38:58.901 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b458: bus=0,device=1,function=0,reg=0x40Jan 02 18:38:58.901 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x04Jan 02 18:38:58.901 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x04Jan 02 18:38:58.901 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x0cJan 02 18:38:58.901 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x0cJan 02 18:38:58.901 CPU0: PCI: write request (data=0x00040100) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x18Jan 02 18:38:58.901 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04Jan 02 18:38:58.901 CPU0: PCI: write request (data=0x00040100) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x18Jan 02 18:38:58.901 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04Jan 02 18:38:58.901 CPU0: PCI: write request (data=0x02801f00) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x1cJan 02 18:38:58.901 CPU0: PCI: write request (data=0x02801f00) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x1cJan 02 18:38:58.901 CPU0: PCI: write request (data=0x4d704d00) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x20Jan 02 18:38:58.901 CPU0: PCI: write request (data=0x4d704d00) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x20Jan 02 18:38:58.901 CPU0: PCI: write request (data=0x00014d01) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x24Jan 02 18:38:58.901 CPU0: PCI: write request (data=0x00014d01) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x24Jan 02 18:38:58.901 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x30Jan 02 18:38:58.901 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x30Jan 02 18:38:58.901 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x3cJan 02 18:38:58.901 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x3cJan 02 18:38:58.901 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x40Jan 02 18:38:58.901 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x40Jan 02 18:38:58.901 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x64Jan 02 18:38:58.901 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x64Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x68Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x68Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0x04Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0x04Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x6026b320: bus=0,device=1,function=0,reg=0xf0Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=1,function=0,reg=0xf0Jan 02 18:38:58.902 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b454: bus=0,device=2,function=0,reg=0x00Jan 02 18:38:58.902 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b458: bus=0,device=2,function=0,reg=0x00Jan 02 18:38:58.902 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b454: bus=0,device=2,function=0,reg=0x40Jan 02 18:38:58.902 CPU0: PCI: read request for device 'ti2050b' at pc=0x6026b458: bus=0,device=2,function=0,reg=0x40Jan 02 18:38:58.902 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x04Jan 02 18:38:58.902 CPU0: PCI: write request (data=0xffff0000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x04Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x0cJan 02 18:38:58.902 CPU0: PCI: write request (data=0x0000f810) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x0cJan 02 18:38:58.902 CPU0: PCI: write request (data=0x00080500) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x18Jan 02 18:38:58.902 PCI: PCI bridge 0,2,0 -> pri: 00, sec: 05, sub: 08Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x00080500) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x18Jan 02 18:38:58.902 PCI: PCI bridge 0,2,0 -> pri: 00, sec: 05, sub: 08Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x02803f20) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x1cJan 02 18:38:58.902 CPU0: PCI: write request (data=0x02803f20) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x1cJan 02 18:38:58.902 CPU0: PCI: write request (data=0x4df04d80) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x20Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x4df04d80) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x20Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x00014d81) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x24Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x00014d81) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x24Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x30Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x00200020) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x30Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x3cJan 02 18:38:58.902 CPU0: PCI: write request (data=0x03000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x3cJan 02 18:38:58.902 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x40Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x40Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x64Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x64Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x68Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x00000000) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x68Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0x04Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x00000007) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0x04Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x6026b320: bus=0,device=2,function=0,reg=0xf0Jan 02 18:38:58.902 CPU0: PCI: write request (data=0x00000001) for device 'ti2050b' at pc=0x6026b32c: bus=0,device=2,function=0,reg=0xf0Jan 02 18:38:59.080 CPU0: JIT: partial JIT flush (count=167)Jan 02 18:38:59.191 CPU0: PCI: read request for device 'NM-4T(1)' at pc=0x6026b454: bus=1,device=0,function=0,reg=0x00Jan 02 18:38:59.191 CPU0: PCI: read request for device 'NM-4T(1)' at pc=0x6026b458: bus=1,device=0,function=0,reg=0x00Jan 02 18:38:59.191 CPU0: PCI: read request for device 'NM-4T(1)' at pc=0x6026b454: bus=1,device=0,function=0,reg=0x00Jan 02 18:38:59.191 CPU0: PCI: read request for device 'NM-4T(1)' at pc=0x6026b458: bus=1,device=0,function=0,reg=0x00Jan 02 18:38:59.191 CPU0: PCI: write request (data=0x4d000000) for device 'NM-4T(1)' at pc=0x6026b320: bus=1,device=0,function=0,reg=0x10Jan 02 18:38:59.191 NM-4T(1): registers are mapped at 0x4d000000Jan 02 18:38:59.191 CPU0: PCI: write request (data=0x4d000000) for device 'NM-4T(1)' at pc=0x6026b32c: bus=1,device=0,function=0,reg=0x10Jan 02 18:38:59.191 NM-4T(1): registers are mapped at 0x4d000000Jan 02 18:38:59.191 CPU0: PCI: write request (data=0x4d002000) for device 'NM-4T(1)' at pc=0x6026b320: bus=1,device=0,function=0,reg=0x14Jan 02 18:38:59.191 CPU0: PCI: write request (data=0x4d002000) for device 'NM-4T(1)' at pc=0x6026b32c: bus=1,device=0,function=0,reg=0x14Jan 02 18:38:59.191 CPU0: PCI: write request (data=0x00000008) for device 'NM-4T(1)' at pc=0x6026b320: bus=1,device=0,function=0,reg=0x40Jan 02 18:38:59.191 CPU0: PCI: write request (data=0x00000008) for device 'NM-4T(1)' at pc=0x6026b32c: bus=1,device=0,function=0,reg=0x40Jan 02 18:38:59.191 CPU0: PCI: write request (data=0x0000f800) for device 'NM-4T(1)' at pc=0x6026b320: bus=1,device=0,function=0,reg=0x0cJan 02 18:38:59.191 CPU0: PCI: write request (data=0x0000f800) for device 'NM-4T(1)' at pc=0x6026b32c: bus=1,device=0,function=0,reg=0x0cJan 02 18:38:59.191 CPU0: PCI: write request (data=0x00000006) for device 'NM-4T(1)' at pc=0x6026b320: bus=1,device=0,function=0,reg=0x04Jan 02 18:38:59.191 CPU0: PCI: write request (data=0x00000006) for device 'NM-4T(1)' at pc=0x6026b32c: bus=1,device=0,function=0,reg=0x04Jan 02 18:38:59.191 CPU0: PCI: read request for device 'NM-4T(1)' at pc=0x6026b454: bus=1,device=0,function=0,reg=0x08Jan 02 18:38:59.191 CPU0: PCI: read request for device 'NM-4T(1)' at pc=0x6026b458: bus=1,device=0,function=0,reg=0x08Jan 02 18:38:59.191 NM-4T(1): channel 0: unknown value for CRC ctrl reg 0x0600Jan 02 18:38:59.191 NM-4T(1): channel 0: CRC size set to 0x0002Jan 02 18:38:59.191 CPU0: PCI: write request (data=0x0000f800) for device 'NM-4T(1)' at pc=0x6026b320: bus=1,device=0,function=0,reg=0x0cJan 02 18:38:59.191 CPU0: PCI: write request (data=0x0000f800) for device 'NM-4T(1)' at pc=0x6026b32c: bus=1,device=0,function=0,reg=0x0cJan 02 18:38:59.191 NM-4T(1): channel 0: unknown value for CRC ctrl reg 0x0000Jan 02 18:38:59.192 NM-4T(1): channel 0: CRC size set to 0x0002Jan 02 18:38:59.196 NM-4T(1): channel 0 disabledJan 02 18:38:59.197 NM-4T(1): channel 0: CRC size set to 0x0002Jan 02 18:38:59.197 NM-4T(1): channel 0: clock rate set to 2016000Jan 02 18:38:59.197 NM-4T(1): channel 0 enabledJan 02 18:38:59.197 NM-4T(1): unknown command 0x3000cJan 02 18:38:59.197 NM-4T(1): channel 0 enabledJan 02 18:38:59.199 NM-4T(1): channel 1 disabledJan 02 18:38:59.199 NM-4T(1): channel 1: CRC size set to 0x0002Jan 02 18:38:59.199 NM-4T(1): channel 1: clock rate set to 2016000Jan 02 18:38:59.199 NM-4T(1): channel 1 enabledJan 02 18:38:59.199 NM-4T(1): unknown command 0x3000cJan 02 18:38:59.200 NM-4T(1): channel 1 enabledJan 02 18:38:59.201 NM-4T(1): channel 2 disabledJan 02 18:38:59.202 NM-4T(1): channel 2: CRC size set to 0x0002Jan 02 18:38:59.202 NM-4T(1): channel 2: clock rate set to 2016000Jan 02 18:38:59.202 NM-4T(1): channel 2 enabledJan 02 18:38:59.202 NM-4T(1): unknown command 0x3000cJan 02 18:38:59.202 NM-4T(1): channel 2 enabledJan 02 18:38:59.204 NM-4T(1): channel 3 disabledJan 02 18:38:59.204 NM-4T(1): channel 3: CRC size set to 0x0002Jan 02 18:38:59.204 NM-4T(1): channel 3: clock rate set to 2016000Jan 02 18:38:59.204 NM-4T(1): channel 3 enabledJan 02 18:38:59.204 NM-4T(1): unknown command 0x3000cJan 02 18:38:59.205 NM-4T(1): channel 3 enabledJan 02 18:38:59.205 CPU0: PCI: read request for device 'NM-4T(2)' at pc=0x6026b454: bus=5,device=0,function=0,reg=0x00Jan 02 18:38:59.205 CPU0: PCI: read request for device 'NM-4T(2)' at pc=0x6026b458: bus=5,device=0,function=0,reg=0x00Jan 02 18:38:59.205 CPU0: PCI: read request for device 'NM-4T(2)' at pc=0x6026b454: bus=5,device=0,function=0,reg=0x00Jan 02 18:38:59.205 CPU0: PCI: read request for device 'NM-4T(2)' at pc=0x6026b458: bus=5,device=0,function=0,reg=0x00Jan 02 18:38:59.205 CPU0: PCI: write request (data=0x4d800000) for device 'NM-4T(2)' at pc=0x6026b320: bus=5,device=0,function=0,reg=0x10Jan 02 18:38:59.205 NM-4T(2): registers are mapped at 0x4d800000Jan 02 18:38:59.205 CPU0: PCI: write request (data=0x4d800000) for device 'NM-4T(2)' at pc=0x6026b32c: bus=5,device=0,function=0,reg=0x10Jan 02 18:38:59.205 NM-4T(2): registers are mapped at 0x4d800000Jan 02 18:38:59.205 CPU0: PCI: write request (data=0x4d802000) for device 'NM-4T(2)' at pc=0x6026b320: bus=5,device=0,function=0,reg=0x14Jan 02 18:38:59.205 CPU0: PCI: write request (data=0x4d802000) for device 'NM-4T(2)' at pc=0x6026b32c: bus=5,device=0,function=0,reg=0x14Jan 02 18:38:59.205 CPU0: PCI: write request (data=0x00000008) for device 'NM-4T(2)' at pc=0x6026b320: bus=5,device=0,function=0,reg=0x40Jan 02 18:38:59.205 CPU0: PCI: write request (data=0x00000008) for device 'NM-4T(2)' at pc=0x6026b32c: bus=5,device=0,function=0,reg=0x40Jan 02 18:38:59.205 CPU0: PCI: write request (data=0x0000f800) for device 'NM-4T(2)' at pc=0x6026b320: bus=5,device=0,function=0,reg=0x0cJan 02 18:38:59.205 CPU0: PCI: write request (data=0x0000f800) for device 'NM-4T(2)' at pc=0x6026b32c: bus=5,device=0,function=0,reg=0x0cJan 02 18:38:59.205 CPU0: PCI: write request (data=0x00000006) for device 'NM-4T(2)' at pc=0x6026b320: bus=5,device=0,function=0,reg=0x04Jan 02 18:38:59.205 CPU0: PCI: write request (data=0x00000006) for device 'NM-4T(2)' at pc=0x6026b32c: bus=5,device=0,function=0,reg=0x04Jan 02 18:38:59.205 CPU0: PCI: read request for device 'NM-4T(2)' at pc=0x6026b454: bus=5,device=0,function=0,reg=0x08Jan 02 18:38:59.205 CPU0: PCI: read request for device 'NM-4T(2)' at pc=0x6026b458: bus=5,device=0,function=0,reg=0x08Jan 02 18:38:59.205 NM-4T(2): channel 0: unknown value for CRC ctrl reg 0x0600Jan 02 18:38:59.205 NM-4T(2): channel 0: CRC size set to 0x0002Jan 02 18:38:59.205 CPU0: PCI: write request (data=0x0000f800) for device 'NM-4T(2)' at pc=0x6026b320: bus=5,device=0,function=0,reg=0x0cJan 02 18:38:59.205 CPU0: PCI: write request (data=0x0000f800) for device 'NM-4T(2)' at pc=0x6026b32c: bus=5,device=0,function=0,reg=0x0cJan 02 18:38:59.205 NM-4T(2): channel 0: unknown value for CRC ctrl reg 0x0000Jan 02 18:38:59.205 NM-4T(2): channel 0: CRC size set to 0x0002Jan 02 18:38:59.207 NM-4T(2): channel 0 disabledJan 02 18:38:59.207 NM-4T(2): channel 0: CRC size set to 0x0002Jan 02 18:38:59.207 NM-4T(2): channel 0: clock rate set to 2016000Jan 02 18:38:59.207 NM-4T(2): channel 0 enabledJan 02 18:38:59.208 NM-4T(2): unknown command 0x3000cJan 02 18:38:59.208 NM-4T(2): channel 0 enabledJan 02 18:38:59.209 NM-4T(2): channel 1 disabledJan 02 18:38:59.210 NM-4T(2): channel 1: CRC size set to 0x0002Jan 02 18:38:59.210 NM-4T(2): channel 1: clock rate set to 2016000Jan 02 18:38:59.210 NM-4T(2): channel 1 enabledJan 02 18:38:59.210 NM-4T(2): unknown command 0x3000cJan 02 18:38:59.210 NM-4T(2): channel 1 enabledJan 02 18:38:59.211 NM-4T(2): channel 2 disabledJan 02 18:38:59.211 NM-4T(2): channel 2: CRC size set to 0x0002Jan 02 18:38:59.211 NM-4T(2): channel 2: clock rate set to 2016000Jan 02 18:38:59.211 NM-4T(2): channel 2 enabledJan 02 18:38:59.211 NM-4T(2): unknown command 0x3000cJan 02 18:38:59.211 NM-4T(2): channel 2 enabledJan 02 18:38:59.213 NM-4T(2): channel 3 disabledJan 02 18:38:59.213 NM-4T(2): channel 3: CRC size set to 0x0002Jan 02 18:38:59.213 NM-4T(2): channel 3: clock rate set to 2016000Jan 02 18:38:59.214 NM-4T(2): channel 3 enabledJan 02 18:38:59.214 NM-4T(2): unknown command 0x3000cJan 02 18:38:59.214 NM-4T(2): channel 3 enabledJan 02 18:38:59.241 CPU0: JIT: flushing data structures (compiled pages=223)Jan 02 18:38:59.255 CPU0: IO_FPGA: read from unknown addr 0x4c, pc=0x6025c0f8 (size=2)Jan 02 18:38:59.255 CPU0: IO_FPGA: write to unknown addr 0x4c, value=0x0, pc=0x6025c100 (size=2)Jan 02 18:38:59.255 CPU0: IO_FPGA: read from unknown addr 0x2e, pc=0x6025c120 (size=2)Jan 02 18:38:59.255 CPU0: IO_FPGA: write to unknown addr 0x2e, value=0x40, pc=0x6025c128 (size=2)Jan 02 18:38:59.295 CPU0: JIT: partial JIT flush (count=194)Jan 02 18:38:59.353 CPU0: JIT: flushing data structures (compiled pages=232)Jan 02 18:38:59.408 CPU0: JIT: partial JIT flush (count=191)Jan 02 18:38:59.459 CPU0: JIT: flushing data structures (compiled pages=231)Jan 02 18:38:59.527 CPU0: JIT: partial JIT flush (count=185)Jan 02 18:38:59.607 CPU0: JIT: flushing data structures (compiled pages=345)Jan 02 18:38:59.931 CPU0: JIT: partial JIT flush (count=162)Jan 02 18:38:59.969 CPU0: JIT: flushing data structures (compiled pages=347)Jan 02 18:39:00.033 CPU0: JIT: partial JIT flush (count=188)Jan 02 18:39:00.085 CPU0: JIT: flushing data structures (compiled pages=354)Jan 02 18:39:00.139 CPU0: JIT: partial JIT flush (count=187)Jan 02 18:39:00.222 CPU0: JIT: flushing data structures (compiled pages=354)Jan 02 18:39:00.291 CPU0: JIT: partial JIT flush (count=191)Jan 02 18:39:00.401 CPU0: JIT: flushing data structures (compiled pages=359)Jan 02 18:39:00.482 CPU0: JIT: partial JIT flush (count=163)Jan 02 18:39:00.520 CPU0: JIT: flushing data structures (compiled pages=352)Jan 02 18:39:00.584 CPU0: JIT: partial JIT flush (count=191)Jan 02 18:39:00.637 CPU0: JIT: flushing data structures (compiled pages=356)Jan 02 18:39:00.700 CPU0: JIT: partial JIT flush (count=191)Jan 02 18:39:00.751 CPU0: JIT: flushing data structures (compiled pages=359)Jan 02 18:39:00.807 CPU0: JIT: partial JIT flush (count=196)Jan 02 18:39:00.890 CPU0: JIT: flushing data structures (compiled pages=358)Jan 02 18:39:01.108 CPU0: JIT: partial JIT flush (count=108)Jan 02 18:39:01.136 CPU0: JIT: flushing data structures (compiled pages=360)Jan 02 18:39:01.193 CPU0: JIT: partial JIT flush (count=186)Jan 02 18:39:01.294 CPU0: JIT: flushing data structures (compiled pages=356)Jan 02 18:39:01.676 CPU0: JIT: partial JIT flush (count=169)Jan 02 18:39:01.736 ROM: trying to read bootvar 'PMDEBUG'Jan 02 18:39:01.737 CPU0: JIT: flushing data structures (compiled pages=365)Jan 02 18:39:01.773 ROM: trying to read bootvar 'MONDEBUG'Jan 02 18:39:01.843 CPU0: JIT: partial JIT flush (count=179)Jan 02 18:39:02.057 CPU0: JIT: flushing data structures (compiled pages=356)Jan 02 18:39:02.268 CPU0: JIT: partial JIT flush (count=185)Jan 02 18:39:02.433 CPU0: JIT: flushing data structures (compiled pages=370)Jan 02 18:39:02.495 ROM: unhandled syscall 0x0000001a at pc=0x60bba074 (a1=0x65ec5784,a2=0x63803284,a3=0x00000068)Jan 02 18:39:02.495 ROM: unhandled syscall 0x00000009 at pc=0x60bba074 (a1=0x65ec5784,a2=0x63803240,a3=0x00000024)Jan 02 18:39:02.510 CPU0: JIT: partial JIT flush (count=192)Jan 02 18:39:02.594 CPU0: JIT: flushing data structures (compiled pages=366)Jan 02 18:39:02.686 CPU0: JIT: partial JIT flush (count=184)Jan 02 18:39:02.750 CPU0: JIT: flushing data structures (compiled pages=370)Jan 02 18:39:02.807 CPU0: JIT: partial JIT flush (count=207)Jan 02 18:39:02.850 CPU0: JIT: flushing data structures (compiled pages=351)Jan 02 18:39:02.893 CPU0: JIT: partial JIT flush (count=207)Jan 02 18:39:02.938 CPU0: JIT: flushing data structures (compiled pages=358)Jan 02 18:39:02.985 CPU0: JIT: partial JIT flush (count=206)Jan 02 18:39:03.036 CPU0: JIT: flushing data structures (compiled pages=358)Jan 02 18:39:03.079 CPU0: JIT: partial JIT flush (count=206)Jan 02 18:39:03.120 CPU0: JIT: flushing data structures (compiled pages=365)Jan 02 18:39:03.168 CPU0: JIT: partial JIT flush (count=206)Jan 02 18:39:03.210 CPU0: JIT: flushing data structures (compiled pages=367)Jan 02 18:39:03.252 CPU0: JIT: partial JIT flush (count=206)Jan 02 18:39:03.296 CPU0: JIT: flushing data structures (compiled pages=374)Jan 02 18:39:03.404 CPU0: JIT: partial JIT flush (count=164)Jan 02 18:39:03.460 CPU0: JIT: flushing data structures (compiled pages=378)Jan 02 18:39:03.566 CPU0: JIT: partial JIT flush (count=184)Jan 02 18:39:03.642 CPU0: JIT: flushing data structures (compiled pages=380)Jan 02 18:39:03.697 CPU0: JIT: partial JIT flush (count=192)Jan 02 18:39:03.821 CPU0: JIT: flushing data structures (compiled pages=383)Jan 02 18:39:03.868 CPU0: JIT: partial JIT flush (count=189)Jan 02 18:39:03.936 CPU0: JIT: flushing data structures (compiled pages=382)Jan 02 18:39:03.977 CPU0: JIT: partial JIT flush (count=205)Jan 02 18:39:04.025 CPU0: JIT: flushing data structures (compiled pages=370)Jan 02 18:39:04.071 NM-4T(1): channel 0 disabledJan 02 18:39:04.080 CPU0: JIT: partial JIT flush (count=199)Jan 02 18:39:04.138 CPU0: JIT: flushing data structures (compiled pages=367)Jan 02 18:39:04.148 NM-4T(1): channel 1 disabledJan 02 18:39:04.195 CPU0: JIT: partial JIT flush (count=199)Jan 02 18:39:04.229 NM-4T(1): channel 2 disabledJan 02 18:39:04.247 CPU0: JIT: flushing data structures (compiled pages=366)Jan 02 18:39:04.306 NM-4T(1): channel 3 disabledJan 02 18:39:04.319 CPU0: JIT: partial JIT flush (count=198)Jan 02 18:39:04.357 NM-4T(2): channel 0 disabledJan 02 18:39:04.365 CPU0: JIT: flushing data structures (compiled pages=368)Jan 02 18:39:04.416 CPU0: JIT: partial JIT flush (count=201)Jan 02 18:39:04.456 NM-4T(2): channel 1 disabledJan 02 18:39:04.472 CPU0: JIT: flushing data structures (compiled pages=369)Jan 02 18:39:04.502 NM-4T(2): channel 2 disabledJan 02 18:39:04.514 CPU0: JIT: partial JIT flush (count=198)Jan 02 18:39:04.549 NM-4T(2): channel 3 disabledJan 02 18:39:04.557 CPU0: JIT: flushing data structures (compiled pages=368)Jan 02 18:39:04.601 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x608fa618 (size=2)Jan 02 18:39:04.602 CPU0: IO_FPGA: write to unknown addr 0x16, value=0x1, pc=0x608fa620 (size=2)Jan 02 18:39:04.631 CPU0: JIT: partial JIT flush (count=180)Jan 02 18:39:04.682 ROM: trying to read bootvar 'ROM_PERSISTENT_UTC'Jan 02 18:39:04.823 CPU0: JIT: flushing data structures (compiled pages=388)Jan 02 18:39:04.828 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:05.052 CPU0: JIT: partial JIT flush (count=193)Jan 02 18:39:05.105 CPU0: JIT: flushing data structures (compiled pages=386)Jan 02 18:39:05.175 CPU0: JIT: partial JIT flush (count=198)Jan 02 18:39:05.230 CPU0: JIT: flushing data structures (compiled pages=380)Jan 02 18:39:05.286 CPU0: JIT: partial JIT flush (count=183)Jan 02 18:39:05.334 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:05.345 CPU0: JIT: flushing data structures (compiled pages=381)Jan 02 18:39:05.414 CPU0: JIT: partial JIT flush (count=195)Jan 02 18:39:05.487 CPU0: JIT: flushing data structures (compiled pages=376)Jan 02 18:39:05.536 ROM: trying to set bootvar 'BSI=0'Jan 02 18:39:05.580 ROM: trying to read bootvar 'RET_2_RCALTS'Jan 02 18:39:05.580 ROM: trying to set bootvar 'RET_2_RCALTS='Jan 02 18:39:05.607 CPU0: JIT: partial JIT flush (count=186)Jan 02 18:39:05.627 ROM: trying to read bootvar 'RANDOM_NUM'Jan 02 18:39:05.660 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:05.665 CPU0: JIT: flushing data structures (compiled pages=384)Jan 02 18:39:05.812 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:05.963 CPU0: JIT: partial JIT flush (count=183)Jan 02 18:39:06.007 CPU0: JIT: flushing data structures (compiled pages=375)Jan 02 18:39:06.063 CPU0: JIT: partial JIT flush (count=188)Jan 02 18:39:06.105 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:06.201 CPU0: JIT: flushing data structures (compiled pages=428)Jan 02 18:39:06.298 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:06.550 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:06.844 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:06.959 CPU0: JIT: partial JIT flush (count=152)Jan 02 18:39:07.044 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:07.306 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:07.666 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:08.081 CPU0: JIT: flushing data structures (compiled pages=427)Jan 02 18:39:08.188 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:08.689 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:09.176 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:09.707 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:10.213 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:10.710 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:11.182 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:11.402 CPU0: JIT: partial JIT flush (count=179)Jan 02 18:39:11.689 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:12.197 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:12.716 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:13.121 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:13.452 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:13.762 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:14.114 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:14.437 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:14.795 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:15.138 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:15.471 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:15.807 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:16.094 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:16.455 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:16.811 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:17.163 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:17.428 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:17.781 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:18.135 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:18.467 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:18.754 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:19.106 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:19.458 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:19.897 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:20.396 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:20.894 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:21.436 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:21.937 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:22.470 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:22.952 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:23.484 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:23.964 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:24.462 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:24.929 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:25.436 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:25.825 VTTY: Console port is now connected (accept_fd=17,conn_fd=24)Jan 02 18:39:25.909 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:26.100 CPU0: JIT: flushing data structures (compiled pages=429)Jan 02 18:39:26.219 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:26.456 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:26.714 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:26.939 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:27.162 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:27.414 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:27.643 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:27.897 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:28.131 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:28.391 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:28.620 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:28.780 CPU0: JIT: partial JIT flush (count=175)Jan 02 18:39:28.874 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:29.107 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:29.366 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:29.592 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:29.816 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:30.066 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:30.197 CPU0: JIT: flushing data structures (compiled pages=507)Jan 02 18:39:30.307 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:30.561 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:30.784 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:31.039 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:31.262 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:31.524 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:31.750 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:32.035 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:32.264 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:32.517 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:32.747 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:32.999 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:33.228 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:33.481 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:33.704 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:33.963 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:34.184 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:34.438 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:34.660 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:34.883 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:35.145 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:35.379 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:35.634 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:35.887 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:36.109 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:36.337 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:36.600 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:36.822 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:37.044 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:37.295 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:37.531 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:37.785 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:38.009 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:38.262 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:38.539 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:38.777 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:39.002 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:39.254 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:39.446 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:39.624 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:39.817 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:40.009 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:40.175 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:40.365 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:40.525 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:40.716 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:40.878 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:41.068 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:41.322 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:41.544 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:41.798 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:42.024 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:42.255 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:42.507 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:42.759 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:42.978 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:43.231 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:43.452 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:43.675 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:43.927 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:44.155 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:44.407 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:44.627 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:44.880 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:45.101 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:45.326 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:45.585 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:45.808 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:46.060 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:46.282 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:46.535 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:46.760 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:47.013 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:47.234 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:47.485 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:47.735 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:47.988 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:48.206 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:48.427 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:48.680 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:48.907 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:49.165 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:49.383 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:49.638 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:49.859 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:50.110 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:50.330 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:50.580 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:50.800 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:51.053 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:51.272 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:51.536 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:51.775 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:52.027 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:52.247 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:52.500 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:52.724 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:52.973 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:53.195 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:53.417 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:53.667 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:53.891 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:54.141 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:54.366 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:54.618 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:54.842 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:55.066 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:55.320 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:55.544 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:55.797 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:56.019 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:56.275 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:56.495 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:56.754 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:56.974 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:57.225 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:57.448 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:57.703 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:57.931 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:58.151 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:58.404 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:58.629 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:58.880 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:59.105 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:59.357 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:59.581 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:39:59.836 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:00.057 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:00.313 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:00.538 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:00.790 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:01.014 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:01.269 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:01.491 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:01.744 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:01.964 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:02.218 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:02.438 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:02.661 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:02.913 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:03.136 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:03.272 CPU0: JIT: partial JIT flush (count=140)Jan 02 18:40:03.379 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:03.635 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:03.891 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:04.118 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:04.343 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:04.600 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:04.826 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:05.085 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:05.305 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:05.556 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:05.782 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:06.031 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:06.255 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:06.506 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:06.728 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:06.956 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:07.208 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:07.433 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:07.687 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:07.880 CPU0: JIT: flushing data structures (compiled pages=520)Jan 02 18:40:07.921 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:08.149 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:08.406 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:08.634 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:08.892 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:09.091 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:09.322 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:09.575 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:09.800 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:10.052 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:10.248 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:10.504 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:10.724 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:10.980 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:11.203 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:11.455 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:11.681 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:11.932 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:12.158 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:12.380 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:12.638 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:12.859 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:13.109 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:13.335 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:13.590 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:13.811 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:14.035 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:14.288 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:14.512 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:14.765 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:14.987 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:15.243 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:15.465 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:15.718 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:15.940 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:16.191 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:16.416 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:16.668 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:16.891 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:17.111 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:17.363 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:17.587 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:17.838 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:18.063 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:18.315 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:18.542 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:18.794 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:19.016 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:19.270 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:19.491 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:19.762 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:20.007 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:20.271 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:20.507 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:20.794 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:21.047 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:21.312 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:21.553 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:21.801 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:22.084 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:22.319 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:22.602 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:22.848 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:23.114 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:23.351 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:23.618 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:23.880 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:24.115 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:24.379 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:24.578 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:24.731 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:24.880 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:25.051 CPU0: JIT: partial JIT flush (count=155)Jan 02 18:40:25.099 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:25.179 CPU0: JIT: flushing data structures (compiled pages=532)Jan 02 18:40:25.275 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:25.529 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:25.708 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:25.903 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:26.111 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:26.270 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:26.479 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:26.753 CPU0: JIT: partial JIT flush (count=165)Jan 02 18:40:26.805 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:26.853 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:27.133 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:27.356 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:27.509 CPU0: JIT: flushing data structures (compiled pages=531)Jan 02 18:40:27.554 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:27.793 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:27.939 CPU0: JIT: partial JIT flush (count=180)Jan 02 18:40:27.982 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:28.219 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:28.413 CPU0: JIT: flushing data structures (compiled pages=534)Jan 02 18:40:28.477 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:28.759 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:28.981 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:29.176 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:29.402 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:29.614 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:29.846 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:30.109 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:30.309 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:30.544 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:30.754 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:31.010 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:31.164 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:31.392 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:31.636 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:31.818 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:32.052 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:32.268 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:32.470 CPU0: MTS: read access to undefined address 0x3c08002c at pc=0x608fb2f0 (size=1)Jan 02 18:40:32.510 CPU0: JIT: partial JIT flus