Chapter 3 Materials and Basic Processes

19.01.2011 Electronic Pack….. Chapter 3 Materials and Basic Processes Slide 1

Chapter 3Materials and Basic Processes

Picture of the chip set of SensoNor’s SP13 Tire Pressure Sensor

The course material was developed in INSIGTH II, a project sponsored by the Leonardo da Vinci program of the European Union


Materials: Metals

• Right choice, right use and compatibility of materials is the key to good packaging and optimal properties.

–Elemental metals:• High electrical conductivity• High thermal conductivity• Higher thermal coefficient of expansion (TCE) than

semiconductors and most ceramics

–Alloys: taylored to many uses:• Poorer electrical and thermal conductivity than elements• Taylored TCE• Lower melting point


Metals, continued

• (Table 3.1)Table 3.1 a): Properties of some important materials in electronics: Conductors[3.1].

Melting PointElectricalResistivity

ThermalExp. Coeff.

ThermalConductivity

Metal/Conductor [°C] [10-8Ohmm] [10-7/°C] [W/m.°K]Copper 1083 1.7 170 393Silver 960 1.6 197 418Gold 1063 2.2 142 297Tungsten 3415 5.5 45 200Molybdenum 2625 5.2 50 146Platinum 1774 10.6 90 71Palladium 1552 10.8 110 70Nickel 1455 6.8 133 92Chromium 1900 20 63 66Invar 1500 46 15 11Kovar 1450 50 53 17Silver-Palladium 1145 20 140 150Gold-Platinum 1350 30 100 130Aluminium 660 4.3 230 240Au-20%Sn 280 16 159 57Pb-5%Sn 310 19 290 63Cu-W(20%Cu) 1083 2.5 70 248Cu-Mo(20%Cu) 1083 2.4 72 197


Metal Alloys

• Alloys have poorer conductivity, both electrical and thermal.

• Fig. 3.1: Phase diagram for Sn/Pb. The eutectic mixture 63%/37% has a melting point of 183°C.


Insulators

• (Fig 3.1b)Table 3.1 b): Properties of important materials in electronics: insulators [3.1].

Non Organics

RelativeDielectricConstant

Thermal Exp.Coefficient

[10-7/ oC]

ThermalConductivity

[W/ m.oK]

ApproximateProcessing

Temp.[oC]92% Alumina 9.2 60 18 150096% Alumina 9.4 66 20 1600Si3N4 7 23 30 1600SiC 42 37 270 2000AlN 8.8 33 230 1900BeO 6.8 68 240 2000BN 6.5 37 600 >2000Diamond - High Pressure 5.7 23 2000 >2000Diamond - Plasma CVD 3.5 23 400 1000Glass-Ceramics 4-8 30-50 5 1000Cu Clad Invar(10%Cu)/ (Glass Coated) - 30 100 800Glass coated Steel 6 100 50 1000OrganicsEpoxy-Kevlar(x-y) (60%) 3.6 60 0.2 200Polyimide-Quartz (x-axis) 4.0 118 0.35 200Fr-4(x-y plane) 4.7 158 0.2 175Polyimide 3.5 500 0.2 350Benzocyclobutene 2.6 350-600 0.2 240Teflon (™DuPont Co.) 2.2 200 0.1 400


Semiconductors, Si and GaAs

• High thermal conductivity

• Electrical conductivity spans many orders of magnitude, depending on doping

• Very low TCE

• "Machinable" by anisotropic etching (Si)

• Excellent protective oxide (Si)


Ceramics

• Inorganic, non-metallic

• Made by powder, compressing or tape casting, and high temperature treatment (600-1800oC)

• Chemically and thermally very stable

• Electrical insulators

• Some ceramics are very good thermal conductors


Ceramics, continued

Table 3.1 c): Properties of ceramics, Si, Si3N4 and SiO2 and polyimide.[3.1]

Characteristic Al2O3 AlN SiC Si SiO2 Si3N4 PolyimideSpecific Resistance(Ohmcm) >1014 4x1011 1013

10-4 to

10+4 106 1012 1016

Relative Permittivity9.8 10

15 to45 11.9 3.9 7.5 3-4

ThermalConductivity (W/m °K)

10 to35

140 to170 270 150 1.5

10 to40 0.4

Thermal Expansion

Coefficient (10-6/°K) 5.5 2.65 3.7 2.60.3 to0.5

2.5 to3

20 to70

Breakdown FieldStrength (V/cm) 105 105 700 105

106 to

107106 to

107 106

Loss Factor (tan )

3x10-45x10-4

to 10-3 5x10-24x10-3

4x10-2 3x10-2_ _

Modulus of Elasticity

(kN/mm2)

300 to380 300 380 170

70 to72.5

280 to320 3


Ceramics, continued

• Dielectric loss:– tan = (1/R)/C = 1/Q

– = (k´ - jk")

– tan = k"/k´.

• Main uses:–Substrates for hybrid circuits, component packages, SMD resistors

–Multilayer capacitors–Future: Superconductors ?

Cp Rp


Materials

• Fig 3.1.d

Table 3.1 d): Elastic modules and thermal conductivity of some materials [3.1].

Material

Modulus ofElasticity E

[GPa]

ThermalConductivity k

[W/cm °C]

Application

90-99% Al2O3 262 0.17 SubstrateBeryllia (BeO) 345 2.18 SubstrateCommon Cu alloys 119 2.64 LeadframeNi-Fe Alloys(42 alloys) 147 0.15 LeadframeAu-20% Sn 59.2 0.57 Die bond attach and lid

sealantAu-3% Si 83 0.27 Die bond attachPb-5% Sn 7.4 0.63 Flip chip bondingSilicon 13.03 1.47 Electronic circuitAu 78 3.45 Wire metallurgyAg-loaded epoxy 3.5 0.008 Die bond adhesiveEpoxy (Fused silica filler) 13.8 0.007 Moulding Compound


Ceramics, continuedTable 3.1 e): Properties of low temperature ceramic. Burnout and firing conditions(a) Followed by a reduction step in N2/H2, 350C, 0.3h

System Matrix Filler Metallisation Burnout[oC/h]

Firing[oC/h]

Atmosphere Shrinkage[%]

High-temperature cofired ceramicIBM Alumina … Molybdenum … 1560/33 H2/N2 17

Low-temperature cofired ceramicAsahi glass Ba-Al2O3SiO2-

B2O3

Al2O3Forsterite

… …900/1 Air 12

DuPont Alumina silicate Al2O3 Silver, Gold 350/1 850/0.3 Air 12

Fujitsu Borate glassAl2O3 Copper

… 950 to1000/- Reducing

.....

Matsushita 0.35NaAlSi3O8-

0.65CaAl2Si2O8

… Copper 550/4(a)(in air) 900/0.3 Nitrogen

.....

Murata BaO-B2O3-

Al2O3-CaO-SiO2

.... Copper …950/- Reducing 13.5

Narumi CaO-Al2O3-

B2O3-SiO2

Al2O3 Silver,gold(top)

…880/0.3 Air 16

NEC Lead borosilicate Al2O3 Silver,palladium

…900/- Air

13

Shoei BaZr(BO3)2 SiO2 Copper 600/-(in air)

980/2.5 Nitrogen 12

Taiyo Yuden CaO-MgO-Al2O3-SiO2-

B2O3

…Copper

…950/- Reducing

.....

19.01.201107.10.99 Electronic Pack….. Chapter 3 Materials and Basic Processes Slide 12

Ceramics, continued

Fig 3.1 e.2 Physical propertiesSystem Dielectric

constantDissi-pationfactor

Insulationresistance,[Ohmcm]

Coefficientof thermalexpansion[10-6/°K]

ThermalConduc-

tivity[W/m°K]

Fracturetrength[MPa]

Breakdownvoltage

[kV/mm]

High-temperature cofired ceramicIBM 9.4 >1014 6.5 16.7 275

Low-temperature cofired ceramicAsahi glass 6.3 0,001 … 3,8-6,8 … 245 …DuPont 7.8 0,002 >1013 7,9 2,9 206 40Fujitsu 4.9 4,0 … … 50Matsushita 7.4 0,002 1014 6,1 2,9 245Murata 6.1 0,0007 >1014 8,0 4,2 196 20Narumi 7.7 0,0003 1014 5,5 2,5 196 88NEC 7.8

3.90,0030,003

>1014

>10137,91,9

……

343137

……

Shoei 7.0 0,001 >1014 7,7 3,3 196 …Taiyo Yuden 6.7 … … 5,8 6 245 …


Glasses:

• Glasses are amorphous, supercooled liquids–Uses:

• Matrix for thick film pastes

• Hermetic seals

• Substrates, together with ceramics


Plastics• Organic, synthetic polymer materials with numerous uses in

electronics

Table 3.3 a): Plastics in various types of electronics applications.Integrated circuits,transistors,diodes, and otherdiscrete devices

Transfer moulding compounds, injection mouldingcompounds, castings, potting, dip and powder coatingcompounds, and die attach adhesives. Photoresists. Junctioncoatings.

Wires and cables Sleevings, coatings, varnishes, intermetal dielectrics.Connectors Transfer moulding, injection moulding, compression

moulding compounds.Hybrids Conductive and non conductive adhesives, sealants,

conformal coatings.Transformers, coils,bushings

Transfer moulding compounds, coatings, potting compounds,coil impregnates, wire insulation.

Printed circuit boards Laminates, conformal coatings, solder masks, masking tapes,component attachment adhesives, and vibration dampers.Photoresists.

19.01.201107.10.99 Electronic Pack….. Chapter 3 Materials and Basic Processes Slide 15

Plastics, continued

• Composition, properties:–Monomers derived from benzene


Plastics, continued

Table 3.3 b):Types of plastics for various purposes.USE SUITABLE MATERIALSTransfer moulding Epoxides, silicones, phenolics, polyimides.Injection moulding Polyethylene, polypropylene, polyphenylene sulphide.Encapsulation/casting Epoxides, polyurethanes, silicones.Adhesives Epoxides, polyimides, cyanoacrylates, polyesters, polyurethanes.Coatings Silicones, fluorocarbons, epoxides, polyxylylenes, polyurethanes,

polyimides.Films Polyesters, polypropylene, polystyrene, polyimides.Sealants Silicones, polysulphides, polyurethanes, epoxide-polyamides, and fluoro-

silicones.


Plastics, continued

• Requirements:–High electrical resistivity, high breakdown field,

low dielectric losses, low dielectric constant–Thermal and mechanical stability–Thermal expansion compatible with Si and metals–High mechanical strength/softness and flexibility–Chemical resistance–Good adhesion to other materials–Ease of processing–Low water absorption, small changes of the

properties during the effect of moisture.


Plastics, continued

• Composition, properties:

–Linear, branched or crosslinked


Plastics, continued

• Thermoplastic or thermosetting


Plastics, continued• Polymerization: A-, B-, C-stages.

• High electrical resistivity , low dielectric constant r, low loss factor tan , high breakdown field Ecrit

• Poor thermal conductors

• Visco-elastic

• Fig 3.7: The structural unit of certain monomers/polymers.


Plastics, continued

• "Glass transition": change from glass-like to rubber - like


Plastic Materials:

• Epoxy• Phenolic• Polyimide• Teflon• Polyester• Silicone• Polyurethane• Parylene• Acrylic• Polysulphone, polyethersulphone, polyetherimide


Plastics, continued• Fig. 3.9: a):The

epoxide group, which is the building block in epoxy, b) - e): Starting materials for epoxy:b): Bisphenol A, which constitutes most of the starting material. The H-atoms in the places X are often replaced with Br to reduce the flammability; c): Epoxy novolac; d): The hardener dicyandiamide; e): The catalyst.


Plastics, continuedTable 3.5: Properties of high temperature moulding plastics [3.6, page 307]. Property Poly-

sulphone (Udel)

Polyether sulphone (Victrex)

Poly- -phenylene sulphide (Ryton)

Polyether- -imide (Ultem)

Ultem +20% glass reinforced

Flexural strength

[x10-3psi]

15.4

18.6

25

21

30

Flexural modulus

[x10-6psi]

0.39

0.37

1.7

0.48

0.9

Tensile strength

[x10-3psi]

10.2

12.2

16.2

15.2

20

Dielectric constant

[1 MHz, 25oC]

3.03

3.45

3.8

3.1

3.5

Dissipation factor

[1 MHz, 25oC]

0

0.008

0.0014

0.006

0.0015*

Volume resistivity

[x10-17 Ohmm]

50

100

45

6.7

0.7

Electrical strength [kV/mm]

17 16 17.7 28 26.5

Deflection temperature

[oC] at 264 psi

174

202

243

200

209

Thermal expansion

coefficient [ppm/oC]

56

55

40

56

25

Water absorption [%] (24h)

0.3 0.4 0.05 0.25 0.26

Maximum continuous

temperature [oC]

160

170-200

170

170

170

* 1kHz


Basic Processes

• Description of some of the basic processes used in microelectronics, microsystems and electronic packaging.


Photolithography

• Fig. 3.10:The steps in photolithographic transfer of patterns and the subsequent etching of metal films with negative photoresist.

• If positive resist is used, it is the illuminated part of the photoresist, which is removed during the development.

• Positive resist most used today because of better accuracy


Photolithography, cont

• Also, please observe the concept of straight polarity masks and reverse polarity masks:

– Straight polarity:In layers with straight polarity, a positive image of the layout will be transferred onto the process layer. In other words, draw the objects that need to be covered with photo-resist after development.

• Openings: Mask pattern is repeated on the substrate for additive films etc., like metal patterns. (Assuming positive resist is used)

– Reverse polarity:In layers with reverse polarity, draw the areas where photo-resist should be removed. The actual mask will be the negative image of the layout.

• Mask pattern is oppositely repeated on the substrate for additive films etc., like openings in oxide for later difussion of dopants. (Assuming positive resist is used)


Screen Printing and Stencil Printing

• Fig. 3.11: Screen printing: a) and b): Printing process, c) and d): Details of the

screen


Etching

• Wet, chemical etching

• "Dry" plasma- or reactive ion etching• Examples, wet etching:

Copper:FeCl3 + Cu -> FeCl2 + CuClIn addition:FeCl3 + CuCl -> FeCl2 + CuCl2

Need organic etch resist, not good with PbSn.

Gold:KI + I2 -> KI3 + KI (surplus)3 KI3 + 2 Au -> 2 KAuI4 + KI


Plating

• Electrolytic plating: –Electric current of ions in electrolyte. External circuit needed. All separate parts of area to be plated must be electrically contacted to external circuit.

Example: Cu in CuSO4 /H2SO4

Reaction at anode (Cu supply):Cu -> Cu2+ + 2e-

Reaction at catode (substrate):Cu2+ + 2e- -> Cu


Plating, continued

• Chemical plating:–Takes place without external current –Needed when insulating surfacec are to be plated –Often preceeds electrolytic plating, to make all

needed areas electrically conductive–Complex processes of "sensitizing", "activation"

and plating


Vacuum Deposition and Sputtering

• Vacuum evaporation:

–Chamber evacuated toless than 10-6 Torr

–Resistance heating

–Metal evaporation


Other Methods for Deposition of Conducting or Insulating Films

• DC Sputtering (Fig. 3.13.a)


Deposition, continued• Radio Frequency AC Sputtering (Fig.3.13.b)


Methods for Electrical and Mechanical Contact

• Soldering–Wetting: (Fig. 3.14)

Young´s eq.: lsl cos s

19.01.2011 Slide 36

Leadless soldering• Leadless soldering replacing lead-based solder due health hazards and

environmental issues


Soldering, continued

• Most common solder alloy: 63 % Sn / 37 % Pb (eutectic)Melting point 183 oC

Table 3.6: Properties of solder alloys 63 Sn:37 Pb or 60 Sn:40 Pb (weight %)

Temp. [oC] Value UnitElectrical resistivity, 25

1000.170.32

µOhmm"

Thermal conductivity, °K 25100

5149

W/m°K"

Thermal coeff. of expansion, 24.5 ppm/°CSpecific heat 46 000 J/kg°K

Modulus of elasticity, E 25 32 000 N/mm2

Density, 8.5 g/cm3


Soldering, continued• Fatigue: Coffin-Mansons formula:

N0.5 x p = constant

where N is number of stress cycles, and p is the relative deformation amplitude, meaning that both number of cycles and stress level determine lifetime

• Useful adition : 2 % Ag (Surface mount), to reduce leaching (dissolution of the termination metal that leads to deterioration of mechanical and electrical properties)

• Harmful contaminant: Au, will increase brittleness because of AuSn intermetallics



• Fig.3.15: Behaviour of solder metal at different temperatures, schematically. [W. Engelmaier].



• Fig. 3.16: Solder joint fatigue in surface mounted assemblies is often caused by power cycling.



• Fig. 3.17: Experimental data for fatigue in Sn/Pb solder fillet by cyclical mechanical stress. High temperature and low cycling frequency gives the fastest failure, because the grain structure relaxes most and is damaged



• Fig. 3.18. a) Left: Dissolution rate of Ag in solder metal, and in solder metal with 2 % Ag, as function of temperatureb) Right: Dissolution rate of various metals in solder alloy


Soldering, continuedTable 3.7: Alloys for soft soldering [3.11]

Alloy System [mass%]

Code Melting Temperature [°C]

Shear Strength

at 1 mm min-1 [Nmm-2] Sn Pb Ag Sb In Bi Solid Liquid 20°C 100°C 100 Sn 232 22,1 19,0 63 37 Sn63 183 183 - - 60 40 Sn60 183 188 33,6 21,6 50 50 Sn50 183 216 30,0 24,0 40 60 Sn40 183 234 34,3 13,7 10 90 275 302 28,9 14,7 5 95 310 314 62 36 2 Sn62 179 179 43,0 18,6 10 88 2 268 299 - - 5 93,5 1,5 296 301 23,8 15,7 96,5 3,5 Ag3,5 221 221 37,7 22,5 95 5 Sb5 236 243 37,2 21,1 40 60 In60 174 185 - - 50 50 In50 180 209 - - 37 37 25 In25 138 138 - - 42 58 Bi58 139 139 50,0 19,5 15 33 52 Bi52 96 96 - - 34 42 24 Bi24 100 146 34,3 17,5 43 43 14 Bi14 143 163 - -



• Flux and cleaning–Purpose of flux:

• Dissolve and remove oxides etc.

• Protect surface

• Improve wetting

–Categories:• Soluble in organic liquids

• Water soluble

–Types:• Organic resin fluxes ("rosin")

• Organic non resin based fluxes

• Inorganic fluxes


Soldering: Flux and cleaning

• Fig. 3.19: Time for solder alloy to wet a pure Cu surface, depending on the activation of the solder flux. The degree of activation is given by the concentration of Cl- ions in the flux (temperature: 230 °C)


Soldering: Flux and Cleaning

• Designations:– R (Rosin, non-activated): No clorine added.

– RMA (Rosin mildly activated): < 0.5 % Cl

– RA (Rosin, activated): > 0.5 % Cl

• Cleaning– Freon (TCTFE) now forbidden. Replaced by alcohol etc.

– Trend: No cleaning


Gluing• Purposes:

–Mechanical assembly–Electrical contact–Thermal contact

• Materials: polymers: –Epoxy, acrylic, phenolic, polyimide–Metal particles for electrical conductivity:

r = 1 - 10 x 10 -6 ohm m–Metal or ceramic particles for thermal

conductivity:K ≈ 1 - 3 W /m x oC


Gluing, continued

• Fig. 3.20: Thermal conductivity of epoxy adhesive with various amounts of Ag [3.16 a)]. The concentration is in volume % Ag. (23 vol. % corresponds to approximately 80 weight %).


Gluing, continued• Fig. 3.21: The thermal

resistance from the electronically active part, on top of the Si chip (¨junction¨) through a bonding layer of glue or soft solder and a thin alumina ceramic layer covered with Cu to heat sink. The samples with chips bonded by gluing, C and A, have approximately twice as high total thermal resistance as those which are soft soldered, D and B.


Chip Mounting: Die Bonding

• Fig. 3.22: Thermal resistance from junction to heat sink through adhesive of various thicknesses. For thick layers the resistance approaches the value calculated, based on the bulk thermal conductivity of the adhesive. For thin layers the resistance is higher, approaching a constant value, which indicates an "interface thermal resistance" caused by defects in the adhesive layer


Chip Mounting: Die Bonding, continued

• Eutectic die bonding:

– Au/Si (363 oC), Au/Sn (280 oC)

• Soft soldering: Sn/Pb, Ag/Pb

• Glueing• Adhesive cracking, fig. 3.23: Thermal cycling

induces defects giving increased thermal resistance.


Chip Mounting: Die Bonding, continued• Fig. 3.24: Use of adhesive for

contacting IC-chips with small pitch, schematically: a): Anisotropic conductive adhesive, the conduction is through the metal particles in the adhesive;

b): Electrically insulating adhesive, the conduction is through point contacts where the adhesive has been squeezed out.


Si Chip Electrical Contact

• Wire bonding

• Tape Automated Bonding (TAB)

• Flip chip

• Planar bonding


Wire Bonding

• Ultrasonic

• Thermo-compression

• Thermosonic

• Geometry Types–Ball - wedge:

Shown in illustration

–Wedge - wedge


Wire Bonding

From Small Precision Tools



• Connection made in two steps:

– Inner Lead Bonding• Connecting tape to chip

– Outer Lead Bonding• Connecting tape to substrate

• Connection made by thermocompression

Tape Automated Bonding (TAB)


Tape Automated Bonding (TAB)• Standard process:

– Fabrication of gold bumps (Fig. 3.28):

• Deposition of contact/barrier metals

• Photolithography

• Electroplating

• Strip and etch barrier metals


TAB, continued

• Fig. 3.26: A picture of a TAB film with the Cu pattern, as well as the holes in the film for excising the circuits, and the sprocket holes for moving the film during processing.


TAB, continued

• Fig. 3.27: The main steps in TAB processing.


Tape Automated Bonding (TAB)

• Wafer cutting

• Fabrication of TAB film–Hole punching–Cu foil lamination–Lithography + etch of Cu pattern–Tinning of Cu

• Inner lead bonding (ILB)


TAB, continued

• Protection (glob top)

• Testing

• Outer lead bonding:–Excising, lead

bending–Placement/thermode

soldering


Advantages of TAB:

• High packaging density

• Can contact chips with >1000 I/O

• Excellent electrical properties (high frequency)

• Robust mounting

• Pre-testable (contrary to COB)

• Gold bumps give hermetic seal to chip

• Gang bonding gives high yield, is less time consuming than wirebonding

• TAB film can be used as daughter board


Disadvantages of TAB:

• Non-standard wafer processes

• Special custom design film for chip

• Needs special machine/tool for OLB

• Demanding repair

• Low availability of std. chips and TAB service

• Little standardization

19.01.2011

• Active face of chip is flipped towards substrate– Substrate pads are identical to chip pads

• Area array connections possible• All connections done simultaneously• Smallest possible footprint (1:1)• Short interconnections

– Low inductance and resistance– Excellent electrical properties

• Little flexibility– Change of chip pad configuration implies redesign of

substrate

• Small, but increasing amount of interconnections are flip chip

• To be dealt with in much more detail…

Flip chip


Flip Chip

• Process:–Deposit barrier metals–Deposit solder bump metals (solder) by

photolithography/metal mask and sputter or plating

–Reflow–Cut wafer–Turn chip and mount on substrate–Heat substrate to reflow solder

19.01.2011

• Introduced by IBM 1962

• Flip chip has been used for decades, but with little impact

– Wire bonding is far more common

– Flip chip technology has not been considered mature

– The industrial infrastructure has been small

• The market share of flip chip connections is believed to increase significantly

– Wire bonding will remain dominating for many years

• Flip chip especially for ”advanced packaging”

Flip Chip, history


Flip Chip, continued

• Advantages:–Highest packing density–Excellent hi freq. properties–Up to 10 000 I/O

• Disadvantages:–Very difficult placement and reliable

solder/cleaning–Lack of thermal flexibility

19.01.2011

• Chip– Si, GaAs, etc.

• Substrate– Ceramic, organic,

dielectic-covered metal, silicon, etc.

• Interconnection system:– Metallization on chip and substrate pads

– Chip (or substrate) bumps

– Bonding material

– Underfill encapsulant

Flip Chip consists of:

19.01.2011

• Flip chip is not standardized!

Different Flip Chip technologies

From C. Lee, ESTC 2006, Dresden


Wire Bonding, TAB and Flip ChipTable 3.8: Comparison of wire bonding, TAB, and flip chip soldering [3.22]

Bonding technology Wire Bond TAB Flip-ChipMaterial(s) Al Au Cu Pb-SnMelting temperature [°C] 660 1064 1084 310Bonding geometry 25 µm diameter

x 2,5 mm length25x100 µm tapex 2,5 mm length

125 µm diameter100 µm height

Typical pitch [µm] 170 µm perimeter 200µm perimeter 250 µm areaMinimum Pitch [µm] 60 µm perimeter 70 µm perimeter 50 µm areaStrength per bond [gram] 6 10 50 30Lead resistance [mOhm] 142 122 17 1,2Interlead capacitance [pF] 0,025 0,025 0,006 <0,001Lead inductance [nH] 2,6 2,6 2,1 <0,2Thermal resistance[°C/mW] per bond 80 52 8 0,5No. of I/Os per chipTypical pitch8 mm chip size 184 160 1024Minimum pitch8 mm chip size 266 400 15150


Planar Bonding with Adaptive Routing

• Fig. 3.32: Planar bonding with laser-assisted adaptive conductor routing.

The top two figures a) and b) show a substrate cross section with details of the mounting of the chip in an etched through-hole.

Figure c) shows the conductor layers and polyimide insulation on top of the substrate. The bottom figures show an exploded view of all the layers.


End of Chapter 3 Materials and Basic Processes

•Important issues:– Materials:

• Distinguish between metals, ceramics, glasses and plastics– Important mechanical and thermal parameters like modulus of eleasticity, thermal

expansion coefficient and thermal conductivity.– Important electrical parameters like dielectric constant and resistivity or

conductivity– Have a basic understand of the importance and value of the most important

materials parameter, and why they are important for the use of the specific material in specific applications.

– For instance knowing the electrical conductivity of copper or thermal conductivity of epoxy within an accuracy of 25%

– Basic processes• Lithographics, screen and stencil printing, etching, plating, vacuum

deposition, sputtering, soldering, gluing, wire bonding, TAB, and flip chip– Other basic processes described in other chapters, like surface mount technology

•Questions and discussions?

Documents

Chapter 3 Materials and Basic Processes