Charge-Pump Phase-Locked Loops - 國立中興大學cc.ee.nchu.edu.tw/~aiclab/teaching/pll/lect05_pll.pdf · 2010-05-26 · PLL ICs 5-7 Ching-Yuan Yang / EE, NCHU Compensated type

Ching-Yuan Yang

National Chung-Hsing UniversityDepartment of Electrical Engineering

Charge-Pump Phase-Locked Loops

Phase-Locked Loops

5-1 Ching-Yuan Yang / EE, NCHUPLL ICs

Conceptual operation of a phase-frequency detector (PFD)

PFDAB

A A

B B

AQ

BQ

BQBQ

AQAQ

t t

BA BA


Phase detector : PFD – three-state PD

QA = 1QB = 0

QA = 0QB = 0

A

QA = 0QB = 1

AState I State II State III

A

B B

B

A

B

QA

QB

A

B

QA

QB

A

B

QA

QB

A

B

QA

QB

State diagram

Timing diagram


- Implementation of PFD

Input-output characteristic: PFD followed by low-pass filters:

AQ

BQ

A

B

outV

o360

o360


- Phase detector : PFD

When locked, the phase difference is 0 degree

Output voltage independent on the input signal amplitudes

Output voltage independent on the input duty cycles

Wide linear range (Wide lock range) 2

Discriminate frequency difference

Use carefully for Data/Clock Recovery PLL

- Hybrid PLL (Analog PLL + Digital PLL)

Dead Zone problem

Due to finite gate delay

Introduce large jitter or poor phase noise


Charge-pump PLL

R

V

U

DIp R,C

ip VcontKv Vout

Vi

Phase/FrequencyDetector

ChargePump

LoopFilter

VCO

Why charge pump PLL ? Advantages

No active component for zerosteady state phase error

Large frequency and phasecapture range

Digital output (full CMOS swing) Simple and robust design Discrete time analysis

Disadvantages Slow comparing with

analog PLL May create dead

zone problem Noisy


Addition of zero to charge-pump PLL (2nd order)

Open-loop transfer function a zero at sz = 1/(R1C1).

Closed-loop transfer function

， and decay time constant

sK

sCR

Is VCOP

in

out

11

open

12

)(

VCOP

VCOP

VCOP

KC

IsRK

Is

sCRC

KI

sH

11

2

111

22

12

)(

12 CKI VCOP

n

2211 VCOP KCIR

VCOn KIR 11

41

D Q

rst

D Q

rst

VDD

Vin

VDD

Vout

PFD

up

dn

IP

IP

ie

S1

S2

Vcont

LoopFilter

VCO

C1

R1


Compensated type II PLL

ie IP

IP

Vcont

t

t

Critical drawback :

Since the charge pump drives the series combination of RP and CP, each time a

current is injected into the loop filter, the control voltage experiences a large jump.

In lock condition, the mismatches between I1 and I2 and charge injection and clock

feedthrough of S1 and S2 introduce voltage jumps in Vcont.

The resulting ripple severely disturbs the VCO, corrupting the output phase.

D Q

rst

D Q

rst

VDD

Vin

VDD

Vout

PFD

up

dn

IP

IP

ie

S1

S2

Vcont

LoopFilter

VCO

C1

R1


PLL frequency synthesizer using dividers

In the locked state:FVCO = N FR, N FVCO / N = FX / R = FR


Linear model of 3rd-order PLLs with 2nd-order loop filter

PLL phase transfer functions:

Forward-loop gain

Reverse-loop gain

Open-loop gain

Closed-loop gain

sKsZK

sG vcoLFPD

e

o )()(

Ns

o

div 1)(

NsKsZK

sGs vcoLFPD

e

div )()()(

)()(1)(

sGssG

ref

o

PFD/CP

ZLF(s)KPD

LoopFilter

Kvcos

VCO

1N

MainDivider

oref

e

div


- 2nd-order passive filter

R1

C1

C2

ieVcont

)1)((1

)(

1)(

21212112

111

p

zLF sCCs

s

CCsCCRs

CsRsZ

bs

s

sk

s

s

sk

sZz

z

p

zLF

1

111

)(

Parameters Loop Filter 1 Loop Filter 2

z R1 C1 R1 (C1 + C2)

p

21

211 CC

CCR R1 C2

k1

11Cb

b

1

1C

p

zb

2

11CC

2

11CC

R1

C1

C2

ieVcont

)1()(1

)(211

2112 CsRsC

CCsRsZLF

(Addition of C2 to reduce ripple on the control line.)


- Open-loop bandwidth c and phase margin m

p

zvcoPvcoLFPD

e

div

s

s

sN

kKINs

KsZKsGs

11

2

)()()( 2Open-loop gain

p

zvcoPjs j

j

N

kKIsGs

11

2)()( 2

1 1( ) tan ( ) tan ( ) 180z p

m,max: 0)(1)(1 22

p

p

z

z

dd

pz

c

1

and

bb

pz

pzm 2

1tan

2tan 11

,max

c

m,max

Gain Phase

0 dB

180o

Bode plot of open loop response

z

p

Higher IP KVCO

Lower IP KVCO

cc


If the loop bandwidth c and the phase margin m are specified, we have

2

cos1

tan

1

mm

b

andc

zb

c

p b

1

For loop filter 1:

21

111 2

12 CC

CR

NKI

bb

RN

KI vcoPvcoPc

12

1

b

bKI

NR

vcoP

c

11 R

C z andpz

pz

RC

1

21

For loop filter 2:

1

2111 212 C

CCR

NKI

bb

RN

KI vcoPvcoPc

bb

KIN

RvcoP

c 121

11 R

C pz and

12 R

C p11.43130.6480O

5.6732.1670O

3.7313.9360O

3.1710.0655O

2.747.5550O

2.415.8245O

2.144.5940O

1.733.0030O

1.422.0420O

sqrt(b)bm


Active loop filter implementation

The active loop filter is often used when the charge-pump output can notdirectly provide the required voltage range for tuning of the VCO. Suchvoltages are incompatible with charge-pumps built in standard ICtechnologies, so that a (partly external) active loop filter is then used toisolate the charge-pump output from the VCO tuning input, and to generatethe high tuning voltages.

R1

C1

C2

ie

Vcont


Design flow of 3rd-order PLLs

Determine KVCO. Determine the nominal value of N according to the system to be applied to. Depending on the desired noise and transient performance, determine the

loop bandwidth C. Select IP, to meet the reasonable trade-off between the value the filter

components (i.e., chip area) and the pump current. Select the required phase margin mor b. With KVCO, N, C, IP and b determined, calculate R1. With z and p determine by C and b, calculate C1 and C2.


Multi-path charge-pump filter (1/3)

1 1 2e

e pi I

2 2 2e

e pi I

The loop filter transfer function is

1 2

2

11

( ) 1 1( )

( ) 2 2

1

2 1

p pcontpd LF b

e a b

pb b a

pp

a b b

I IV sK Z s R

s sC sC

IsC C C

II

sC sR C

2 2

1 1

1 p pb b a b a

z p p

I IR C C R C

I I

1b b

p

R C

J. Craninckx, IEEE JSSC, Dec. 1998

122 2

p vco vcoc p b

a z

I K KI R

N C N

Rb

Ca

Cb

ie1

Vcontie2

Va

Vb

VbVa

Vcont

pz clog( )

V

The capacitor Ca can be multiplied by .2 1/ ( 1)p pn I I



1 1 2e

e pi I

2 2 2e

e pi I

The filter transfer function is

22

1( ) b a bcont

e b a b a

sR nC CVF s

i s nR C C snC

1b b a b a

z

R C nC nR C

1

b bp

R C

212

p b VCObc

a

I R KC

nC N

2 1p pI nI

The open-loop transfer function is

2

2

( )2

1

p f VCO z

p

I K K sG s

N ss

1 bf b

a

CK R

nC

where

c is larger than the traditional one.

a bnC C2

1( ) cont b a

e a

V sR nCF s

i snC

2

2 2 2

12( )

( )1 ( )

2 2

P VCOb a

a

P VCO b P VCO

a

I KR nC s

nCG s NH s

I K R I KG s s sN NnC

The closed-loop transfer function is

2

2P VCO

na

I K

nC

2

2 2b P a VCOR I nC K



112

p b VCObc

a

nI R KC

nC N

The open-loop transfer function is

1

2

( )2

1

p f VCO z

p

I K K sG s

N ss

bf b

a

CK n R

C

where

c is larger than the traditional one.

1 1 2e

e pi I

2 2 2e

e pi I

The filter transfer function is

21

1( ) b a bcont

e b a b a

sR nC CVF s

i s nR C C snC

1b b a b a

z

R C nC nR C

1

b bp

R C

2 1p pI nI

a bnC C1

1( ) cont b a

e a

V sR nCF s

i snC

1

2 1 1

12( )

( )1 ( )

2 2

P VCOb a

a

P VCO b P VCO

a

I KnR C s

CG s NH s

I K nR I KG s s sN NC

The closed-loop transfer function is

1

2P VCO

na

I K

C

1

2 2b P a VCOnR I C K


Nonideal Effects in PLLs


PFD and charge-pump filter

Owing to the finite risetime and falltimeresulting from the capacitance seen at thenodes, the pulse may not find enough timeto reach a logical high level, failing to turnon the charge pump switches. For 0, the charge pump injects

no current. The loop gain drops to zero and the

output phase is not locked. The PFD/CP suffers from a dead

zone equal to 0 around = 0. Jitter resulting from the dead zone

D Q

rst

D Q

rst

VDD

Vref

VDD

Vdiv

PFD

up

dn

IP

IP

ie

ie

e

Dead Zone


Reference spurs

Periodic disturbance of VCO control linedue to charge pump activity:

Main effects which generate referencespurious breakthrough: leakage current in the loop filter, skew between up and down (dn)

signals, mismatch in the charge up and down

current sources, Charge sharing.

1

)2cos(2)(n

refcpPcpPe tnfIIti

DC Spectral components

D Q

rst

D Q

rst

VDD

Vref

VDD

Vdiv

PFD

up

dn

IP

IP

ie

Vref

Vdiv

up

dn

t


- Effect of leakage current

e

ie

Ileak

cp

Locking position

Sources of leakage currents: the capacitor of loop filter, the input of VCO, the charge-pump output, the input biasing current of the op-amp,

when active loop filter configuration is used. The duty cycle of the charge-pump output is

leakcpPe IIi P

leakcp I

I

1

)2cos(2)(n

refleakleake tnfIIti

The amplitude of charge-pump output:

The spectral component are twice the value of Ileak. Not dependent on the nominal charge-pump current IP.


Link the leakage current to the magnitude of the spurious components at the output of theVCO:

Phase deviation

Each of baseband modulation frequencies nfref generates two RF spurious signals atoffset frequencies nfref from the carrier fLO.

The amplitude of each spurious signal

)2(2)( refLFleakrefripple nfjZIfnV

ref

vcorefLFleak

ref

vcorefripple

ref

refrefP fn

KnfjZI

fn

KfnV

fn

fnffn

)2(2)()(

)(

ref

vcorefLFleakLO

refPLOrefLOSP fn

KnfjZIA

fnAfnfA

)2(

2

)()(

ref

vcorefLFleak

LO

refLOSP

fn

KnfjZI

A

fnfA

)2()(

[dBc])2(

log202

)(log20

ref

vcorefLFleakref

dBcLO

SP

fn

KnfjZIfn

AA

The relative amplitude of the spurious signal is not dependent on the value of loopbandwidth or on the nominal charge-pump current IP.Theoretically, if Ileak = 0 there are no reference spurs in the output.


- Effect of skew between up and down signals


- Effect of mismatch in the charge-pump current sources

D Q

rst

D Q

rst

VDD

Vref

VDD

Vdiv

PFD

up

dn

Iupie

CIdn

Vcont

M2

M1

up

dn

VDD

skew suppression

M4Vb2

M3Vb1

up

Iup

Idn

ie

Vcont

t

dn

up

Iup

Idn

ie

Vcont

t

dn

e


- Effect of mismatch in the charge-pump current sources For the loop to remain locked, the average value of Vcont must remain constant.

The PLL therefore creates a phase error between the input and the output suchthat the net current injected by the charge pump in every cycle is zero.

The control voltage still experiences a periodic ripple .

Owing to the low output impedance of short-channel MOSFETs, the currentmismatch varies with the output voltage.

The clock feedthrough and charge injection mismatch between M1 and M2

further increases both the phase error and the ripple.

The magnitude of the spectral components of the ripple voltage due to current-source mismatch can be found

)2()()( refLFrefoutrefmismatch nfjZfnIfnV

ref

vcorefLFrefout

dBcLO

refsp

fn

KnfjZfnI

A

fnA

2

)2()(log20

)(


- Effect of charge sharing

Charge sharing between CP and capacitances at X and Y: S1 and S2 are off, allowing M3 to discharge X to ground and M4 to charge Y to VDD. At the next phase comparison instant, both S1 and S2 turn on, VX rises, VY falls,

and VX VY Vcont.

If the phase error is zero and ID3 = ID3, does Vcont remain constant after theswitches turn on? Even if CX = CY, the change in VX is not equal to that in VY.

Vcont

M4Vb2

M3Vb1

S1

S2

CY

VDD

CX

CP

Y

X

Vcont

M4Vb2

M3Vb1

S1

S2

CY

VDD

CX

CP

Y

X

Vcont

t

VY

VX


- Effect of charge sharing

Bootstrapping X and Y to minimize charge sharing: When S1 and S2 turn off, S3 and S4 turn on,

allowing the unity-gain amplifier to hold nodes Xand Y at a potential equal to Vcont.

At the next phase comparison instant, S1 and S2

turn on, S3 and S4 turn off, and VX and VY beginwith a value equal to Vcont.

The ideal is to “pin” VX and VY to Vcont after phasecomparison is finished. Thus, no charge sharing occursbetween CP and the capacitances at X and Y.

IP

IP

S1

S2

Vcont

CP

+1

S4

S3

VDD

X

Y

Documents

Charge-Pump Phase-Locked Loops - 國立中興大學cc.ee.nchu.edu.tw/~aiclab/teaching/pll/lect05_pll.pdf · 2010-05-26 · PLL ICs 5-7 Ching-Yuan Yang / EE, NCHU Compensated type