class 3-differential amp (1).pptx

DIFFERENTIAL AMPLIFIER

Single Ended Signal

A signal measured with respect to a fixed potential (example: ground).

IZHAL ABDUL HALIN


Differential Signal

A signal measured between two nodes. In this case the signal between Vout+ & Vout-. Vout+ has equal but opposite amplitude with Vout- at any time instance.Common Mode level (CM level) is the center potential between Vout+ & Vout-.

IZHAL ABDUL HALIN


Differential Signal Amplitude and Common Mode Level

IZHAL ABDUL HALIN

Ideal clean analog signal.


When running close to a digitalsignal line, capacitive couplingdistorts the analog signal.

IZHAL ABDUL HALIN



IZHAL ABDUL HALIN


An inverted analog signalrunning at the same distanceas the analog signal from thedigital line will also be effected inthe same manner.


Ideal Distorted

Comparing between the ideal & distorted signals.

IZHAL ABDUL HALIN



IZHAL ABDUL HALIN

Ideal Distorted



Red line represents the differentialanalog signal coinciding with the rise & fall time of the digital pulse train.

Red dots represents CM level.


IZHAL ABDUL HALIN

Ideal Distorted


1. Signal amplitude are the same (red lines are the same magnitude).

2. CM level changes (red dots shifts).

\ CM signal is a component of a differential signal.

\ Differential signal maintains it’s signal level.

It is observed that



IZHAL ABDUL HALIN

Differential amplifier - An amplifier that amplifies the difference between 2 signalsand rejects the common mode value (up to a certain degree) of the 2 signals.

Tail current: To allow minimal dependence ofdifferential pair transistor bias currents on the CM level.

DDD RRR 21 &

For an ideally balanced circuit all input transistorsand load resistors must be identical.

21 MM This allows the controlled combination of ID1 andID2 to form ISS through the inputs of M1 and M2.

These currents represent the input voltages. Theywill induce an output voltage drop through the load resistors to generate either single ended outputs ora differential output.

21 DDSS III


IZHAL ABDUL HALIN

Defining the Single Ended Output Level.

01 DI

1. Vin = - (Vin+ is more negative than Vin

-) M1 is OFF while M2 is ON.

Differential Amp Analysis

DDout VV SSD II 2&

&

Single ended output is defined as outV

outV& .

Differential input is defined as . ininin VVV

DSSDDout RIVV

SSD II 1

2. Vin = + (Vin+ is more positive than Vin

-) M1 is ON while M2 is OFF.

DDout VV

02 DI&

&

DSSDDout RIVV 221SS

DD

III

3. When Vin+ = Vin

- the tail current ISS splits equally.

2DSS

DDoutout

RIVVV


IZHAL ABDUL HALIN

Defining the Single Ended Output Level.

01 DI

1. Vin = - (Vin+ is more negative than Vin

-) M1 is OFF while M2 is ON.

Differential Amp Analysis

DDout VV SSD II 2&

&

DSSDDout RIVV

SSD II 1

2. Vin = + (Vin+ is more positive than Vin

-) M1 is ON while M2 is OFF.

DDout VV

02 DI&

&

DSSDDout RIVV 221SS

DD

III

3. When Vin+ = Vin

- the tail current ISS splits equally.

2DSS

DDoutout

RIVVV

Single ended output transfer curve

Single ended output is defined as outV

outV& .



IZHAL ABDUL HALIN

Defining Differential Output Level.Differential Amp Analysis

Differential output is defined as .


outoutout VVV

Differential output transfer curve \ DIFFERENTIAL SIGNALLING OFFERS INCREASED SIGNAL SWING.

Single ended output transfer curve


IZHAL ABDUL HALIN

Differential Mode Voltage Gain, AVDM Calculation Through Small Signal Model

ininin vvv1. Define the small signal differential input as

2. Define the current going into the drain or source as id and is, respectively.

Obtaining the Open Loop Voltage Gain Equation.

3. From node vout, define iout as .42 ddout iii 12 sd ii .

outinmoutsoutddoutoutout rvgririiriv 1142 2)( 4. Finally, gain, Av is calculated as

outmin

outVDM rg

v

vA 1

21

142inm

sdd

vgiii

For a balanced circuit,.

.


IZHAL ABDUL HALIN

Hybrid modelDiode resistance

T - model

Various small signal models areused to obtain the formula for rout.This value is used to ultimately predictthe gain, AVDM.

Obtaining the Output Resistance.Differential Mode Voltage Gain, AVDM Calculation Through Small Signal Model


IZHAL ABDUL HALIN

Differential Amp SSM

x

xout i

vr

1. The output resistance is defined as

2. The output current ix is given as

4321 xxxxx iiiii

3. The current ix1 is given as

41

ds

xx r

vi

Obtaining the Output Resistance.



IZHAL ABDUL HALIN

Differential Amp SSM

4. The current ix2 is written as

)||( 2122

ssds

xx rrr

vi

212 || ssds rrr Since ,

22

ds

xx r

vi



IZHAL ABDUL HALIN

Differential Amp Simplified SSM

5. Currents at node x is written as

212 ssx iii Note that the inputs are equal (bothgrounded) and the input transistorsare identical. Current ix2 splits evenlythrough rs1 and rs2.

2

21 2 ds

xss r

vii

M3 & M4 form a current mirror

ix3 cancels ix4.

32154 xssxx iiiii



IZHAL ABDUL HALIN

Differential Amp Simplified SSM

6. From the predefined rout equation

214321 xx

x

xxxx

x

x

xout ii

v

iiii

v

i

vr

42

42

24

)(

dsds

dsdsx

x

ds

x

ds

x

xout

rr

rrvv

r

v

r

vv

r

4242

42 || dsdsdsds

dsdsout rr

rr

rrr

)||( 421 dsdsmVDM rrgA 7. Finally. The gain Av is obtained as

.

.



IZHAL ABDUL HALIN

)||( 421 dsdsmVDM rrgA

.

From the gain equation, Av depends on transistors M1, M2 and M4.

)( tnGSoxnm VVL

WCg

Doxnm IL

WCg 2

Dsato I

r1

2)(2 tnGSoxnD VV

L

WCI

Some useful equations for designing the differential amp…



IZHAL ABDUL HALIN

Common Mode Voltage Gain, AVCM Calculation Through Small Signal Model

Since all currents, input & output are similar, the diff. ampis simplified to a half circuit


IZHAL ABDUL HALIN

Common Mode Voltage Gain, AVCM Calculation Through Small Signal Model

From the half circuit,

3

1

,

2

1

2

1m

SSm

CMinout gR

g

vv

3

1

, 2

1

2

11

mSS

m

CMin

outVCM gR

gv

vA

3

1

1

1211

m

m

SSm gg

Rg

3

1

121

1

m

m

SSmVCM g

g

RgA


IZHAL ABDUL HALIN

Common Mode Rejection Ratio (CMRR)

VCM

VDM

A

ACMRR

CMRR is the ratio that a differential amplifier amplifies differential signals to common mode signals.

1

31421 21)||(

m

mSSmdsdsm g

gRgrrgCMRR

SSmdsdsm RgrrgCMRR 1423 21)||(

1. CMRR is defined as .


IZHAL ABDUL HALIN

Common Mode Input to Differential Mode Output Gain, ACM-DM.

Variations in differential output due to input common mode signal is caused by transistorM5 which is non-ideal and exhibits a finite output resistance.


IZHAL ABDUL HALIN

)( ,11 PCMinmD VvgI

SSDDSSSSP RIIRIV )( 21

SSPCMinmPCMinmP RVvgVvgV ))()(( ,2,1

SSPCMinmm RVvgg ))(( ,21 SSPmSSCMinmSSPmSSCMinm RVgRvgRVgRvg 2,21,1

SSCMinmSSCMinmSSPmSSPmP RvgRvgRVgRVgV ,2,121

SSmmCMinSSmmP RggvRggV )())(1( 21,21

))(1(

)(

21

21,

SSmm

SSmmCMinP Rgg

RggvV

1. SSM yields &

2.

)( ,22 PCMinmD VvgI



IZHAL ABDUL HALIN

3. Substitute VP

DSSmm

SSmmCMinSSmmCMinm R

Rgg

RggvRggvg

))(1(

)())(1(

21

21,21,2

DSSmm

SSmmCMinSSmmCMinCMinm R

Rgg

RggvRggvvg

))(1(

)())(

21

21,21,,2

DSSmm

SSmmCMinSSmmCMinCMinm R

Rgg

RggvRggvvg

))(1(

)())(

21

21,21,,2

))(1( 21

,2

SSmm

CMinDmout Rgg

vRgv

DPCMinmout RVvgv )( ,2

DSSmm

SSmmCMinCMinmout R

Rgg

Rggvvgv

))(1(

)(

21

21,,2



IZHAL ABDUL HALIN

4. Similarly, .))(1( 21

,1

SSmm

CMinDmout Rgg

vRgv

5. Differential output signal is .))(1(

)(

21

,21

SSmm

CMinDmmoutout Rgg

vRggvv

))(1( 21, SSmm

Dm

CMin

outDMCM Rgg

Rg

v

vA

6. Common mode to differential mode conversion ratio.

This equations evaluates the conversion of input common mode variations to a differential error.



IZHAL ABDUL HALIN

21 DDSS III 1.

2)( tnGSoxnSS VVL

WCI 2.

3. Since ID1 =ID2=0.5ISS

tn

oxn

DCMin V

L

WC

Iv

1

1,

2

The common mode input level is the voltage level applied to the input transistors thatassures they work in the saturation region.

Input Common Mode Range.


IZHAL ABDUL HALIN

tnGSDS VVV 55

The lower transistors M1 and M5 determine vin,CM(min)

1. M5 operates in saturation mode when

M1 operates in saturation mode when tnGSDS VVV 11

2. Analyzing M1’s saturation mode condition,

tnGSDS VVV 11

tnGStnDSCMin VVVVv 15(min), )(

15(min), )( GSDSCMin VVv

15(min), )(( GStnGSCMin VVVv

15(min), )( GStnGSCMin VVVv

Input Common Mode Range, Lower Limit (vin,CM (min))


IZHAL ABDUL HALIN

The input transistor M1 vin,CM(max)

1. As vin,CM rises, vout falls and M1 enters the linear

region when .tnGSDS VVV 11

From the circuit, this condition is written as

tnCMinout Vvv (max), tnoutCMin Vvv

(max),

2. Since the drain-source resistance of M5 & M3 is RSS & RD , respectively

tnDSSDDtnout VRIVVv

2

1

tnDSSDDCMin VRIVv

2

1(max),

Input Common Mode Range, Upper Limit (vin,CM (max))


IZHAL ABDUL HALIN

Slew Rate

Slew Rate (SR) is defined as the maximum rate of change of the output voltagefor a step input.

t

vSR out

12

05

ttSR

34

50

ttSR

Positive SR Negative SR


IZHAL ABDUL HALIN

Slew Rate

L

D

C

ISR 5

SR is dependant on input voltage level. It is best toanalyze SR using a step input that changes betweenground and VDD.

Measurement set-upSchematic view


IZHAL ABDUL HALIN

Input Offset Voltage

Input Offset Voltage, VOS The difference in input voltage that causes vout=0.


IZHAL ABDUL HALIN

Frequency response

Open loop voltage gain, AVO

in

outV v

vA log20

Closed loop voltage gain, AVC

LoutdB Cr

13


IZHAL ABDUL HALIN

Suggested Reading

1. Razavi, B., Design of Analog CMOS Integrated Circuits, McGraw-Hill,New York, 2000.

(Section 3.2.5, Section 4.2, Section 4.3, Example 4.3, Example 5.5, Section 5.3).`

2. Carusone, T.C., John, D.A. and Martin, K., Analog Integrated Circuit Design, John Wiley & Sons, New York, 2001.

(Section 3.8).

3. Anything good on differential amplifiers

Documents

class 3-differential amp (1).pptx