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CMS FED Testing Update 31-05-2002 M. Noy Imperial College Silicon Group

CMS FED Testing

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CMS FED Testing. Update 31-05-2002 M. Noy Imperial College Silicon Group. DAC Evaluation board. LVDS. UTP. LVTTL. SEQSI. UTP. VME. Opto-Tx. I2C control. I2C master. Optical Fibre. 8 bit oscilloscope. Coax. Opto-Rx. GPIB. PC. CMS FED Testing. Currently:. - PowerPoint PPT Presentation

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Page 1: CMS FED Testing

CMS FED TestingUpdate 31-05-2002

M. Noy

Imperial College

Silicon Group

Page 2: CMS FED Testing

CMS FED Testing

Currently:

SEQSI LVDS LVTTLDAC

Evaluation board

UTP

UTP

Opto-Tx

Optical FibreOpto-

Rx

I2C master

I2C control

Coax8 bit oscilloscope

GPIB

VME

PC

LVDSLVTTLLine driver +

(optional) level shift

Network

I2C slave

Page 3: CMS FED Testing

CMS FED Testing Picture of the DAC evaluation board

DAC

Line driver

UTP out

LVTTL data in, from level

converter

Page 4: CMS FED Testing

CMS FED Testing Picture of the key link components

Opto-Tx Opto-Rx

I2Ccable

Single ended output

to scope

UTP from DAC/line

driver

Optical fibre

Page 5: CMS FED Testing

CMS FED Testing

DAC

scope

UTPUTP

Vout

Opto-TxDAC Evaluation Board Line driver

Opto-Rx

101110110101

Page 6: CMS FED Testing

CMS FED TestingSignal before the link

200mV (V+-V- =400mV ) differential signal with no offset.higher bandwidth ringing and faster rise/fall time.Time scale is relative to the scope trigger point on all plots.

Page 7: CMS FED Testing

CMS FED TestingSignal after the link

Single ended, with offset.No ringing but slower rise/fall times

Page 8: CMS FED Testing

CMS FED Testing

Signal noise/jitter after the link

Note:no scale on the width of the line. This is an impression of the infinite persistence scope trace => spread unknown. (Measurements are real).

Page 9: CMS FED Testing

CMS FED TestingRise time, 10% to 90% of full scale.

Page 10: CMS FED Testing

CMS FED TestingFall time 90% to 10% of full scale

Page 11: CMS FED Testing

CMS FED TestingLinearity: link is being operated in the linear region of the Tx/Rx

Settings: x0, x1, x2, x3, x4, x5=0,0,0,0,1 (recommended by CERN)

000 01

Page 12: CMS FED Testing

CMS FED TestingSample APV25 pair of multiplexed frames with simulated 1 MIP signal

Page 13: CMS FED Testing

CMS FED TestingMultiplexed APV25 header with zero pipeline address

6 start bitspipeline

address (16 bits)

2 error bits2x12x25ns bits =

Page 14: CMS FED Testing

CMS FED TestingZoom in of the 1 MIP signal upon its pedestal

Approx:

Pedestal value here is 509 lsbs, 4096 levels in 405mV0.099mV/lsb

1 MIP 4096/8=512 lsbs

Total signal=570+(405/4096)*(509+512)=570+0.099*1021=671mV

Page 15: CMS FED Testing

CMS FED Testing

Summary

Have a complete working single fibre, possible to drive 4 with identical signals using the current Opto-Tx.

Possible to obtain a further 2 of the 4 channel prototypes from CERN complete 12 channels could in principle be driven with identical signals.

Work is in progress to produce an application specific version of the SEQSIsimpler operationlonger RAM pipelineclean/synchronous stop from VMEpossible stepping through

Page 16: CMS FED Testing

Future Work

Have 1 (untested) Opto-Rx emulator to drive the analogue stage of the FED directly over copper (I.e. eliminating the optical link)

Temperature: have observed significant temperature variation of the signal =>Define the laser temperature stability requirements for testing

Verify DAC Linearity: Summer student

More thought into a test vectors and their comparison with the FED output

CMS FED Testing