Communcation Lab Manual Electronics

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SRM UNIVERSITY DELHI-NCR CAMPUS MODINAGAR

Department of Electronics & Communication Engineering

LABORATORY MANUAL

Communication Lab (EC 0323)

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SRM UNIVERSITY NCR CAMPUS MODINAGAR

Department of Electronics & Communication Engineering

List of Experiments

Sl No Experiment Name Page

No

1 To study Analog to digital Conversion / Pulse Code Modulation 03

2 To study Delta modulation 07

3 To study adaptive delta modulation 11

4 To study Delta sigma modulation and demodulation 15

5 To study frequency shift keying 18

6 To study Phase shift keying 22

7 To study amplitude shift keying 26

8 To study time division multiplexing 29

9 To study Frequency division multiplexing 34

10 Communication link analysis 37

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Experiment No-1 Analog to digital conversion

Aim: To study analog to digital conversion of signal

Equipment required: 1. One ADC trainer with power supply cord. 2. One CRO / DSO.

3. Connecting probe.

Theory: Pulse Code Modulation technique involves following steps:

(a) Sampling:

The analog signal is sampled according to the nyquist criteria. The nyquist criteria states that for faithful reproduction of a band limited signal, the sampling rate must be at least twice the

highest frequency component present in the signal. So sampling frequency 2 fm, where fm is

maximum frequency component present in the signal. Practically the sampling frequency is kept slightly more than the required rate.

(b) Quantization and allocation of binary codes:

Converting discrete signal to digital signal is called quantization and it is generally carried out by the A/D Converter as shown in Fig: 1.

Each binary word defines a particular narrow range of amplitude level. The sampled value is then approximated to the nearest amplitude level. The sample is then assigned a code corresponding to the amplitude level, which is then transmitted.

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Fig: 1

Block Diagram:

Fig 2.1

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Fig: 2.2

Procedure:-

A. Initial set up for trainer ST2103:

Mode Switch Position: FAST position Function generator setting:

DC l & DC 2 amplitude controls: fully clockwise direction. 1 KHz & 2 KHz signal levels: 10 V peak -peak. Pseudo random sync code generator switch: OFF position Error check code selector switches A & B : A = 0 & B =0 Position ('Off' Mode). All switched faults: OFF position.

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1. Connect on ST2103: as shown in figure 2.1 a. DC l output to CH 0 input b. DC 2 output to CH 1 input

2. Turn On the power. With the help of digital voltmeter / oscilloscope, adjust the DC l amplitude control until the DC 1 output measures 0V: The accuracy should be within +/-20mV. Turn the DC 2 amplitude control, fully counter clockwise. 3. Observe the output on the A/D converter block LEDs (D0 to D6). The LEDs represent the state of the binary PCM word allocated to the PAM sample being processed. An illuminated LED represent a '1' state, while non illuminated LED indicates a '0' state. D6 is the MSB & D0 is the LSB. The LED output looks as follows. D6 D5 D4 D3 D2 D1 D0 1 0 0 0 0 0 0. This output is the digital representation of 0V input to CH 0

4. Adjust the DC1 amplitude control clockwise to increase the amplitude & anticlockwise to decrease it. Try varying the DC input from + 5V to - 5V in steps of 1V. Take care that the input value is within the specified range of +/- 20mV. Observe that the output for +5V is as follows: D6 D5 D4 D3 D2 D1 D0 1 1 1 1 1 1 1

Where for the negative values it is less than 1000000 for -5V the output is as follows D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 0 This is obtained at the approximately full anti-clockwise position of the DC Control. 5. Turn the DC 1 control fully anti-clockwise and repeat the above procedure by varying DC 2 control. Check that the digital code for the set voltage value is identical to that of the DC 1 setting. Once again take the precaution of maintaining the set input within +/- 20mV range of the specified voltage.

6. Switch 'Off' the trainer. Disconnect the DC 1 & DC 2 supply from CH 0 & CH 1. Connect ~1 KHz signal to CH 0 & 2 KHz signal to CH 1 input as shown in figure 2.2.

7. Trigger the dual trace oscilloscope externally by the CH 1 signal available at TP12. Observe the signal at CH 0 & CH 1 sample output (TP5) with reference to the SC Signal (TP7) on the second trace. Give a special attention to the phase relation between the two signals. 8. Now connect the oscilloscope channel 1 to CH 1 sample (TP6) sketch the three waveforms with utmost importance to the relationship between the three waveforms. 9. Connect oscilloscope channel 1 input to SC test points (TP7) & oscilloscope channel 2 input to EC test point (TP8). Observe the phase relation between the two SC & EC test point. Notice that EC goes high at the end of conversion & remains latched until next SC Pulse.

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Experiment No-2 Delta Modulation and Demodulation

Aim:-

To study the operation of Delta Modulation and Demodulation

Apparatus Required:-

1. One Delta Trainer Kit. 2. One CRO / DSO 3. Connecting Probes.

Theory:-

Delta modulation is the DPCM technique of converting an analog message signal to a digital sequence. The difference signal between two successive samples is encoded into a single bit code. The block and kit diagrams show the circuitry details of the modulation technique. A

present sample of the analog signal m(t) is compared with a previous sample and the difference output is level shifted, i.e. a positive level (corresponding to bit 1) is given if difference is positive and negative level (corresponding to bit 0) if it is negative. The comparison of samples is accomplished by converting the digital to analog form and then comparing with the present

sample. This is done using an up counter and DAC as shown in block diagram. The delta modulated signal is given to up counter and then a DAC and the analog input is given to OPAMP and a LPF to obtain the demodulated output.

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Block Diagram:-

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Procedure:-

1. Connect the 1 KHz signal given and the trainer to the input of INPUT BUFFER SECTION block with 2Vp-p amplitude.

2. Choose the sampling frequency with the help of reset switch given above the clock

generator section.

3. The sampling frequency selected is indicated by the LED of corresponding frequency. 4. Connect the output of INPUT BUFFER SECTION to the input of DELTA

MODULATOR section.

5. Connect CH1 of CRO at the Delta Modulator O/P. 6. Now Switch ON the Trainer. 7. Observe the output of Delta Modulator on CRO. 8. Connect the output of DELTA MODULATOR to the input of DELTA

DEMODULATOR section. 9. Connect the output of DELTA MODULATOR to the 4th ORDER FILTER section. 10. Adjust the CRO and compare both input and output signals.

Model Waveform:-

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Result: - Delta modulator and demodulator output graph has been verified in DSO and its output waveform shown in below figure.

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Experiment No-3 Adaptive Delta Modulation and Demodulation

Aim:-

To study the operation of Adaptive Delta Modulation and Demodulation


1. One Adaptive Delta Trainer Kit. 2. One CRO / DSO. 3. Connecting Probes.

Theory:-

As it has seen, delta modulation system is unable to chase the rapidly changing information of the analog signal which gives rise to distortion and hence poor quantity reception. This is known as slope overloading phenomenon. The problem can be overcome by increasing

the integrator gain (i.e. step-size). But using high step-size integrator would lead to high quantization noise.

Quantization Noise:-

It is defined as error introduce between the original signal and the quantized signal due to the fixed size in which the signal (quantized) is incremented. As the error is random in nature and hence unpredictable, it can be treated as noise. High quantization noise may play havoc on small amplitude signals. The solution to this problem is to increase the integrator gain for fast changing input & to use normal gain for small amplitude signals.

The basic idea is to increase the integrator the integrator gain (it is double on this trainer) when slope overload occurs. If still it is unable the signal, the integrator gain is double again. The integrator on board has four available gain standard, standard X2, standard X4, standard X8. The integrator thus adopts itself to the given where its lowest value can just overcome the slop overloading effect.

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Block Diagram:-

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Procedure:-

1. Connect the 1 KHz signal given an the trainer to the input of INPUT BUFFER SECTION block with 2Vp-p amplitude.

2. Connect the output of INPUT BUFFER to the input of CVSD MODULATOR block.

CVSD stands for Continuously Variable Stope Delta or Adaptive delta. 3. Choose the sampling frequency with the help of reset switch given above the signal

source.

4. The sampling frequency selected is indicated by the LED of corresponding frequency.

5. Connect CH1 of CRO at the CVSD MODULATOR. 6. Now Switch ON the Trainer. 7. Observe the output of Adaptive Delta Modulator on CRO. 8. For demodulator connect the output of CVSD MODULATOR section to the input of

CVSD DEMODULATOR block. 9. Connect the output of CVSD DEMODULATOR to the input of OUTPUT BUFFER. 10. Connect the output of OUTPUT BUFFER to the input of 4th ORDER FILTER. 11. Observe the output of Adaptive Delta Demodulator on CRO. 12. Adjust the CRO and compare both input and output signals.

Model Waveform:-

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Result: - Adaptive Delta modulator and demodulator output graph has been verified in DSO and its output waveform shown in below figure.

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Experiment No-4 Sigma Delta Modulation and Demodulation

Aim:-

To study the operation of sigma delta modulation and demodulation.


1. One Sigma Delta Trainer Kit. 2. One CRO / DSO 3. Connecting Probes.

Theory:-

Delta-sigma (,or sigma-delta, ) modulation is a method for encoding analog signals into digital signals or higher-resolution digital signals into lower-resolution digital signals.

The conversion is done using error feedback, where the difference between the two signals is measured and used to improve the conversion. The low-resolution signal typically changes more quickly than the high-resolution signal and it can be filtered to recover the high-resolution signal with little or no loss of fidelity.

Delta-sigma modulation converts the analog voltage into a pulse frequency and is alternatively known as Pulse Density modulation or Pulse Frequency modulation. In general, frequency may vary smoothly in infinitesimal steps, as may voltage, and both may serve as an analog of an infinitesimally varying physical variable such as acoustic pressure, light intensity,

etc. The substitution of frequency for voltage is thus entirely natural and carries in its train the transmission advantages of a pulse stream. The different names for the modulation method are the result of pulse frequency modulation by different electronic implementations, which all produce similar transmitted waveforms.

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Block Diagram:-

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Procedure:-

1. Connect the 1KHz signal given an the trainer to the input of DELTA SIGMA MODULATOR block with 2Vp-p amplitude.

2. Choose the sampling frequency with the help of reset switch given above the signal

source.

3. The sampling frequency selected is indicated by the LED of corresponding frequency. 4. Keep the switch on at 256 KHz sampling clock. 5. Now Switch ON the Trainer. 6. Observe the output of DELTA SIGMA MODULATOR on CRO. 7. For demodulator connect the output of CVSD MODULATOR section to the input of

CVSD DEMODULATOR block. 8. Connect the output of DELTA SIGMA MODULATOR to the input of DELTA

SIGMA DEMODULATOR block. 9. Observe the output of DELTA SIGMA DEMODULATOR on CRO. 10. Adjust the CRO and compare both input and output signals. 11. Connect the output of DELTA SIGMA DEMODULATOR to the input of 4th ORDER

FILTER block.

Result:- Delta sigma modulator and demodulator output graph has been verified in DSO and its output waveform shown in below figure.

Output Waveform:-

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Experiment No-5 FSK Modulation and Demodulation

Aim:- To study the operation of Frequency-Shift Keying modulation and to reconstruct the signals at the receiver using PLL.

Apparatus Required:- 1. One FSK Trainer Kit. 2. One CRO / DSO

3. Connecting probes.

Theory:-

In frequency shift keying (FSK) modulation techniques, the modulated output shifts between two frequencies for all 1 to 0 transitions. The carrier frequency for FSK modulation is greater than twice the modulating frequency. The FSK modulator is built around the 2 to 1 multiplexer which switches between the two signals for all 1 to 0 transitions.

FSK demodulator employs PLL logic for the recovery of data. The digital phase locked loop forms the heart of this logic. The PLL center frequency and lock range are fixed. Thus the phase detector output at the PLL directly gives the detected data.

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Block Diagram for FSK modulation:-

Procedure for FSK Modulation:-

1. Make connection as given in the figure.

2. Connect CH1 of CRO at SERIAL DATA o/p and CH2 at FSK OUTPUT. 3. Adjust the CRO settings to get the waveforms stable. 4. Observe the waveform. Frequency will High and Low at level 1 and 0

respectively.

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Block Diagram for FSK demodulation:-

Procedure for FSK Demodulation:-


2. Connect CH1 of CRO at the output of FSK modulator. 3. Adjust the CRO settings to get the waveforms stable. 4. Observe the waveform. Frequency will High and Low at level 1 and 0

respectively.

5. Now connect CH2 of CRO at the output of FSK Demodulator. 6. The output waveforms will same as input but having a phase difference. 7. Now change the data bits with the help of DIP switch. 8. See the effect of change in the word.

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Model waveforms:-

Result:- FSK modulator and demodulator output graph has been verified in DSO and its output waveform shown in below figure.

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Experiment No-6 PSK Modulation and Demodulation

Aim:-

To study the operation of Phase-Shift Keying modulation and Demodulation

Apparatus Required:- 1. One PSK Trainer Kit. 2. One CRO / DSO 3. Connecting probes.

Theory:-

PSK is a digital modulation scheme that conveys data by changing or modulating the phase of a reference signal (the carrier wave).

Any digital modulation scheme uses a finite number of distinct signals to represent digital data. In the case of PSK, a finite number of phases are used. Each of these phases is assigned a unique pattern of binary bits. Usually, each phase encodes an equal number of bits. Each pattern of bots forms the symbol that is represented by the particular phase. The demodulator, which is

designed specifically for the symbol-set used by the modulator, determines the phase of the received signal and maps it back to the symbol it represents, thus recovering the original data. This requires the receiver to be able to compare the phase of the received signal to a reference signal such a system is termed coherent.

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Block Diagram for PSK modulation:-

Procedure for PSK Modulation:-


2. Connect CH1 of CRO at the SERIAL DATA O/P and CH2 at PSK O/P terminal. 3. Adjust the CRO for triggering to view the waveforms. 4. The output is not very clear due to very high input frequency. 5. Adjust the CRO and observe both input and output signals.

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Block Diagram for PSK demodulation:-

Procedure for PSK demodulation:-


2. Connect CH1 of CRO at the output of PSK modulator. 3. Adjust the CRO settings to get the waveforms stable. 4. Now connect CH2 of CRO at the output of PSK Demodulator. 5. There may be some flickering in output signal due to very high input frequency. 6. Adjust the CRO and compare both input and output signals. 7. Now change the data bits with the help of DIP switch. 8. Observe the effect of change in input binary code in the PSK modulated O/P

waveform.

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Model Waveform:-

Result: - PSK modulator and demodulator output graph has been verified in DSO and its output waveform shown in below figure.

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Experiment No-7 Amplitude Shift Keying

Aim:

To study the operation of Amplitude Shift Keying modulation and Demodulation

Apparatus Required:

1. One ASK Kit. 2. One CRO / DSO. 3. Connecting Probes.

Theory: In amplitude Shift keying, logic levels are represented by different amplitudes of signals. Usually,

one amplitude is zero for logic digital logic zero while is logic 1 represented by the actual amplitudes of some sine wave signal. Fig 1 shows the expected waveforms in ASK. Vd (t) is the message signal at the control input of a switch. Vc (t) is the carrier signal at the input of the switch. Vask (t) is the output of the switch.

Note that the ASK signals envelopes are the same shape as the data stream (although the lower envelope is inverted). Recovery of the original data at the receiving end can be implemented using a simple envelope detector and filter.

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Block Diagram:-

Procedure:-

1. Connect the AC supply to the kit. 2. Ensure that all faults are in normal position.

3. Make connections and settings as shown in block diagram. 4. Connect S-CLOCK and S-DATA generated on ACT-07T to coding clock and input data

respectively by means of the patch chords provided.

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5. Connect the NRZ-L data to the control input of the carrier modulator logic. 6. Connect carrier component SIN-1 to INPUT-1 and ground the INPUT-2 of the carrier

modulator logic.

7. Switch on the power. 8. Connect ASK modulated signal modulated output on ACT-07T to the ASK input of the

ASK demodulator on ACT-07R. 9. Observe various waveforms and plot it on the paper.

Result:

ASK modulator and demodulator output graph has been verified in DSO.

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Experiment No-8 Time Division Multiplexing

Aim:-

To study the operation of Time Division multiplexing and demultiplexing.

Objective:- To study Time Division Multiplexing and Demultiplexing using Pulse Amplitude Modulation and Demodulation and to reconstruct the signals at the receiver using filters.

Apparatus Required:- 1. One TDM Trainer Kit. 2. One CRO / DSO. 3. Connecting probes.

Theory:-

One of the greatest benefits to be derived from sampling is that of Time Division Multiplexing (TDM) by inter-leaving samples of several source waveforms in time, it if possible to transmit enough information to a receiver, via only one channel to recover all message

waveforms. This process if called Time Division Multiplexing (TDM). The conceptual implementation of the time multiplexing of N similar message fn (t) n=1, 2, N is illustrated in figure-2. Sampled signals (Pulse Trains) for messages f1 (t) and f2 (t) are shown in 1-a, 1-b. The Pulse Train of 1-b is delayed slightly from the train of 1-a to prevent overlap. Other messages are treated similarly. When such N total Pulse Trains are combined, i.e., multiplexed, the waveform

of 1-c is obtained. The time allocated to one sample of one message is called a Time Slot. The time interval over which all message are sampled attest once is called a Frame.

The Portion of the Time Slot not used by any of the Sample Pulse is called the guard

Time. In a practical system, some Time Slots may be allocated to other function like signaling, Monitoring, Synchronization etc.

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Synchronisation:- To maintain proper positions of sample pulses in the multiplexer, it is necessary to

synchronise the sampling process, because the sampling operations are usually electronics, there

is typically a clock pulse train. That serves clock synchronization can be derived from the received waveforms by observing the pulse sequence over many pulses and averaging the pulses (in a closed loop with the clock derived on the Voltage Controlled Oscillator).

Clock Synchronization does not guarantee that the proper sequence of samples is synchronized. Proper alignment of the Time slot sequence requires Frame Synchronization. Hence one or more time slots per frame may be used to send synchronization information. For example, placing a special Pulse that larger amplitude than the largest expected message

Amplitude in TIME SLOT-1, the start of a Frame can easily be identified using a suitable Threshold Circuit.

Block Diagram:-

Fig 1: Block diagram of TDM Tx & Rx

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Procedure:-

1. Connect Power Supply in proper polarity to the kit and switch on.

2. Connect the 250 Hz, 50 0Hz, 1 KHz and 2 KHz sine wave signal to the multiplexer input channel CH0, CH1, CH2, CH3 by means of the patch-cords provided.

3. Connect the multiplexer output TXD of the transmitter section to the demultiplexer input RXD of the receiver section.

4. Connect the sampling clock TX CLK and Channel identification clock TXCH0 of the transmitter section to the corresponding RX CLK and RX CH0 of the receiver section respectively.

5. Set the amplitude of the input sine wave as desire. 6. Take observations as mentioned below.

Observations:-

Observe the following waveforms on DSO (CRO) and plot it on the Graph paper. 1. Input Channel CH0, CH1, CH2, CH3. 2. Sampling Clock TX CLK and RX CLK. 3. Channel Identification Signal TX CHO and RX CHO.

4. Multiplexer Output TXD. 5. Demultiplexer Input RXD. 6. Reconstructed signal CH0, CH1, CH2, CH3.

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Model Waveforms for a given input Channel:-

Figure:-2 Time Division Multiplexing of natural sampled message. Pulse Trains of: (a) Message 1, (b) Message 2 and (c) The Multiplexing Train

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Result:-

In this experiment, the transmitter clock and the channel identification clock are directly linked to the receiver section. Hence transmitter and receiver are synchronized and proper

reconstruction of the signal is achieved. The output waveform has been verified in DSO and its output waveform shown in below figure.

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Experiment No-9 Frequency Division Multiplexing/ de-multiplexing

Aim: Study of the Frequency Division Multiplexing/ de-multiplexing with sinusoidal wave.


1. One FDM kit. 2. One CRO / DSO.

3. Patch cords

Theory:

The deriving of two or more simultaneous, continuous channels from a transmission

medium by assigning a separate portion of the available frequency spectrum to each of the individual channels is known as FDM. It is possible by simultaneous transmission of multiple separate signals through a shared medium (such as a wire, optical fiber, or light beam) by modulating, at the transmitter. These separate signals have separable frequency bands and by

adding those results linearly either before transmission or within the medium. While thus combined, all the signals may be amplified, conducted, translated in frequency and routed toward a destination as a single signal. This technique is cost effective, which are the motivation for multiplexing. Apparatus at the receiver separates the multiplexed signals by means of frequency

passing or rejecting filters, and demodulates the results individually, each in the manner appropriate for the modulation scheme used for that band or group. Neither the transmitters nor the receivers need be close to each other; ordinary radio, television, and cable service are examples of FDM. It was once the mainstay of the long distance telephone system. The more recently developed time division multiplexing in its several forms lends itself to the handling of

digital data, but the low cost and high quality of available FDM equipment, especially that intended for television signals, make it a reasonable choice for many purposes. Frequency division multiplexing is the process of combining several information channels by shifting their signals to different frequency groups within the frequency spectrum so that they can all be

transmitted over a common transmission channel.

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Block Diagram:-

Procedure:-

1. Set the modulating frequency of ch 1 with the help of potentiometer to 2 KHz and ch 2 to 4 KHz.

2. Observe the carrier frequency 100 KHz and 200 KHz on the oscilloscope. 3. Connect the ch 1 output to left input of modulator ch 1. 4. Repeat step 3 for ch 2 also. 5. Connect carrier generator outputs (100 KHz and 200 KHZ) to CH 1 and CH 2 respectively. 6. Observe the modulator output on oscilloscope. 7. Connect the modulator output of ch 1 and ch 2 to adder circuit. 8. Connect the adder output to demodulator inputs in both the sections. 9. Connect the respective carrier frequency to demodulator second input. 10. Connect the output of demodulator of ch 1 and ch 2 to LPF 1 and LPF 2.

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11. Observe the output of low pass filter on the scope and compare it with the modulating signal.

Result:

FDM modulator and demodulator output graph has been verified in DSO. During the process of frequency division multiplexing and de multiplexing of signals both the signals are as same as applied at input.

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Experiment No-10 Communication Link Analysis

Aim: To understand the concept of communication link between the transmitter and receiver with general purpose antenna

Apparatus Required: 1. Klystron power supply

2. Isolator

3. Klystron mount 4. Variable attenuator

5. Frequency meter 6. VSWR meter 7. Coupling probes 8. Two antennas

9. Radiation pattern turn tube Theory:

Radiation pattern of an antenna is a three dimensional graph which shows the variation in actual field strength of electromagnetic field at all points which are at equal distance from the

antenna. Different parts of radiation pattern are referred to as lobes. These may be classified as: (i) Major lobe: It is the radiation lobe containing the direction of maximum radiation. (ii) Minor lobe: These lobes represent radiation in undesired directions and they should be minimized. All lobes except the major lobes come under this category. (iii) Side lobe: It is a radiation lobe other than the intended lobe, normally adjacent to main lobe and occupies hemisphere in direction of the main lobe. These are usually largest of minor lobes. (iv) Back lobe: Normally refers to a minor lobe that occupies the hemisphere in a direction opposite to that of the major lobe. One of the most fundamental equations in antenna theory is the Friis Transmission Equation. The Friis Transmission Equation is used to calculate the power received from one antenna (with gain G1), when transmitted from another antenna (with gain G2), separated by a distance R, and operating at frequency f or wavelength lambda.

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Block Diagram:

Procedure: 1. Switch on the power supply keeping the switch in front panel in beam off position.

2. Wait for few minutes and then switch on the beam position. 3. Set the beam voltage in the range 250-260 v. 4. Check the beam current, whether it is less than 15 mA (or) not. 5. Set the variable attenuation to maximum attenuator level. 6. Now set the modulatory frequency at 9 GHz. 7. Now change the reflected voltage and check the maximum o/p position of horn antenna

for proportional o/p voltage. 8. Now change the reflected voltage and note down the corresponding output proportional

voltage from CRO.

9. Now change the horn antenna from 180 degree to clockwise and anticlockwise. 10. By step of 5 degree and note the corresponding amplitude of proportional voltage on

CRO.

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Result:

The communication link analysis has been studied.

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0 50 100 150 200 250

Radian Angle (in degree)

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Communcation Lab Manual Electronics