-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 C
SCHEMATICS MB A5122Custom
1 38Monday, September 20, 2010
2009/04/07 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 C
SCHEMATICS MB A5122Custom
1 38Monday, September 20, 2010
2009/04/07 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 C
SCHEMATICS MB A5122Custom
1 38Monday, September 20, 2010
2009/04/07 2012/10/21Compal Electronics, Inc.
Intel Pine View Processor/ Tiger point
LA-5122P Schematics Document
REV: 1.0
Compal Confidential
2010-03-30
Buffalo 10BL
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
2 38Monday, September 20, 2010
2009/04/07 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
2 38Monday, September 20, 2010
2009/04/07 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
2 38Monday, September 20, 2010
2009/04/07 2012/10/21Compal Electronics, Inc.
File Name : LA-5122P
Touch Pad
page 19
Compal Confidential
Int.KBD page 23
ALC259-GR
DMI x 2
Intel Pineview-M
Low Power Clock GeneratorICS9LVRS387AKLFT MLF
page 22
Fan Control
202pin DDRII-SO-DIMM
SPI ROM
page 6
1.8V DDRIII 667page 5,6,7
page 23
HDA Codec
page 8
Memory BUS(DDRII)
page 24
Tiger Pointer
Thermal Sensor
page 9
page 10,11,12,13
page 24
ENE KB926 E0
LED Conn.
Model Name : PAV10
page 15
page 18SATA HDD&SSD
EMC1402
(22x22mm)
5V 1.5GHz(150MB/s)SATA port 0
HD Audio 3.3V 24.576MHz/48Mhz
PCIe 1x [2,4]
L
P
C
B
U
S
3
.
3
V
3
3
M
H
z
USB5V 480MHz
RJ45 RTL8105E 10/100Mpage 21page 21
PCIe 1x
PCIe port 3
page 23Debug Port
RTS5138 2IN1
page 14
USB5V 480MHz
1.5V 2.5GHz(250MB/s)
1.5V 2.5GHz(250MB/s)
USB port 0,1,4USB Conn X3
Power Circuit DC/DC
page 25
RTC CKT.page 16
page 26~32
DC/DC Interface CKT.
HP CONN SPK CONNMIC CONNMIC CONNInt.
PCIeMini Card WiMax
PCIeMini Card WLAN
USB port 6
PCIe port 6page 16
page 16 USB port 7page 18
Int. Camera
CRT Conn.
(17x17mm)
Power/B page 24
Card Reader
page 17
page 20 page 20 page 20 page 20
LVDSONE CHANNEL
page 21
USB5V 480MHz
USB port 3
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
TOP_out
TOP_in
TOP_L TOP_R
TOP_SL TOP_SR
1TOP
1VCC
1IN1
1IN2
1GND
1BOT
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
3 38Monday, September 20, 2010
2009/04/07 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
3 38Monday, September 20, 2010
2009/04/07 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
3 38Monday, September 20, 2010
2009/04/07 2012/10/21Compal Electronics, Inc.
ON
SLP_S3#
S5 (Soft OFF)
S4 (Suspend to Disk)
S3 (Suspend to RAM)
LOW
ONON
ON
ON
ON
ON
ON
ON
HIGH
OFF
OFF
OFF
OFF
OFF
SLP_S4#
OFF
ON
ON
LOWLOW
LOW
OFF
OFF
SLP_S5#
HIGH
HIGH HIGH HIGH
HIGHHIGHHIGH
LOW
LOW LOW
+VALW
HIGH
+V +VS Clock
S1(Power On Suspend)
Full ON
STATESIGNAL
Address1001 010X b0001 011X b
1010 000XbDDR DIMMA
1101 001Xb
ICH7M SM Bus address
Note : ON* means that this power plane is ON only with AC power
available, otherwise it is OFF.
Address
Address
Clock Generator(SLG8SP556VTR)
Device
EMC1402
Device
EC SM Bus1 address
Smart Battery
Device
EC SM Bus2 address
ON OFF OFF
+0.75VS 0.75V switched power rail for DDR terminator
+RTCVCC RTC power
+1.5VS
+5VS
+3VS+5VALW
+1.5V
+3VALW
1.5V power rail for DDR
3.3V always on power rail
5V always on power rail3.3V switched power rail
5V switched power rail+VSB VSB always on power rail ON
ONON
ON
ON
ON OFF1.5V switched power rail
+CPU_COREON ON ON ON
G3
OFF
OFFOFF
OFFOFF
OFF
OFF
ONON
OFFOFF
OFFOFF
OFF
ON
ON
ON
OFFONOFF+5V_SB 5V power rail for SB
Voltage Rails
VINB+
+1.05VS
Adapter power supply (19V)AC or battery power rail for power
circuit.Core voltage for CPU
ON
ON OFF OFF
+3V_LAN 3.3V power rail for LAN ONON
S1 S3 S5
ON OFF
ON OFF
Power Plane Description
OFF
OFF
ON
OFF
OFF
ON
OFFON
ON
ON
OFF
ON ON ON OFF
+3V_SB 3.3V power rail for LAN
3.3V power rail for LAN ON ON
ON
ON
ON
+1.8VS 1.8VS switched power rail
VCCP switched power rail
ON
OFF
OFF OFF
OFF
OFFOFF
Function
BTOexplain
description
BTO Option Table
CAMERA & MIC
CAMERA MICCAM@ MIC@
Function
BTO
BLUE TOOTH
BT@explain
Mini PCI-E SLOT
description
WLAN@ 3GGPS@3GGPSWi-Fi WiMax
WIMAX@3G3G@
BLUE TOOTHSTAR@
STAR
POWER SAVING
+3V_WLAN
+0.89VS 0.89VS GFX support voltage OFFON OFF OFF
OFF
4/13~4/21 after PVT SMT
3/23~3/30 Before PVT SMT
4/16 Short PAD
MP@
shor 0 ohm
0 ohm no pop
CPU
MP_455@MP CPU
TR180_0402_5%
@ TR180_0402_5%
@ 1 2
TR100_0402_5%
@ TR100_0402_5%
@ 1 2
TR200_0402_5%
@ TR200_0402_5%
@ 12
TR140_0402_5%
@ TR140_0402_5%
@ 1 2
TR150_0402_5%
@ TR150_0402_5%
@ 1 2 TR170_0402_5%
@ TR170_0402_5%
@ 12
TR120_0402_5%
@ TR120_0402_5%
@ 1 2
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
4 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
4 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
4 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
B+
SN0806081RHBR
+3VALWP +-5%DESIGN CURRENT 508mA
+5VALWP +-5%DESIGN CURRENT 3010mA
TPS51117RGYR +1.05VSP +-5%DESIGN CURRENT 7301mA
ISL6261ACRZ-T +CPU_COREDESIGN CURRENT 3127mA
VR_ON
RT8209BGQW+1.5VP +-5%DESIGN CURRENT 1720mA
SYSON
SUSP#
N-CHANNELSI4800
SUSP+5VSDESIGN CURRENT 2851mA
N-CHANNELSI4800
+3VSDESIGN CURRENT 9314mASUSP
APL5331KACSUSP
+0.75VSPDESIGN CURRENT 900mA
P-CHANNELAO-3413 +LCD_VDDDESIGN CURRENT 450mAENVDD
DESIGN CURRENT 2500mA +1.5VSP
+3V_SB** SI3456BDVSBPWR_EN#
+5V_SBSBPWR_EN#
DESIGN CURRENT 250mA
DESIGN CURRENT 10mA** 2N7002DW
DESIGN CURRENT 45mA
+3V_LANWOL_EN#
** P-CHANNELAO-3413
** The SW just is reserved.The power passes by jump or0-ohm
resistor.
Buffalo Power Map
Ipeak=5A, Imax=3.5A, Iocp min=5.08A
Ipeak=5A, Imax=3.5A, Iocp min=5.2A
Ipeak=6A, Imax=4.2A, Iocp min=7.18A
Ipeak=5A, Imax=3.5A, Iocp min=5.8A
SY8033BDBCSUSP#
DESIGN CURRENT 2600mA +0.89VSP
IREF8113PBFSUSP#
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_MA0
DDR_A_MA2
DDR_A_MA4
DDR_A_MA7DDR_A_MA8DDR_A_MA9DDR_A_MA10DDR_A_MA11DDR_A_MA12DDR_A_MA13DDR_A_MA14
DDR_A_BS0DDR_A_BS1DDR_A_BS2
DDR_A_WE#DDR_A_CAS#DDR_A_RAS#
DDR_CS0#DDR_CS1#
DDR_CKE0DDR_CKE1
M_ODT0M_ODT1
DDR_A_DQS0DDR_A_DQS#0DDR_A_DM0
DDR_A_D0DDR_A_D1DDR_A_D2DDR_A_D3DDR_A_D4DDR_A_D5DDR_A_D6DDR_A_D7
DDR_A_DQS1DDR_A_DQS#1DDR_A_DM1
DDR_A_DQS2DDR_A_DQS#2DDR_A_DM2
DDR_A_DQS3DDR_A_DQS#3DDR_A_DM3
DDR_A_DQS4DDR_A_DQS#4DDR_A_DM4
DDR_A_DQS5DDR_A_DQS#5DDR_A_DM5
DDR_A_DQS6DDR_A_DQS#6DDR_A_DM6
DDR_A_DQS7DDR_A_DQS#7DDR_A_DM7
DDR_A_D8DDR_A_D9DDR_A_D10DDR_A_D11DDR_A_D12DDR_A_D13DDR_A_D14DDR_A_D15
DDR_A_D16DDR_A_D17DDR_A_D18DDR_A_D19DDR_A_D20DDR_A_D21DDR_A_D22DDR_A_D23
DDR_A_D24DDR_A_D25DDR_A_D26DDR_A_D27DDR_A_D28DDR_A_D29DDR_A_D30DDR_A_D31
DDR_A_D32DDR_A_D33DDR_A_D34DDR_A_D35DDR_A_D36DDR_A_D37DDR_A_D38DDR_A_D39
DDR_A_D40DDR_A_D41DDR_A_D42DDR_A_D43DDR_A_D44DDR_A_D45DDR_A_D46DDR_A_D47
DDR_A_D48DDR_A_D49DDR_A_D50DDR_A_D51DDR_A_D52DDR_A_D53DDR_A_D54DDR_A_D55
DDR_A_D56DDR_A_D57DDR_A_D58DDR_A_D59DDR_A_D60DDR_A_D61DDR_A_D62DDR_A_D63
M_CLK_DDR0M_CLK_DDR#0M_CLK_DDR1M_CLK_DDR#1
DDR_A_MA1
DDR_A_MA3
DDR_A_MA5DDR_A_MA6
DMI_RXP0_C
DMI_RXN0_C
DMI_RXP1_C
DMI_RXN1_C
DMI_IRCOMP
DMI_RXP0_CDMI_RXN0_CDMI_RXP1_CDMI_RXN1_C
DDR_RPDXDP_TCK
XDP_TMS
XDP_PREQ#
XDP_TRST#
XDP_TDO
DDR_VREF
DDR_RPUDDR_RPD
DDR_RPU
DDR_A_MA[0..14]9
DDR_A_BS09DDR_A_BS19DDR_A_BS29
DDR_A_WE#9DDR_A_CAS#9DDR_A_RAS#9
DDR_CS0#9DDR_CS1#9
DDR_CKE09DDR_CKE19
M_ODT09M_ODT19
DDR_A_DQS#[0..7]9
DDR_A_D[0..63]9
DDR_A_DQS[0..7]9
DDR_A_DM[0..7]9
M_CLK_DDR09M_CLK_DDR#09M_CLK_DDR19M_CLK_DDR#19
DMI_RXN011
DMI_RXP111
DMI_RXN111
DMI_RXP011
DMI_TXP0 11DMI_TXN0 11DMI_TXP1 11DMI_TXN1 11
CLK_CPU_EXP#8CLK_CPU_EXP8
XDP_PREQ#6
XDP_TDO6
XDP_TMS6
XDP_TRST#6
XDP_TCK6
XDP_TDI6
+1.8V
+1.05VS
+1.8V
+1.8V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
5 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
5 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
5 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
Close to CPU
Pull-down must be placed within 500 mils from Pineview-M
XDP Reserve
Place diff CPU side
7/20 Add R238 and R239 for Ref board design
7/21 Add C302 to GND for Intel request7/27 Change C302 to GND
for +1.8V pull up
8/14 Add +DDR_VREF net name8/24 Change net to DDR_VREF
10/19 Change footprint T5, T6 and T7 from TPC24 to TPC12
3/23 remove XDP connector
3/23 R506, R507, R508, JXDP1 removed3/23 D45, D46 removed
4/23 U1 , CPU change p/n by Jordan command:
SA00003WA00->SA00003WAA0
R49410K_0402_5%
R49410K_0402_5%
1
2
PINEVIEW_M
DDR_A
REV = 1.1
2 OF 6
U1B
PINEVIEW-M_FCBGA8559
PINEVIEW_M
DDR_A
REV = 1.1
2 OF 6
U1B
PINEVIEW-M_FCBGA8559
DDR_A_DQS_0 AD3DDR_A_DQS#_0 AD2
DDR_A_DM_0 AD4
DDR_A_DQ_0 AC4DDR_A_DQ_1 AC1DDR_A_DQ_2 AF4DDR_A_DQ_3
AG2DDR_A_DQ_4 AB2DDR_A_DQ_5 AB3DDR_A_DQ_6 AE2DDR_A_DQ_7 AE3
DDR_A_DQS_1 AB8DDR_A_DQS#_1 AD7
DDR_A_DM_1 AA9
DDR_A_DQ_8 AB6DDR_A_DQ_9 AB7
DDR_A_DQ_10 AE5DDR_A_DQ_11 AG5DDR_A_DQ_12 AA5DDR_A_DQ_13
AB5DDR_A_DQ_14 AB9DDR_A_DQ_15 AD6
DDR_A_DQS_2 AD8DDR_A_DQS#_2 AD10
DDR_A_DM_2 AE8
DDR_A_DQ_16 AG8DDR_A_DQ_17 AG7DDR_A_DQ_18 AF10DDR_A_DQ_19
AG11DDR_A_DQ_20 AF7DDR_A_DQ_21 AF8DDR_A_DQ_22 AD11DDR_A_DQ_23
AE10
DDR_A_DQS_3 AK5DDR_A_DQS#_3 AK3
DDR_A_DM_3 AJ3
DDR_A_DQ_24 AH1DDR_A_DQ_25 AJ2DDR_A_DQ_26 AK6DDR_A_DQ_27
AJ7DDR_A_DQ_28 AF3DDR_A_DQ_29 AH2DDR_A_DQ_30 AL5DDR_A_DQ_31 AJ6
DDR_A_DQS_4 AG22DDR_A_DQS#_4 AG21
DDR_A_DM_4 AD19
DDR_A_DQ_32 AE19DDR_A_DQ_33 AG19DDR_A_DQ_34 AF22DDR_A_DQ_35
AD22DDR_A_DQ_36 AG17DDR_A_DQ_37 AF19DDR_A_DQ_38 AE21DDR_A_DQ_39
AD21
DDR_A_DQS_5 AE26DDR_A_DQS#_5 AG27
DDR_A_DM_5 AJ27
DDR_A_DQ_40 AE24DDR_A_DQ_41 AG25DDR_A_DQ_42 AD25DDR_A_DQ_43
AD24DDR_A_DQ_44 AC22DDR_A_DQ_45 AG24DDR_A_DQ_46 AD27DDR_A_DQ_47
AE27
DDR_A_DQS_6 AE30DDR_A_DQS#_6 AF29
DDR_A_DM_6 AF30
DDR_A_DQ_48 AG31DDR_A_DQ_49 AG30DDR_A_DQ_50 AD30DDR_A_DQ_51
AD29DDR_A_DQ_52 AJ30DDR_A_DQ_53 AJ29DDR_A_DQ_54 AE29DDR_A_DQ_55
AD28
DDR_A_DQS_7 AB27DDR_A_DQS#_7 AA27
DDR_A_DM_7 AB26
DDR_A_DQ_56 AA24DDR_A_DQ_57 AB25DDR_A_DQ_58 W24DDR_A_DQ_59
W22DDR_A_DQ_60 AB24DDR_A_DQ_61 AB23DDR_A_DQ_62 AA23DDR_A_DQ_63
W27
DDR_A_MA_0AH19DDR_A_MA_1AJ18DDR_A_MA_2AK18DDR_A_MA_3AK16DDR_A_MA_4AJ14DDR_A_MA_5AH14DDR_A_MA_6AK14DDR_A_MA_7AJ12DDR_A_MA_8AH13DDR_A_MA_9AK12DDR_A_MA_10AK20DDR_A_MA_11AH12DDR_A_MA_12AJ11DDR_A_MA_13AJ24DDR_A_MA_14AJ10
DDR_A_WE#AK22DDR_A_CAS#AJ22DDR_A_RAS#AK21
DDR_A_BS_0AJ20DDR_A_BS_1AH20DDR_A_BS_2AK11
DDR_A_CS#_0AH22DDR_A_CS#_1AK25DDR_A_CS#_2AJ21DDR_A_CS#_3AJ25
DDR_A_CKE_0AH10DDR_A_CKE_1AH9DDR_A_CKE_2AK10DDR_A_CKE_3AJ8
DDR_A_ODT_0AK24DDR_A_ODT_1AH26DDR_A_ODT_2AH24DDR_A_ODT_3AK27
DDR_A_CK_0AG15DDR_A_CK_0#AF15DDR_A_CK_1AD13DDR_A_CK_1#AC13
RSVDAD17RSVDAC17
DDR_A_CK_3AC15DDR_A_CK_3#AD15DDR_A_CK_4AF13DDR_A_CK_4#AG13
RSVDAB15RSVDAB17
RSVDAB4RSVDAK8
RSVD_TPAB11RSVD_TPAB13
DDR_VREFAL28DDR_RPDAK28DDR_RPUAJ26
RSVDAK29
R49951_0402_5%
R49951_0402_5%1 2
R497
80.6_0402_1%
R497
80.6_0402_1%
T1T1
R500
1K_0402_1%
R500
1K_0402_1%
1
2
R503
80.6_0402_1%
R503
80.6_0402_1%
C9480.1U_0402_10V6K
C9480.1U_0402_10V6K
1 2
R493750_0402_1%
R493750_0402_1%
C9490.1U_0402_10V6K
C9490.1U_0402_10V6K
1 2
R49810K_0402_5%
@R49810K_0402_5%
@
1
2
R50151_0402_5%
R50151_0402_5%1 2 T3T3
C9520.01U_0402_16V7K
C9520.01U_0402_16V7K
1
2
T2T2
R49551_0402_5%
R49551_0402_5%1 2
R50551_0402_5%
R50551_0402_5%1 2
C9510.1U_0402_10V6K
C9510.1U_0402_10V6K
1 2
R49249.9_0402_1%
R49249.9_0402_1%
C9500.1U_0402_10V6K
C9500.1U_0402_10V6K
1 2
R49651_0402_5%
R49651_0402_5%1 2
T4T4
DMI
PINEVIEW_M
REV = 1.1
1 OF 6
U1A
PINEVIEW-M_FCBGA8559
N455@
DMI
PINEVIEW_M
REV = 1.1
1 OF 6
U1A
PINEVIEW-M_FCBGA8559
N455@
RSVD M2RSVD N2
EXP_ICOMPI L9EXP_RBIAS L8
RSVDN9RSVDN10EXP_TCLKINPR9EXP_TCLKINNR10
RSVDM4RSVDJ1RSVDK2
DMI_RXN_1G3DMI_RXP_1H4DMI_RXN_0F2DMI_RXP_0F3
RSVD_TP P11RSVD_TP N11
EXP_RCOMPO L10
RSVD L2RSVD K3
DMI_TXN_1 J2DMI_TXP_1 H3DMI_TXN_0 G1DMI_TXP_0 G2
EXP_CLKINPN6EXP_CLKINNN7
RSVDL3
R504
1K_0402_1%
R504
1K_0402_1%
1
2
C953
0.1U_0402_16V4Z
C953
0.1U_0402_16V4Z
1
2
R50251_0402_5%
R50251_0402_5%1 2
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CPU_THERM#
H_THERMDC
H_THERMDA
EC_SMB_CK2
EC_SMB_DA2
PM_EXTTS#0
H_INTRGMCH_CRT_RGMCH_CRT_G
L_IBG
H_PROCHOT#
H_THERMTRIP#
H_NMI
PCH_POK
GMCH_CRT_BH_IGNNE#
H_A20M#
CPU_VID0
H_DPSLP#
H_STPCLK#
CPU_VID1
CPU_DREFCLK
CPU_SSCDREFCLK
PLTRST#
H_EXTBGREF
H_GTLREF
CPU_VID2CPU_VID3
H_PWRGD
CPU_SSCDREFCLK#
CPU_DREFCLK#
CPU_BSEL1
H_THERMDAH_THERMDC
ENBKL
CPU_VID4CPU_VID5
CPU_BSEL0
CPU_VID6
H_SMI#
DAC_IREF
CPU_BSEL2
H_INIT#
CLK_CPU_BCLK#CLK_CPU_BCLK
H_DPRSTP#
H_FERR#
GMCH_CRT_G
GMCH_CRT_R
ENBKL
GMCH_CRT_B
PM_EXTTS#0CLK_CPU_HPLCLK#CLK_CPU_HPLCLK
H_STPCLK#
H_FERR#
H_IGNNE#
H_A20M#
H_NMI
H_INIT#
H_SMI#
H_INTR
H_PWRGD
H_DPRSTP#
H_DPSLP#
H_EXTBGREFH_GTLREF
XDP_RSVD_9
XDP_RSVD_9
XDP_BPM#0_RXDP_BPM#1_RXDP_BPM#2_RXDP_BPM#3_R
XDP_TDIXDP_TDOXDP_TCKXDP_TMS
XDP_TRST#
XDP_PRDY#XDP_PREQ#
PM_EXTTS#1
EC_SMB_CK2 23
EC_SMB_DA2 23
LVDS_ACLK#15LVDS_ACLK15LVDS_A0#15LVDS_A015LVDS_A1#15LVDS_A115LVDS_A2#15LVDS_A215
H_A20M# 10H_SMI# 10
H_FERR# 10
H_IGNNE# 10H_STPCLK# 10
H_PWRGD 12
H_DPSLP# 12H_INIT# 10
H_INTR 10H_NMI 10
H_THERMTRIP# 10
GMCH_CRT_DATA 14GMCH_CRT_CLK 14
GMCH_CRT_HSYNC 14GMCH_CRT_VSYNC 14
GMCH_CRT_R 14GMCH_CRT_G 14GMCH_CRT_B 14
PM_EXTTS#0 9PM_DPRSLPVR 12
PLTRST# 12,16,22,24
CPU_VID0 33CPU_VID1 33CPU_VID2 33CPU_VID3 33CPU_VID4 33CPU_VID5
33CPU_VID6 33
CPU_BSEL1 8CPU_BSEL2 8
CPU_BSEL0 8
CPU_DREFCLK 8CPU_DREFCLK# 8CPU_SSCDREFCLK 8CPU_SSCDREFCLK# 8
H_DPRSTP# 12
LVDS_SDA15GMCH_ENVDD15
ENBKL23
LVDS_SCL15
CLK_CPU_BCLK 8CLK_CPU_BCLK# 8
GMCH_INVT_PWM15
PCH_POK 12,23
XDP_PREQ# 5
XDP_TDI5
XDP_TCK5
XDP_TRST#5XDP_TMS5
XDP_TDO5
CLK_CPU_HPLCLK# 8CLK_CPU_HPLCLK 8
+3VS
+3VS
+3VS
+1.05VS+1.05VS
+1.05VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
B
6 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
B
6 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
B
6 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
CPU THERMAL SENSOR
Address:0100_1100 EMC1402-1Address:0100_1101 EMC1402-2
Close to CPU
placed within 0.5" of processor pin and 5 mils spacing
placed within 0.5"of processor pin.
R510 be placed
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCC_SM
+VCC_CRT_DAC
+VCC_DMI
+VCC_ALVD+VCC_DLVD
+RING_EAST+RING_WEST
+LGI_VID
+LGI_VID +DMI_HMPLL+VCC_ALVD
+VCC_DMI
+DMI_HMPLL
+VCCSFR_AB_DPL
+VCCSFR_AB_DPL
+VCC_CRT_DAC+VCC_CRT_DAC
+VCC_DLVD
+VCCA_VCCD
+VCCCK_DDR
+VCCCK_DDR
+RING_EAST
+VCCA_VCCD
+RING_WEST
+VCC_DMI
+VCC_SM
VCCSENSEVSSSENSE VCCSENSE 33VSSSENSE 33
+CPU_CORE
+0.89VS
+0.89VS
+1.8VS
+3VS
+1.05VS
+1.5VS
+1.05VS
+1.05VS
+CPU_CORE
+1.8V
+1.8V
+1.05VS
+CPU_CORE
+CPU_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
7 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
7 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
7 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
Close Chipset pin
Please closed U1 ball
Please closed U1 ball
154mA
104mA
Please closed U1 ball
Please closed U1.Y2
80mA
1380mA
60mA
480mA
1320mA
2270mA
305mA
5mA
3500mA
2 x 330uF(9mohm/2)
Please closed U1.D4
R525
0_0603_5%
MP@
R525
0_0603_5%
MP@
1 2
R527
0_0603_5%
MP@
R527
0_0603_5%
MP@
1 2
C
9
8
9
2
2
U
_
0
8
0
5
_
6
.
3
V
6
M
C
9
8
9
2
2
U
_
0
8
0
5
_
6
.
3
V
6
M
1
2
C982
2.2U_0603_6.3V6K
C982
2.2U_0603_6.3V6K
1
2
R5350_0603_5%
MP@
R5350_0603_5%
MP@
1 2
C
9
7
1
2
2
U
_
0
8
0
5
_
6
.
3
V
6
M
C
9
7
1
2
2
U
_
0
8
0
5
_
6
.
3
V
6
M
1
2
D
M
I
E
X
P
\
C
R
T
\
P
L
L
P
O
W
E
R
D
D
R
C
P
U
L
V
D
S
G
F
X
/
M
C
H
PINEVIEW_M
REV = 1.1
5 OF 6
U1E
PINEVIEW-M_FCBGA8559
D
M
I
E
X
P
\
C
R
T
\
P
L
L
P
O
W
E
R
D
D
R
C
P
U
L
V
D
S
G
F
X
/
M
C
H
PINEVIEW_M
REV = 1.1
5 OF 6
U1E
PINEVIEW-M_FCBGA8559
VCCSFR_AB_DPLAC31
VCC A23VCC A25VCC A27VCC B23VCC B24VCC B25VCC B26VCC B27VCC
C24VCC C26VCC D23VCC D24VCC D26VCC D28VCC E22VCC E24VCC E27VCC
F21VCC F22VCC F25VCC G19VCC G21VCC G24VCC H17VCC H19VCC H22VCC
H24VCC J17VCC J19VCC J21VCC J22VCC K15VCC K17VCC K21VCC L14VCC
L16VCC L19VCC L21VCC N14VCC N16VCC N19VCC N21
VCCSENSE C29VSSSENSE B29
VCCA Y2
VCCP D4
VCCP B4VCCP B3
VCCALVDS V30VCCDLVDS W31
VCCA_DMI T1VCCA_DMI T2VCCA_DMI T3
RSVD P2VCCSFR_DMIHMPLL AA1
VCCP E2
VCCGFXT13VCCGFXT14VCCGFXT16VCCGFXT18VCCGFXT19VCCGFXV13VCCGFXV19VCCGFXW14VCCGFXW16VCCGFXW18VCCGFXW19
VCCSMAK13
VCCSMAL16VCCSMAL21VCCSMAL25
VCCCK_DDRAK7VCCCK_DDRAL7
VCCA_DDRU10VCCA_DDRU5VCCA_DDRU6VCCA_DDRU7VCCA_DDRU8VCCA_DDRU9VCCA_DDRV2VCCA_DDRV3VCCA_DDRV4VCCA_DDRW10VCCA_DDRW11
VCCACK_DDRAA10VCCACK_DDRAA11
VCCD_AB_DPLAA19
VCCACRTDACT30
VCC_GIOT31VCCRING_EASTJ31
VCCRING_WESTB2VCCRING_WESTC2VCC_LGIA21
VCCRING_WESTC3
VCCSMAK19VCCSMAK9VCCSMAL11
VCCD_HMPLLV11
R5340_0603_5%
MP@
R5340_0603_5%
MP@
1 2
+ C984
330U_D2_2.5VY_R9M
+ C984
330U_D2_2.5VY_R9M
1
2
R533
100_0402_5%
R533
100_0402_5%
1
2
C
1
0
0
6
1
U
_
0
4
0
2
_
6
.
3
V
6
K
C
1
0
0
6
1
U
_
0
4
0
2
_
6
.
3
V
6
K
1
2
C979
2.2U_0603_6.3V6K
@C979
2.2U_0603_6.3V6K
@
1
2
C976
1U_0402_6.3V6K
C976
1U_0402_6.3V6K
1
2
R538
0_0603_5%
MP@
R538
0_0603_5%
MP@
1 2
C
9
9
1
2
2
U
_
0
8
0
5
_
6
.
3
V
6
M
C
9
9
1
2
2
U
_
0
8
0
5
_
6
.
3
V
6
M
1
2
C
9
6
9
0
.
1
U
_
0
4
0
2
_
1
0
V
6
K
@
C
9
6
9
0
.
1
U
_
0
4
0
2
_
1
0
V
6
K
@
1
2
C
9
8
6
1
U
_
0
4
0
2
_
6
.
3
V
6
K
C
9
8
6
1
U
_
0
4
0
2
_
6
.
3
V
6
K
1
2
R529
0_0603_5%MP@
R529
0_0603_5%MP@
1 2
C992
22U_0805_6.3V6M
C992
22U_0805_6.3V6M
1
2
R5370_0603_5%
MP@
R5370_0603_5%
MP@
1 2
R530
0_0603_5%
MP@
R530
0_0603_5%
MP@
1 2
C10001U_0402_6.3V6K
C10001U_0402_6.3V6K
1
2
C
9
8
7
1
U
_
0
4
0
2
_
6
.
3
V
6
K
C
9
8
7
1
U
_
0
4
0
2
_
6
.
3
V
6
K
1
2
C
9
7
0
0
.
1
U
_
0
4
0
2
_
1
0
V
6
K
@
C
9
7
0
0
.
1
U
_
0
4
0
2
_
1
0
V
6
K
@1
2
C974
1U_0402_6.3V6K
C974
1U_0402_6.3V6K
1
2
R5360_0603_5%
MP@
R5360_0603_5%
MP@
1 2
C10031U_0402_6.3V6K
C10031U_0402_6.3V6K
1
2
C10011U_0402_6.3V6K
C10011U_0402_6.3V6K
1
2
C
1
0
1
2
1
U
_
0
4
0
2
_
6
.
3
V
6
K
C
1
0
1
2
1
U
_
0
4
0
2
_
6
.
3
V
6
K
1
2
C
9
9
4
1
U
_
0
4
0
2
_
6
.
3
V
6
K
C
9
9
4
1
U
_
0
4
0
2
_
6
.
3
V
6
K
1
2
C
9
9
0
2
2
U
_
0
8
0
5
_
6
.
3
V
6
M
C
9
9
0
2
2
U
_
0
8
0
5
_
6
.
3
V
6
M
1
2
C9960.01U_0402_16V7KC9960.01U_0402_16V7K
1
2
R532
100_0402_5%
R532
100_0402_5%
1
2
R5280_0603_5%MP@
R5280_0603_5%MP@
1 2
R526
0_0603_5%
MP@
R526
0_0603_5%
MP@
1 2
C981
2.2U_0603_6.3V6K
C981
2.2U_0603_6.3V6K
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C9971U_0402_6.3V6K
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C100222U_0805_6.3V6M
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2.2U_0603_6.3V6K
C980
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R531
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N
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PINEVIEW_M
6 OF 6
REV = 1.1
U1F
PINEVIEW-M_FCBGA8559
G
N
D
PINEVIEW_M
6 OF 6
REV = 1.1
U1F
PINEVIEW-M_FCBGA8559
VSSF19VSSF17VSSE8VSSE25VSSE21VSSE19VSSE10RSVD_NCTFE1VSSD22RSVD_NCTFC31VSSC25VSSC22VSSC21VSSC12RSVD_NCTFC1VSSB9VSSB5RSVD_NCTFB31RSVD_NCTFB30VSSB22VSSB19VSSB16VSSB13VSSAL9RSVD_NCTFAL30RSVD_NCTFAL3RSVD_NCTFAL29VSSAL23RSVD_NCTFAL2VSSAL19VSSAL13RSVD_NCTFAK31RSVD_NCTFAK30VSSAK23RSVD_NCTFAK2RSVD_NCTFAK1RSVD_NCTFAJ31VSSAJ16RSVD_NCTFAJ1VSSAH8VSSAH6VSSAH4VSSAH28VSSAH23VSSAH18VSSAG3VSSAG10VSSAF28VSSAF24VSSAF21VSSAF17VSSAF11VSSAE31VSSAE22VSSAE17VSSAE15VSSAE13VSSAE11VSSAE1VSSAD5VSSAD26VSSAC30VSSAC28VSSAC21VSSAC2VSSAC19VSSAC11VSSAC10VSSAB30VSSAB29VSSAB28VSSAB21VSSAB19VSSAA8VSSAA29VSSAA26VSSAA25VSSAA22VSSAA2VSSAA18VSSAA16VSSAA14VSSAA13RSVD_NCTFA4RSVD_NCTFA30RSVD_NCTFA3RSVD_NCTFA29VSSA19VSSA16VSSA11
VSS T29
VSS Y4VSS Y3VSS Y28VSS W7VSS W6VSS W5VSS W4VSS W30VSS W28VSS
W26VSS W25VSS W23VSS W2VSS W13VSS V29VSS V28VSS V18VSS V16VSS
V14VSS U27VSS U24VSS U23VSS U22VSS T11VSS R8VSS R7VSS R25VSS P4VSS
P3VSS P21VSS P19VSS P18VSS P16VSS P14VSS P13VSS N8VSS N5VSS N4VSS
N28VSS N25VSS N24VSS N18VSS N13VSS N1VSS M3VSS M28VSS L29VSS L25VSS
L24VSS L22VSS L18VSS L13VSS L1VSS K8VSS K4VSS K30VSS K28VSS K27VSS
K26VSS K19VSS K13VSS K11VSS J4VSS J15VSS J13VSS J11VSS H8VSS H25VSS
H21VSS H2VSS H15VSS H11VSS G31VSS G27VSS G22VSS G17VSS G15VSS F4VSS
F28VSS F24
+ C985
330U_D2_2.5VY_R9M
+ C985
330U_D2_2.5VY_R9M
1
2
C
1
0
1
1
1
U
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4
0
2
_
6
.
3
V
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C
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1
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1
2
C975
1U_0402_6.3V6K
C975
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1
2
T41T41
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FSC
CLK_XTAL_IN
VGATE
CLK_XTAL_OUT
ITP_EN
H_STP_CPU#
CLK_XTAL_OUT
CLK_XTAL_IN
PCI2_TME
ITP_EN PCI2_TME
CLK_SMBDATA
CLK_SMBCLK
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_CPU_HPLCLK
CLK_CPU_HPLCLK#
CPU_SSCDREFCLK
CPU_SSCDREFCLK#
WLAN_CLKREQ#WWAN_CLKREQ#
CLK_SMBDATA
PCI4_SEL
PCI4_SEL
CLK_PCI_DDR_R
CLK_CPU_EXP
CLK_CPU_EXP#
CLK_PCIE_PCH#
CLK_PCIE_PCH
CLK_PCIE_LAN
CLK_PCIE_LAN#
WLAN_CLKREQ#
LAN_CLKREQ#
LAN_CLKREQ#
CLK_SMBCLK
FSB
FSA
H_STP_PCI#_R
CLK_PCIE_WLAN#
CLK_PCIE_WLAN
CLK_PCIE_WWAN#
CLK_PCIE_WWAN
CLK_PCIE_SATA
CLK_PCIE_SATA#
CPU_DREFCLK
CPU_DREFCLK#
CPU_SSCDREFCLK CPU_SSCDREFCLK#
CLK_PCI_DDR_R
PCI4_SEL
ITP_EN
WWAN_CLKREQ#
FSB
FSC
FSA
H_STP_CPU#
+3VM_1.5VM_R
+1.05VM_1.5VM_R
H_STP_PCI#_R
CLK_PCH_48M11
CLK_PCH_14M12
VGATE12,23,33
H_STP_PCI#12
H_STP_CPU#12
CLK_PCI_PCH10
CLK_PCI_LPC23
CLK_SMBDATA 9,16
CLK_SMBCLK 9,16
CLK_CPU_BCLK# 6
CLK_CPU_BCLK 6
CLK_CPU_HPLCLK 6
CLK_CPU_HPLCLK# 6
CPU_DREFCLK 6
CPU_DREFCLK# 6
CPU_SSCDREFCLK 6
CPU_SSCDREFCLK# 6
PCH_SMBDATA12
PCH_SMBCLK12
CLK_PCI_DDR16,24
CLK_CPU_EXP# 5
CLK_CPU_EXP 5
CLK_PCIE_PCH 11
CLK_PCIE_PCH# 11
CLK_PCIE_LAN 22
CLK_PCIE_LAN# 22
WLAN_CLKREQ# 16
LAN_CLKREQ# 22
CLK_PCIE_WLAN# 16
CLK_PCIE_WLAN 16
CLK_PCIE_WWAN# 16
CLK_PCIE_WWAN 16
CLK_PCIE_SATA# 10
CLK_PCIE_SATA 10
WWAN_CLKREQ# 16
CPU_BSEL16
CPU_BSEL26
CPU_BSEL06
CLK_48M_CR21
+1.05VM_CK505
+3VM_CK505
+3VS
+1.05VS
+3VS
+3VS
+3VS
+3VS
+3VM_CK505
+1.05VM_CK505
+3VM_CK505
+1.05VM_CK505
+1.5VM_CK505
+3VS
+1.05VS
+1.05VS
+1.05VS
+3VS
+1.5VM_CK505
+1.5VS
+1.5VM_CK505
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
C
SCHEMATICS MB A5122
8 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
401897
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
C
SCHEMATICS MB A5122
8 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
401897
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
C
SCHEMATICS MB A5122
8 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
401897
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#For PCI4_SEL, 0 =
Pin24/25 : DOT96 / DOT96# Pin28/29 : LCDCLK / LCDCLK#
1 = Pin24/25 : SRC_0 / SRC_0# Pin28/29 : 27M/27M_SS
Routing the trace at least 10mil
1000CLKSEL1
0
PCIMHz
266
SRCMHz
CPUMHzCLKSEL2
33.30
FSACLKSEL0
FSC FSB REFMHz
DOT_96MHz
USBMHz
14.318 96.0 48.00 1000 133 33.31 14.318 96.0 48.00 1001 200
33.30 14.318 96.0 48.00 1001 166 33.31 14.318 96.0 48.01 1000 333
33.30 14.318 96.0 48.01 1000 100 33.31 14.318 96.0 48.01 1001 400
33.30 14.318 96.0 48.01 1 1 Reserved SA00003H610 (ICS
:CS9LVRS387AKLFT MLF)
For PCI2_TME:0=Overclocking of CPU and SRC allowed(ICS only)
1=Overclocking of CPU and SRC NOT allowed
PORTSRC PORT LIST
REQ_3#DEVICEPORT
REQ PORT LIST
REQ_4#REQ_6#REQ_7#REQ_9#REQ_10#REQ_11#REQ_A#
PEIC_WLAN
SRC10SRC11
SRC6SRC4
SRC0DEVICE
SRC3
CPU_DREFCLKSRC2
SRC7
SRC9SRC8
PCIE_LAN
PCIE_WLANPCIE_SATA
PCIE_WWAN
PEIC_WWAN
250 mA
CPU_EXP
PCIE_PCH
PCIE_LAN
80 mA
7/13 Add 22pF to gnd and close to U3 for RF request
7/13 Add 33pFfor RF request
7/13 Add 33pF to GND for RF request
7/13 Add 33pF to GND for RF request
7/13 For RF request
7/13 For RF request
7/13 For RF request
7/21 Reserve 33pF to GND for RF request
7/21 Reserve 22pF to gnd and close to U3 for RF request
7/21 Reserve 33pFfor RF request
7/21 Change WWAN_CLKREQ# from REQ4 to REQ11
7/22 Add R241 pull up to +3VS for RF Intel request
7/22 Add R242 to R253 for Intel request
8/14 Add R250 pull up for Intel request
7/13 For RF request
8/24 Change net name to FSB for U3.2
8/27 Delete C93, C94, C95, C102 for low power CLK GEN
8/27 C303, C324, C325, C326, C327 to GND for RF request
7/21 Delete C296, C297 for RF requestLow power CLK Gen.
2010.03.23 Change Y1 to 5 x3.2
sizeSJ114P3M720->SJ100009R00
3/30 RT, LP= SA00003H730 , 1nd gerber out review IDT,
NP=SA000020H10 , 2nd,
3/30 R81, R477, change p/n SM01000B200->SD013000080
3/30 R91, R92, change p/n 22 -> 10 ohm
@@
@@
StuffStuff
StuffStuff
R477 @ StuffNormal Power Low Power
R478R479R480R483
4/13 after PVT SMT, R82: SM01000B200 ->SM010007Z00
R112
10K_0402_5%
R112
10K_0402_5%
1
2
R484
1K_0402_5%
@R484
1K_0402_5%
@
1
2
C135
0.1U_0402_16V4Z
C135
0.1U_0402_16V4Z
1
2
C140
0.1U_0402_16V4Z
@ C140
0.1U_0402_16V4Z
@1
2
C868 22P_0402_50V8JC868 22P_0402_50V8J1 2
R483
0_0603_5%
LOW@R483
0_0603_5%
LOW@1 2
R91 10_0402_5%R91 10_0402_5%1 2
C136
0.1U_0402_16V4Z
C136
0.1U_0402_16V4Z
1
2
C129
0.1U_0402_16V4Z
C129
0.1U_0402_16V4Z
1
2
C146 22P_0402_50V8JC146 22P_0402_50V8J1 2
R114
10K_0402_5%
R114
10K_0402_5%
1
2
R101 10K_0402_5%R101 10K_0402_5%12
C144 22P_0402_50V8JC144 22P_0402_50V8J1 2
R481470_0402_5%R481470_0402_5%
1
2
C94033P_0402_50V8K@C94033P_0402_50V8K@
1
2
R82
FBMH1608HM601-T_0603
R82
FBMH1608HM601-T_06031 2
C
9
4
2
1
0
U
_
0
8
0
5
_
1
0
V
4
Z
C
9
4
2
1
0
U
_
0
8
0
5
_
1
0
V
4
Z
1
2
R113
10K_0402_5%
R113
10K_0402_5%
1
2
Q1B 2N7002DW-T/R7_SOT363-6Q1B 2N7002DW-T/R7_SOT363-6
3
5
4
R478
0_0603_5%
NORMAL@ R478
0_0603_5%
NORMAL@1 2
R83
2.2K_0402_5%
R83
2.2K_0402_5%
C134
10U_0805_10V4Z
C134
10U_0805_10V4Z
1
2
R10833_0402_5% R10833_0402_5% 1 2
C141
47P_0402_50V8J
C141
47P_0402_50V8J
C94133P_0402_50V8K@C94133P_0402_50V8K@
1
2
R479
0_0603_5%
NORMAL@ R479
0_0603_5%
NORMAL@1 2
C130
0.1U_0402_16V4Z
@ C130
0.1U_0402_16V4Z
@1
2
R477
0_0603_5%
LOW@R477
0_0603_5%
LOW@1 2
R100 10K_0402_5%R100 10K_0402_5%12
C145 22P_0402_50V8JC145 22P_0402_50V8J1 2
C
9
4
5
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
C
9
4
5
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
1
2
C139
0.1U_0402_16V4Z
C139
0.1U_0402_16V4Z
1
2
R427 0_0402_5%@R427 0_0402_5%@1 2
C
9
4
6
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
C
9
4
6
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
1
2
R860_0402_5%R860_0402_5%
1 2
C128
0.1U_0402_16V4Z
C128
0.1U_0402_16V4Z
1
2
R488
0_0402_5%
@R488
0_0402_5%
@
1
2
R115
10K_0402_5%
@R115
10K_0402_5%
@
1
2
Y114.31818MHZ 20PF 7A14300003
Y114.31818MHZ 20PF 7A14300003
1
2
C148 22P_0402_50V8JC148 22P_0402_50V8J
R60810K_0402_5%
R60810K_0402_5%
1 2
C133
47P_0402_50V8J
C133
47P_0402_50V8J
R92 10_0402_5%R92 10_0402_5%1 2
R10733_0402_5% R10733_0402_5% 1 2
C
9
4
7
4
7
P
_
0
4
0
2
_
5
0
V
8
J
@
C
9
4
7
4
7
P
_
0
4
0
2
_
5
0
V
8
J
@
C147 22P_0402_50V8JC147 22P_0402_50V8J
C126
10U_0805_10V4Z
C126
10U_0805_10V4Z
1
2
C127
0.1U_0402_16V4Z
C127
0.1U_0402_16V4Z
1
2
U4
ICS9LVRS387AKLFT MLF
@ U4
ICS9LVRS387AKLFT MLF
@
CKPWRGD/PD#1
FS_B/TEST_MODE2
VSS_REF3
XTAL_OUT4
XTAL_IN5
VDD_REF6
REF_0/FS_C/TEST_7
REF_18
SDA 9
SCL 10
NC11
VDD_PCI12
PCI_113
PCI_214
PCI_315
PCI_4/SEL_LCDCL16
PCIF_5/ITP_EN17
VSS_PCI18
VDD_4819
USB_0/FS_A20
USB_1/CLKREQ_A# 21
VSS_4822
VDD_IO23
SRC_0/DOT_96 24
SRC_0#/DOT_96# 25
VSS_IO26
VDD_PLL327
LCDCLK/27M 28
LCDCLK#/27M_SS 29
VSS_PLL330
VDD_PLL3_IO31
SRC_2 32
SRC_2# 33
VSS_SRC34
SRC_3 35
SRC_3# 36
VDD_CPU72
CPU_0 71
CPU_0# 70
VSS_CPU69
CPU_1 68
CPU_1# 67
VDD_CPU_IO66
CLKREQ_7# 65
SRC_8/CPU_ITP 64
SRC_8#/CPU_ITP# 63
VDD_SRC_IO62
SRC_7 61
SRC_7# 60
VSS_SRC59
CLKREQ_6# 58
SRC_6 57
SRC_6# 56
VDD_SRC55
PCI_STOP#54
CPU_STOP#53
VDD_SRC_IO52
SRC_10# 51
SRC_10 50
SLKREQ_10# 49
SRC_11 48
SRC_11# 47
CLKREQ_11# 46
SRC_9# 45
SRC_9 44
CLKREQ_9# 43
VSS_SRC42
CLKREQ_4# 41
SRC_4# 40
SRC_4 39
VDD_SRC_IO38
CLKREQ_3# 37
VSS73
R99 10K_0402_5%R99 10K_0402_5%12
C138
0.1U_0402_16V4Z
C138
0.1U_0402_16V4Z
1
2
C
9
4
3
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
C
9
4
3
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
1
2
C132
0.1U_0402_16V4Z
@ C132
0.1U_0402_16V4Z
@1
2
R4822.2K_0402_5%R4822.2K_0402_5%
12
Q1A2N7002DW-T/R7_SOT363-6
Q1A2N7002DW-T/R7_SOT363-6
6 1
2
C
9
4
4
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
C
9
4
4
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
1
2
R480
0_0603_5%
LOW@R480
0_0603_5%
LOW@1 2
R4861K_0402_5%R4861K_0402_5%
12
R81
0_0603_5%
MP@
R81
0_0603_5%
MP@
1 2
C143 22P_0402_50V8JC143 22P_0402_50V8J1 2
R84
2.2K_0402_5%
R84
2.2K_0402_5%
R485470_0402_5%R485470_0402_5%
1
2
R491
0_0402_5%
@R491
0_0402_5%
@
1
2
R9333_0402_5% R9333_0402_5% 1 2
R1040_0402_5%R1040_0402_5%
1 2
R10333_0402_5% R10333_0402_5% 1 2
R6510K_0402_5%
R6510K_0402_5%
1 2
C137
0.1U_0402_16V4Z
C137
0.1U_0402_16V4Z
1
2
C131
0.1U_0402_16V4Z
@ C131
0.1U_0402_16V4Z
@1
2
R4870_0402_5%R4870_0402_5%
1 2
R489470_0402_5%R489470_0402_5%
1
2
R49010K_0402_5%
R49010K_0402_5%
12
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D17
DDR_A_D18DDR_A_D19
DDR_A_DQS#2DDR_A_DQS2
DDR_A_D16
DDR_A_D24
DDR_CKE1
DDR_A_DQS#0
DDR_A_MA2
DDR_A_D3
DDR_A_D1DDR_A_D0
DDR_A_D2
DDR_A_DQS0
DDR_A_MA0
DDR_A_RAS#DDR_A_BS1
DDR_CS0#
DDR_A_DQS#1DDR_A_DQS1
DDR_A_D11DDR_A_D10
DDR_A_D35
DDR_A_MA14
DDR_A_D47
DDR_A_D44
DDR_A_D53
DDR_A_DM4
DDR_A_D52
DDR_A_D38
DDR_A_D45
DDR_A_D37
DDR_A_DQS#5DDR_A_DQS5
DDR_A_D36
DDR_A_D46
DDR_A_D9DDR_A_D8
DDR_A_D54
DDR_A_D60
DDR_A_D55
DDR_A_D61
DDR_A_D63
DDR_A_DM6
M_CLK_DDR1M_CLK_DDR#1
DDR_A_D58
DDR_A_DQS7DDR_A_DQS#7
DDR_A_D27DDR_A_D26
M_ODT0DDR_A_MA13
DDR_CKE0
DDR_A_MA11
DDR_A_MA6DDR_A_MA7
DDR_A_MA4
DDR_A_D29
DDR_A_D30
DDR_A_D28
DDR_A_D31
DDR_A_DQS3DDR_A_DQS#3
DDR_A_BS2
DDR_A_MA12
DDR_A_MA3DDR_A_MA1
DDR_A_MA9
DDR_A_MA5
DDR_A_MA8
DDR_CS1#DDR_A_CAS#
DDR_A_DM5
DDR_A_D41
M_ODT1
DDR_A_D34
DDR_A_MA10
DDR_A_DQS#4
DDR_A_D39
DDR_A_WE#
DDR_A_D33
DDR_A_D43
DDR_A_D32
DDR_A_D49DDR_A_D48
DDR_A_DQS4
DDR_A_D40
DDR_A_BS0
DDR_A_D42
DDR_A_DM7
DDR_A_DM3
DDR_A_D59
DDR_A_D56
DDR_A_DQS#6
CLK_SMBCLKCLK_SMBDATA
DDR_A_D62
DDR_A_D50
DDR_A_D57
DDR_A_DQS6
DDR_A_D51
DDR_A_D21DDR_A_D20
DDR_A_DM2
DDR_A_D22DDR_A_D23
DDR_A_DM1
DDR_A_D12DDR_A_D13
DDR_A_D6
DDR_A_D5DDR_A_D4
DDR_A_D7
DDR_A_DM0
DDR_A_D15DDR_A_D14
M_CLK_DDR0M_CLK_DDR#0
DDR_A_D25
DDR_A_MA13M_ODT0
DDR_CKE1
DDR_CS0#DDR_A_RAS#
DDR_CKE0
DDR_A_BS2
DDR_A_MA7DDR_A_MA11
DDR_A_MA6 DDR_A_MA14
DDR_A_MA5
DDR_A_MA9
DDR_A_BS1DDR_A_MA0DDR_A_MA2
DDR_A_MA4
DDR_A_WE#
M_ODT1
DDR_A_CAS#DDR_CS1#
DDR_A_MA3
DDR_A_BS0
DDR_A_MA12
DDR_A_MA8
DDR_A_MA10DDR_A_MA1
DDR_A_DQS#[0..7]5
DDR_A_DM[0..7]5
DDR_A_D[0..63]5
DDR_A_MA[0..14]5
DDR_A_DQS[0..7]5
M_ODT0 5
DDR_A_BS1 5
M_CLK_DDR1 5
DDR_CS0# 5DDR_A_WE#5
CLK_SMBDATA8,16
DDR_CKE1 5
DDR_A_RAS# 5
CLK_SMBCLK8,16
DDR_CS1#5
M_CLK_DDR#1 5
M_CLK_DDR0 5
DDR_A_BS25
M_CLK_DDR#0 5
DDR_A_BS05
M_ODT15
DDR_CKE05
PM_EXTTS#0 6
DDR_A_CAS#5
+1.8V
+DIMM_VREF
+DIMM_VREF
+1.8V
+0.9VS
+1.8V
+3VS
+DIMM_VREF
+1.8V
+0.9VS
+1.8V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
9 38Monday, September 20, 2010
2009/04/07 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
9 38Monday, September 20, 2010
2009/04/07 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
9 38Monday, September 20, 2010
2009/04/07 2012/10/21Compal Electronics, Inc.
20mils
Layout Note:Place these resistorclosely DIMMA,alltrace
lengthMax=1000 mil
Layout Note:Place near JDDR1
Layout Note:Place one cap close to every 2 pullup resistors
terminated to +0.9VS
Layout Note:Place these resistorclosely DIMMA,alltrace
length
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI_DEVSEL#
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_PIRQA#PCI_PIRQB#PCI_PIRQC#PCI_PIRQD#PCI_PIRQE#PCI_PIRQF#PCI_PIRQG#PCI_PIRQH#
CLK_PCI_PCH
RSVD01
RSVD02
REQ1#REQ2#
GPIO22GPIO1
RSVD01RSVD02
SERIRQ
H_INIT#H_INTRH_FERR#H_NMIEC_KBRST#SERIRQH_SMI#H_STPCLK#
GATEA20
SATALED#
H_A20M#
GATEA20
H_IGNNE#
PCI_RST#
CLK_PCI_PCH
PCI_STOP#REQ1#REQ2#
PCI_FRAME#
GPIO1PCI_TRDY#PCI_PERR#PCI_SERR#
PCI_PIRQA#PCI_PIRQC#PCI_PIRQF#PCI_PIRQB#
PCI_IRDY#PCI_PIRQG#PCI_PLOCK#PCI_PIRQE#
PCI_PIRQH#PCI_PIRQD#PCI_DEVSEL#GPIO22
PCI_RST#
SATARBIAS
H_FERR#
CLK_PCI_PCH8
SATA_ITX_DRX_P0 18SATA_ITX_DRX_N0 18
H_A20M# 6
H_SMI# 6
H_FERR# 6
H_IGNNE# 6
H_STPCLK# 6
H_INIT# 6
H_NMI 6
H_INTR 6
SATA_IRX_C_DTX_P0 18SATA_IRX_C_DTX_N0 18
SATALED# 25
CLK_PCIE_SATA 8CLK_PCIE_SATA# 8
GATEA20 23
EC_KBRST# 23SERIRQ 23
H_THERMTRIP# 6
PCI_RST#23
+3VS
+3VS
+1.05VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+1.05VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
10 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
10 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
10 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
For EMI, close to TigerPoint
R110 to be within 1" from the Tiger Point chipset.
Please closed Tiger point PIN within 500 mils
For EC request.
R111 closed TigerPoint within 1"
4/13 PVT SMT U15: SA000039N80 ->SA000039N604/23 pre-MP SMT
U15: SA000039N60 -> SA000039NA0
R551
8.2K_0402_5%
R551
8.2K_0402_5%
1 2
RP10
8.2K_0804_8P4R_5%
RP10
8.2K_0804_8P4R_5%
1 82 73 64 5
R54210_0402_5%@
R54210_0402_5%@
1
2
R5451K_0402_5%@R5451K_0402_5%@
1
2
R550
8.2K_0402_5%
R550
8.2K_0402_5%
1 2
C
1
0
1
5
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
@
C
1
0
1
5
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
@1
2
R549
10K_0402_5%
R549
10K_0402_5%
C10168.2P_0402_50V8D
@C1016
8.2P_0402_50V8D
@1
2
R540 8.2K_0402_5%R540 8.2K_0402_5%1 2
R541
1
0
0
K
_
0
4
0
2
_
5
%
R541
1
0
0
K
_
0
4
0
2
_
5
%
1
2
RP8
8.2K_0804_8P4R_5%
RP8
8.2K_0804_8P4R_5%
1 82 73 64 5
R548
10K_0402_5%
R548
10K_0402_5%
RP16
8.2K_0804_8P4R_5%
RP16
8.2K_0804_8P4R_5%
1 82 73 64 5
RP7
8.2K_0804_8P4R_5%
RP7
8.2K_0804_8P4R_5%
1 82 73 64 5
R552
56_0402_5%
R552
56_0402_5%
1
2
RP11
8.2K_0804_8P4R_5%
RP11
8.2K_0804_8P4R_5%
1 82 73 64 5
R54410K_0402_5%@
R54410K_0402_5%@
R547 24.9_0402_1%R547 24.9_0402_1%
3
TGP
H
O
S
T
S
A
T
A
U15C
TIGERPOINT_ES1_BGA360
3
TGP
H
O
S
T
S
A
T
A
U15C
TIGERPOINT_ES1_BGA360
SATA0RXN AE6SATA0RXP AD6SATA0TXN AC7SATA0TXP AD7SATA1RXN
AE8SATA1RXP AD8SATA1TXN AD9SATA1TXP AC9
SATA_CLKN AD4
GPIO36AD23
A20M# Y20CPUSLP# Y21
IGNNE# Y18INIT3_3V# AD21
INIT# AC25INTR AB24
FERR# Y22NMI T17
RCIN# AC21SERIRQ AA16
SMI# AA21STPCLK# V18
THRMTRIP# AA20
RSVD03R12RSVD04AE20RSVD05AD17RSVD06AC15RSVD07AD18RSVD08Y12RSVD09AA10RSVD10AA12RSVD11Y10RSVD12AD15RSVD13W10RSVD14V12RSVD15AE21RSVD16AE18RSVD17AD19RSVD18U12
RSVD19AC17RSVD20AB13RSVD21AC13RSVD22AB15RSVD23Y14
RSVD24AB16RSVD25AE24RSVD26AE23
RSVD27AA14RSVD28V14
RSVD29AD16
SATA_CLKP AC4
SATARBIAS# AD11SATARBIAS AC11SATALED# AD25
RSVD31AB10
A20GATE U16
RSVD30AB11
PCI
TGP
1
U15A
TIGERPOINT_ES1_BGA360
PCI
TGP
1
U15A
TIGERPOINT_ES1_BGA360
PIRQH#/GPIO5F8PIRQG#/GPIO4H8PIRQF#/GPIO3D6PIRQE#/GPIO2E8PIRQD#H10PIRQC#B3PIRQB#D7PIRQA#B2
GPIO1C9GPIO22C15
RSVD02M13
REQ2#A20REQ1#G16
RSVD01K9
GPIO17/STRAP2#A2GPIO48/STRAP1#G14
STRAP0#D11
GNT2#E16GNT1#A18
FRAME#A16PERR#D10TRDY#A10PLOCK#A8STOP#F14SERR#B11PME#C22IRDY#B7PCIRST#A23PCICLKJ12DEVSEL#B15PARA5
C/BE3# L16C/BE2# C13C/BE1# M15C/BE0# H16
AD31 B1AD30 C1AD29 C7AD28 D9AD27 C8AD26 H12AD25 G12AD24 A6AD23
B5AD22 A3AD21 B8AD20 L12AD19 B13AD18 B9AD17 E12AD16 C11AD15 E10AD14
J14AD13 L14AD12 H14AD11 E14AD10 A13AD9 D15AD8 D16AD7 B19AD6 B18AD5
C19AD4 B17AD3 C18AD2 C17AD1 D18AD0 B22
R539 8.2K_0402_5%R539 8.2K_0402_5%1 2
R54656_0402_5%R54656_0402_5%
R54310K_0402_5%
@
R54310K_0402_5%
@
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCIE_ITX_PRX_P2
PCIE_PTX_C_IRX_P2PCIE_PTX_C_IRX_N2
PCIE_ITX_PRX_N2
PCIE_PTX_C_IRX_P3PCIE_PTX_C_IRX_N3
PCIE_ITX_PRX_P3PCIE_ITX_PRX_N3
PCIE_PTX_C_IRX_N4PCIE_PTX_C_IRX_P4
PCIE_ITX_PRX_N4PCIE_ITX_PRX_P4
USB20_P2USB20_N2
USB20_P0
USB20_N5USB20_P5
USB20_N7USB20_P7
USB20_N6USB20_P6
USB20_N0
USB_OC#0_1_D
USB_OC#7
USB_OC#3
USB_OC#0_1_DUSB_OC#2
SLP_CHG_M3USB_OC#4_D
SLP_CHG_M4
USB_OC#4_DUSB_OC#0_1_D
CLK_PCH_48M
USB20_P1USB20_N1
USB20_P4
USB_OC#4_DUSB_OC#2USB_OC#7
USB_OC#3SLP_CHG_M4
SLP_CHG_M3
USB_OC#0_1_D
USB20_N4USB20_P3USB20_N3
CLK_PCIE_PCH#8CLK_PCIE_PCH8
CLK_PCH_48M 8
DMI_TXP05DMI_TXN05
DMI_RXP05DMI_RXN05
DMI_TXP15DMI_TXN15
DMI_RXP15DMI_RXN15
PCIE_PTX_C_IRX_P216
PCIE_ITX_C_PRX_P216
PCIE_PTX_C_IRX_N216
PCIE_ITX_C_PRX_N216
PCIE_PTX_C_IRX_P322PCIE_PTX_C_IRX_N322
PCIE_ITX_C_PRX_P322PCIE_ITX_C_PRX_N322
PCIE_PTX_C_IRX_P416PCIE_PTX_C_IRX_N416
PCIE_ITX_C_PRX_N416PCIE_ITX_C_PRX_P416
USB20_P0 17USB20_N0 17
USB20_N6 16
USB20_N7 15USB20_P7 15
USB20_P2 18USB20_N2 18
USB20_N5 16USB20_P5 16
USB20_P6 16
USB_OC#4 17,23USB_OC#0_1 17,23
USB20_P1 17USB20_N1 17
USB20_P4 17USB20_N4 17USB20_P3 21USB20_N3 21
+1.5VS
+3V_SB
+3V_EC +3V_EC
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
11 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
11 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
11 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
WLAN
LAN
WWLAN
USB3(Left)
BT
CMOS
USB2(Right)
WLAN
USB1(Right)
Please closed Tiger point PIN within 500 mils
Please closed Tiger point PIN within 200 mils
For EMI, Close to TigerPoint
PORT
USB PORT LIST
USB0DEVICE
USB2USB3USB4USB5USB6USB7
USB1USB3(Left)BTCard ReaderUSB2(Right)USB1(Right)
WLANCMOS
USB2(Right)USB1(Right)BTCard ReaderUSB3(Left)
WLANCMOS
Modify
7/17 Reassign Tiger point USB port for TOSHIBA concern
WWAN
WWAN WWAN
12/17 SLP_CHG_M3,SLP_CHG_M4 will be no used because it won't
support SLP_Charge function.
01/12 Change power from +3VALW to +3V_EC for leakage issue if EC
power change to +3VL
Card reader
C102322P_0402_50V8J@C102322P_0402_50V8J@
1
2
C1019 0.1U_0402_10V6KC1019 0.1U_0402_10V6K12
RP13
10K_0804_8P4R_5%
RP13
10K_0804_8P4R_5%1 82 73 64 5
RP12
10K_0804_8P4R_5%
RP12
10K_0804_8P4R_5%1 82 73 64 5C1018 0.1U_0402_10V6KC1018
0.1U_0402_10V6K12
R556330K_0402_5%@
R556330K_0402_5%@
1
2
R55322.6_0402_1%
R55322.6_0402_1%
2
TGP
U
S
B
DM
IPC
I-E
U15B
TIGERPOINT_ES1_BGA360
2
TGP
U
S
B
DM
IPC
I-E
U15B
TIGERPOINT_ES1_BGA360
DMI3RXNV21
USBP0N H7USBP0P H6USBP1N H3USBP1P H2USBP2N J2USBP2P J3USBP3N
K6USBP3P K5USBP4N K1USBP4P K2USBP5N L2USBP5P L3USBP6N M6USBP6P
M5USBP7N N1USBP7P N2
OC7#/GPIO31 C3
USBRBIAS G2USBRBIAS# G3
CLK48 F4
DMI0RXNR23DMI0RXPR24DMI0TXNP21DMI0TXPP20DMI1RXNT21DMI1RXPT20
DMI2RXPT18
DMI2TXPU24
DMI3RXPV20DMI3TXNV24DMI3TXPV23
PERN1K21PERP1K22PETN1J23PETP1J24PERN2M18PERP2M19PETN2K24PETP2K25PERN3L23PERP3L24PETN3L22PETP3M21PERN4P17PERP4P18PETN4N25PETP4N24
DMI_ZCOMPH24DMI_IRCOMPJ22
DMI_CLKNW23DMI_CLKPW24
OC6#/GPIO30 C2OC5#/GPIO29 E6
OC4# E5
OC1# C5
OC3# D2OC2# D3
OC0# D4
DMI2RXNT19DMI1TXPT25DMI1TXNT24
DMI2TXNU23
C1017 0.1U_0402_10V6KC1017 0.1U_0402_10V6K12
R559 0_0402_5%MP@
R559 0_0402_5%MP@
1 2
R555 24.9_0402_1%R555 24.9_0402_1%1 2
C1022 0.1U_0402_10V6K@C1022 0.1U_0402_10V6K@12
D43
CH751H-40PT_SOD323-2
@D43
CH751H-40PT_SOD323-2
@
2 1
C1020 0.1U_0402_10V6KC1020 0.1U_0402_10V6K12
R557330K_0402_5%@
R557330K_0402_5%@
1
2
R558 0_0402_5%MP@
R558 0_0402_5%MP@
1 2
R55433_0402_5%@
R55433_0402_5%@
1
2
D42
CH751H-40PT_SOD323-2
@D42
CH751H-40PT_SOD323-2
@
2 1
C1021 0.1U_0402_10V6K@C1021 0.1U_0402_10V6K@12
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_PWRGD
H_DPRSTP#H_DPSLP#
PCH_POK
PLTRST#
INTRUDER#
INTRUDER#
PCH_LOW_BAT#
PM_CLKRUN#
MCH_SYNC#PBTN_OUT#ICH_RI#
PCH_RSMRST#
SYS_RST#
EC_THERM#VGATE
INTVRMEN
EC_SWI#
INTVRMEN
SB_SPKR
EC_SMI#EC_SCI#
EC_LID_OUT#
PCH_ACINGPIO12
SLP_CHG#GPIO15
GPIO0BT_DET#
PCH_SMBCLKPCH_SMBDATA
SMLINK1
LINKALERT#
GPIO11
RTCRST#
BITCLK_PCHRST#_PCH
SDOUT_PCHSYNC_PCH
SMLINK0
RTCX2
RTCX1
PCH_SMBDATA
PCH_SMBCLK
PCH_ACINEC_PWROK
PCH_POK
PCH_RSMRST#
EC_SWI#
MCH_SYNC#
ICH_RI#
SYS_RST#
GPIO15
GPIO12EC_LID_OUT#
PCH_LOW_BAT#
GPIO11SMLINK0SMLINK1
LINKALERT#
PM_CLKRUN#
SLPIOVR
HDA_BITCLK
GPIO0
SLPIOVR
BT_DET#
SLP_CHG#
BOARD_ID
BOARD_ID
EC_CLK
PCH_RSMRST#PCH_POK
PLTRST#
H_PWRGD 6
H_DPRSTP# 6H_DPSLP# 6
PLTRST# 6,16,22,24
PM_SLP_S3# 23
PM_SLP_S5# 23PM_SLP_S4# 23
PM_DPRSLPVR 6
PBTN_OUT# 23
H_STP_PCI# 8H_STP_CPU# 8
EC_THERM# 23
EC_SWI# 23
SB_SPKR 19
EC_SMI# 23EC_SCI# 23
EC_LID_OUT# 23
PCH_SMBCLK8PCH_SMBDATA8
LPC_FRAME#23
LPC_AD323
CLK_PCH_14M8
LPC_AD223LPC_AD123LPC_AD023
HDA_BITCLK19HDA_RST#19HDA_SDIN019
HDA_SDOUT19HDA_SYNC19
ACIN 23,25,29
PCH_POK 6,23EC_PWROK6,23
VGATE8,23,33
EC_RSMRST# 23
BT_DET# 18
BT_RST# 18BT_OFF 18
EC_CLK 23
POK28,30
+RTCVCC
+RTCVCC
+3V_SB
+3V_SB
+3V_SB
+3VS
+3V_SB
+3VS
+3V_SB
+3V_SB
+3VS
+3VL
+RTCVCC
+RTCBATT
+3V_SB
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
12 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
12 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401897 CSCHEMATICS MB A5122
Custom
12 38Monday, September 20, 2010
2009/10/21 2012/10/21Compal Electronics, Inc.
For EMI, Close to TigerPoint
RSMRST# circuit
7/2 For EMI, Close to TigerPoint
7/20 Add test point
7/20 Add SLPIOVR pull up 8.2k to +3vs
7/21 Change C156 to 1u for Intel request
8/24 Add R573 pull down for EC request
9/1 R125 change to SM010027780 for EMI request
9/1 C207 change to SE071100J80 for EMI request
9/23 Change RP17 to R256, R257, R258 for layout request
12/17 Add Pull high Resistor for GPIO14
12/17 SLP_CHG# will be no used and need to Pull high
12/31 Add HW Board ID function
01/11 Reserve EC_CLK for KBC
3/23 reserve: C1030, U5, short:R586 3/23 reserve: D7A, D7B,
R589, Q36, R590, short R587
3/23 add D45, D46
3/30 change Y2 p/n SJ132P7K220->SJ132P7K230, gerber out
review
3/31 reserve R610
4/16 modify JUMP size and move to DDR2 socket
2010.04.22 Add C1064 for ESD solution
R576332K_0402_1% R576332K_0402_1%1 2
R5902.2K_0402_5%
@
R5902.2K_0402_5%
@12
R5602.2K_0402_5% R5602.2K_0402_5% 1 2
R583 10K_0402_5%R583 10K_0402_5%1 2
R5751M_0402_5% R5751M_0402_5% 1 2
D45
CH751H-40PT_SOD323-2
D45
CH751H-40PT_SOD323-2
2 1
C10281U_0402_6.3V4Z
C10281U_0402_6.3V4Z
1 2
C10291U_0402_6.3V6K
C10291U_0402_6.3V6K
1
2
R5778.2K_0402_5% R5778.2K_0402_5%
R
5
7
2
1
0
M
_
0
4
0
2
_
5
%
R
5
7
2
1
0
M
_
0
4
0
2
_
5
%
1
2
R5798.2K_0402_5% R5798.2K_0402_5%
D46
CH751H-40PT_SOD323-2
D46
CH751H-40PT_SOD323-2
21
D7BBAV99DW-7_SOT363
@D7BBAV99DW-7_SOT363
@
45
3
R58810K_0402_5%R58810K_0402_5%
1 2
R56410K_0402_5% R56410K_0402_5% 12
R5851K_0402_5% R5851K_0402_5% 1 2
R578330K_0402_5%R578330K_0402_5%
1
2
J1
JUMP_43X39
@J1
JUMP_43X39
@
11 2 2
R5612.2K_0402_5% R5612.2K_0402_5% 1 2
R586 0_0402_5%
MP@
R586 0_0402_5%
MP@1 2
R570 1K_0402_5%R570 1K_0402_5%1 2
R587 0_0402_5%MP@
R587 0_0402_5%MP@
12
RP14
10K_0804_8P4R_5%
RP14
10K_0804_8P4R_5%
18273645
R5638.2K_0402_5% R5638.2K_0402_5%
D44
CH751H-40PT_SOD323-2
D44
CH751H-40PT_SOD323-2
2 1
U5
TC7SH08FUF_SSOP5
@U5
TC7SH08FUF_SSOP5
@
B1
A2Y 4
P
5
G
3
RP15
8.2K_0804_8P4R_5%
RP15
8.2K_0804_8P4R_5%
1 82 73 64 5
C10300.1U_0402_16V4Z
@ C10300.1U_0402_16V4Z
@
1
2
R56833_0402_5% R56833_0402_5%1 2R56933_0402_5% R56933_0402_5%1
2
C10640.1U_0402_16V4Z
C10640.1U_0402_16V4Z
1
2
R56733_0402_5% R56733_0402_5%1 2
D6BAS40-04_SOT23-3D6BAS40-04_SOT23-3
1
23
C102518P_0402_50V8J
C102518P_0402_50V8J
12 R573100K_0402_5%R573100K_0402_5%
1
2
C102410P_0402_50V8JC102410P_0402_50V8J1
2
R56510K_0402_5% R56510K_0402_5% 12
R5808.2K_0402_5% R5808.2K_0402_5%
T42T42
D7ABAV99DW-7_SOT363
@D7ABAV99DW-7_SOT363
@
12
6
R566KC FBMA-11-100505-301T_0402 R566KC FBMA-11-100505-301T_0402
1 2
R571
10_0402_5%@
R571
10_0402_5%@
1
2
EPROM
TGP
M
I
S
C
RTC
SMB
SPILPC
AU
DIO
LAN
U15D
TIGERPOINT_ES1_BGA360
EPROM
TGP
M
I
S
C
RTC
SMB
SPILPC
AU
DIO
LAN
U15D
TIGERPOINT_ES1_BGA360
DPRSTP# AB23DPSLP# AA18RSVD31 F20
GPIO8 K18GPIO9 H19
GPIO10 M17GPIO12 A24GPIO13 C23GPIO14 P5GPIO15 E24
DPRSLPVR AB20STP_PCI# Y16
STP_CPU# AB19GPIO24 R3GPIO25 C24GPIO26 D19GPIO27 D20GPIO28
F22
CLKRUN# AC19GPIO33 U14GPIO34 AC1GPIO38 AC23GPIO39 AC24
CPUPWRGD/GPIO49 AB22
THRM# AB17VRMPWRGD V16MCH_SYNC# AC18
PWRBTN# E21RI# H23
SUS_STAT#/LPCPD# G22SUSCLK D22
SYS_RESET# G18PLTRST# G23
WAKE# C25INTRUDER# T8
PWROK U10RSMRST# AC3
INTVRMEN AD3SPKR J16
SLP_S3# H20SLP_S4# E25SLP_S5# F21
BATLOW# B25
LDRQ1#/GPIO23AA5LAD0/FWH0V6LAD1/FWH1AA6LAD2/FWH2Y5LAD3/FWH3W8
LFRAME#/FWH4Y4
HDA_RST#U2HDA_SDIN0W2HDA_SDIN1V2HDA_SDIN2P8HDA_SDOUTAA1HDA_SYNCY1CLK14AA3
EE_CSU3EE_DINAE2EE_DOUTT6EE_SHCLKV3
LAN_CLKT4LANR_RSTSYNCP7LAN_RST#B23LAN_RXD0AA2LAN_RXD1AD1LAN_RXD2AC2LAN_TXD0W3LAN_TXD1T7LAN_TXD2U4
RTCX1W4RTCX2V5RTCRST#T5
SMBALERT#/GPIO11E20SMBCLKH18SMBDATAE23LINKALERT#H21SMLINK0F25SMLINK1F24
SPI_MISOR2SPI_MOSIT1SPI_CS#M8SPI_CLKP9SPI_ARBR4
GPIO6 W16GPIO7 W14
BMBUSY#/GPIO0 T15
HDA_BIT_CLKP6
LDRQ0#Y8
R584 10K_0402_5%R584 10K_0402_5%1 2
Y232.768K_1TJS125BJ4A421P
Y232.768K_1TJS125BJ4A421P
OUT 4
IN 1
NC3
NC2
R5894.7K_0402_5%
@R5894.7K_0402_5%
@1 2
C102718P_0402_50V8J
C102718P_0402_50V8J
12
R61010K_0402_5%
@R61010K_0402_5%
@12
C
B
E
Q36MMBT3906_SOT23-3
@
C
B
E
Q36MMBT3906_SOT23-3
@1
2
3
R57420K_040
