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Computer Science 210Computer Organization
The
Arithmetic Logic Unit
ALU - General
• Goal is to design simple ALU
• Actually there are relatively few basic arithmetic logic operations needed
• Many instructions can be implemented in terms of the basic ones
ALU Building Blocks
AND GateNOT Gate
OR Gate Multiplexor
• Let's build an ALU to support the andi and ori instructions– we'll just build a 1 bit ALU, and use 32 of them
An ALU (arithmetic logic unit)
ba
operation
result
• Selects one of the inputs to be the output, based on a control input
• We’ll use a MUX for our ALU
Review: The Multiplexer
0
1
S
CA
B
1-Bit Logical Unit
0
1
0 - AndOperation 1 - Or
Result
Operation
1-Bit ALU with Addition
b
0
2
R e su lt
O pe ra t io n
a
1
C a rry In
C a rryO u t
32 bit ALU
b
0
2
Result
Operation
a
1
CarryIn
CarryOut
Result31a31
b31
Result0
CarryIn
a0
b0
Result1a1
b1
Result2a2
b2
Operation
ALU0
CarryIn
CarryOut
ALU1
CarryIn
CarryOut
ALU2
CarryIn
CarryOut
ALU31
CarryIn
• Two's complement approach: just negate b and add one.
• How do we negate?
What about subtraction (a – b) ?
0
2
Result
Operation
a
1
CarryIn
CarryOut
0
1
Binvert
b
32 bit ALU
Result31a31
b31
Result0
CarryIn
a0
b0
Result1a1
b1
Result2a2
b2
Operation
ALU0
CarryIn
CarryOut
ALU1
CarryIn
CarryOut
ALU2
CarryIn
CarryOut
ALU31
CarryIn
0
2
Result
Operation
a
1
CarryIn
CarryOut
0
1
b
binvert
binvert = 1, carryin = 1, operation = 2, gives a + ~b + 1 = a - b
binvert
+
Overflow Detection
Operation Operand A Operand B Result
+ 0 0 < 0
+ < 0 < 0 0
- 0 < 0 < 0
- < 0 0 0
Note: This can be determined by what happens in the high order bit.
Overflow Detection
Operation A’s High Bit B’s High Bit ResultHigh Bit
+ 0 0 1
+ 1 1 0
- 0 1 1
- 1 0 0
Note: If we used the output of the binvert MUX, the rows for subtraction would be the same as for addition.
Overflow Detection
A’s High Bit
Binvert MUX ResultHigh Bit
Overflow
0 0 1 1
1 1 0 1
Note: The other rows of a truth table for Overflow wouldbe 0. So, we could build an overflow detector with
_ _ _AMR + AMR
High Order 1-Bit ALU(with overflow hardware)
0
2
Resu lt
O peration
a
1
Carry In
CarryOut
0
1
B inve rt
b
Overflow
