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Computers asComponents

Principles of EmbeddedComputing System Design

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About the Author

Wayne Wolf is Professor,Rhesea“Ray”P. Farmer Distinguished Chair in EmbeddedComputing,and Georgia Research Alliance Eminent Scholar at the Georgia Instituteof Technology. Before joining Georgia Tech, he was with Princeton University andAT&T Bell Laboratories in Murray Hill, New Jersey. He received his B.S., M.S., andPh.D. in electrical engineering from Stanford University. He is well known for hisresearch in the areas of hardware/software co-design, embedded computing,VLSICAD, and multimedia computing systems. He is a fellow of the IEEE and ACM. Heco-founded several conferences in the area, including CODES, MPSoC, and Embed-ded Systems Week. He was founding co-editor-in-chief of Design Automation forEmbedded Systems and founding editor-in-chief of ACM Transactions on Embed-ded Computing Systems. He has received the ASEE Frederick E. Terman Award andthe IEEE Circuits and Society Education Award. He is also co-series editor of theMorgan Kaufmann Series in Systems on Silicon.

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Computers asComponents

Principles of EmbeddedComputing System Design

Second Edition

Wayne Wolf

AMSTERDAM • BOSTON • HEIDELBERG • LONDON

NEW YORK • OXFORD • PARIS • SAN DIEGO

SAN FRANCISCO • SINGAPORE • SYDNEY •TOKYO

Morgan Kaufmann Publishers is an imprint of Elsevier

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Morgan Kaufmann Publishers is an imprint of Elsevier.30 Corporate Drive, Suite 400, Burlington, MA 01803, USA

This book is printed on acid-free paper. �©Copyright © 2008, Wayne Hendrix Wolf. Published by Elsevier Inc. All rights reserved.

Cover Images © iStockphoto.

Designations used by companies to distinguish their products are often claimed as trademarks orregistered trademarks. In all instances in which Morgan Kaufmann Publishers is aware of a claim, theproduct names appear in initial capital or all capital letters. Readers, however, should contact theappropriate companies for more complete information regarding trademarks and registration.

No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any formor by any means—electronic, mechanical, photocopying, scanning, or otherwise—without priorwritten permission of the publisher.

Permissions may be sought directly from Elsevier’s Science & Technology Rights Department in Oxford,UK: phone: (+44) 1865 843830, fax: (+44) 1865 853333, E-mail: permissions@elsevier.com.You may also complete your request online via the Elsevier homepage (http://elsevier.com), byselecting “Support & Contact” then “Copyright and Permission”and then “Obtaining Permissions.”

Library of Congress Cataloging-in-Publication DataWolf, Wayne Hendrix.

Computers as components: principles of embedded computing system design/by Wayne Wolf – 2nd ed.p. cm.

Includes bibliographical references and index.ISBN 978-0-12-374397-8 (pbk. : alk. paper)

1. System design. 2. Embedded computer systems. I. Title.QA76.9.S88W64 2001004.16–dc22

2008012300

ISBN: 978-0-12-374397-8

For information on all Morgan Kaufmann publications,visit our website at www.mkp.com or www.books.elsevier.com

Printed in the United States of America08 09 10 11 12 5 4 3 2 1

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To Nancy and Alec

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Disclaimer

Designations used by companies to distinguish their products are often claimedas trademarks or registered trademarks. In all instances where Morgan KaufmannPublishers is aware of a claim, the product names appear in initial capital or allcapital letters. Readers, however, should contact the appropriate companies formore complete information regarding trademarks and registration.

ARM, the ARM Powered logo, StrongARM,Thumb and ARM7TDMI are registeredtrademarks of ARM Ltd. ARM Powered, ARM7, ARM7TDMI-S, ARM710T, ARM740T,ARM9, ARM9TDMI, ARM940T, ARM920T, EmbeddedICE, ARM7T-S, Embedded-ICE-RT, ARM9E, ARM946E, ARM966E, ARM10, AMBA, and Multi-ICE are trademarksof ARM Limited. All other brand names or product names are the property of theirrespective holders. “ARM” is used to represent ARM Holdings plc (LSE: ARM andNASDAQ:ARMHY); its operating company,ARM Ltd; and the regional subsidiaries:ARM, INC., ARM KK; ARM Korea, Ltd.

Microsoft and Windows are registered trademarks and Windows NT is a trade-mark of Microsoft Corporation. Pentium is a trademark of Intel Corporation.All othertrademarks and logos are property of their respective holders. TMS320C55x, C55x,and Code Composer Studio are trademarks of Texas Instruments Incorporated.

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Foreword to The First Edition

Digital system design has entered a new era. At a time when the design ofmicroprocessors has shifted into a classical optimization exercise, the design ofembedded computing systems in which microprocessors are merely componentshas become a wide-open frontier. Wireless systems, wearable systems, networkedsystems,smart appliances,industrial process systems,advanced automotive systems,and biologically interfaced systems provide a few examples from across this newfrontier.

Driven by advances in sensors, transducers, microelectronics, processor per-formance, operating systems, communications technology, user interfaces, andpackaging technology on the one hand, and by a deeper understanding of humanneeds and market possibilities on the other, a vast new range of systems and appli-cations is opening up. It is now up to the architects and designers of embeddedsystems to make these possibilities a reality.

However, embedded system design is practiced as a craft at the present time.Although knowledge about the component hardware and software subsystems isclear, there are no system design methodologies in common use for orchestratingthe overall design process, and embedded system design is still run in an ad hocmanner in most projects.

Some of the challenges in embedded system design come from changes in under-lying technology and the subtleties of how it can all be correctly mingled andintegrated. Other challenges come from new and often unfamiliar types of sys-tem requirements. Then too, improvements in infrastructure and technology forcommunication and collaboration have opened up unprecedented possibilities forfast design response to market needs. However, effective design methodologiesand associated design tools have not been available for rapid follow-up of theseopportunities.

At the beginning of the VLSI era, transistors and wires were the fundamentalcomponents, and the rapid design of computers on a chip was the dream. Todaythe CPU and various specialized processors and subsystems are merely basic com-ponents, and the rapid, effective design of very complex embedded systems is thedream. Not only are system specifications now much more complex,but they mustalso meet real-time deadlines, consume little power, effectively support complexreal-time user interfaces,be very cost-competitive,and be designed to be upgradable.

Wayne Wolf has created the first textbook to systematically deal with this arrayof new system design requirements and challenges. He presents formalisms and amethodology for embedded system design that can be employed by the new type of“tall-thin”system architect who really understands the foundations of system designacross a very wide range of its component technologies.

Moving from the basics of each technology dimension,Wolf presents formalismsfor specifying and modeling system structures and behaviors and then clarifies these

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viii Foreword to The First Edition

ideas through a series of design examples. He explores the complexities involvedand how to systematically deal with them. You will emerge with a sense of clarityabout the nature of the design challenges ahead and with knowledge of key methodsand tools for tackling those challenges.

As the first textbook on embedded system design,this book will prove invaluableas a means for acquiring knowledge in this important and newly emerging field.It will also serve as a reference in actual design practice and will be a trustedcompanion in the design adventures ahead. I recommend it to you highly.

Lynn ConwayProfessor Emerita, Electrical Engineering and

Computer Science University of Michigan

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Contents

About the Author. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii

Foreword to The First Edition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii

List of Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xvii

Preface to The Second Edition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xix

Preface to The First Edition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xxi

CHAPTER 1 Embedded Computing 1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1 Complex Systems and Microprocessors . . . . . . . . . . . . . . . . . . . . . . . 11.1.1 Embedding Computers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21.1.2 Characteristics of Embedded Computing

Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41.1.3 Why Use Microprocessors? . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61.1.4 The Physics of Software. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81.1.5 Challenges in Embedded Computing System

Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81.1.6 Performance in Embedded Computing . . . . . . . . . . . . . . . 10

1.2 The Embedded System Design Process . . . . . . . . . . . . . . . . . . . . . . . . 111.2.1 Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121.2.2 Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171.2.3 Architecture Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181.2.4 Designing Hardware and Software

Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 201.2.5 System Integration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

1.3 Formalisms for System Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 211.3.1 Structural Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221.3.2 Behavioral Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

1.4 Model Train Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 301.4.1 Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 311.4.2 DCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 321.4.3 Conceptual Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 341.4.4 Detailed Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 371.4.5 Lessons Learned . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

1.5 A Guided Tour of This Book . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 451.5.1 Chapter 2: Instruction Sets. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 461.5.2 Chapter 3: CPUs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 461.5.3 Chapter 4: Bus-Based Computer Systems . . . . . . . . . . . . . 46

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1.5.4 Chapter 5: Program Design and Analysis . . . . . . . . . . . . . . 471.5.5 Chapter 6: Processes and Operating Systems . . . . . . . . . 481.5.6 Chapter 7: Multiprocessors . . . . . . . . . . . . . . . . . . . . . . . . . . . . 491.5.7 Chapter 8: Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 501.5.8 Chapter 9: System Design Techniques. . . . . . . . . . . . . . . . . 50Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51Further Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51Questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52Lab Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

CHAPTER 2 Instruction Sets 55Introducton. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

2.1 Preliminaries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 552.1.1 Computer Architecture Taxonomy . . . . . . . . . . . . . . . . . . . . 552.1.2 Assembly Language . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

2.2 ARM Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 592.2.1 Processor and Memory Organization . . . . . . . . . . . . . . . . . 602.2.2 Data Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 612.2.3 Flow of Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

2.3 TI C55x DSP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 762.3.1 Processor and Memory Organization . . . . . . . . . . . . . . . . . 762.3.2 Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 782.3.3 Data Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 822.3.4 Flow of Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 832.3.5 C Coding Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86Further Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86Questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86Lab Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

CHAPTER 3 CPUs 91Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

3.1 Programming Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 913.1.1 Input and Output Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 923.1.2 Input and Output Primitives . . . . . . . . . . . . . . . . . . . . . . . . . . . 933.1.3 Busy-Wait I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 953.1.4 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

3.2 Supervisor Mode, Exceptions, and Traps . . . . . . . . . . . . . . . . . . . . . . . 1103.2.1 Supervisor Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1113.2.2 Exceptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1113.2.3 Traps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

3.3 Co-Processors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

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3.4 Memory System Mechanisms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1133.4.1 Caches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1133.4.2 Memory Management Units and Address

Translation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1193.5 CPU Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124

3.5.1 Pipelining . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1243.5.2 Caching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128

3.6 CPU Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1293.7 Design Example: Data Compressor . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134

3.7.1 Requirements and Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . 1343.7.2 Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1363.7.3 Program Design. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1393.7.4 Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147Further Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147Questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148Lab Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151

CHAPTER 4 Bus-Based Computer Systems 153Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153

4.1 The CPU Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1534.1.1 Bus Protocols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1544.1.2 DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1604.1.3 System Bus Configurations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1624.1.4 AMBA Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165

4.2 Memory Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1664.2.1 Memory Device Organization . . . . . . . . . . . . . . . . . . . . . . . . . 1664.2.2 Random-Access Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1674.2.3 Read-Only Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169

4.3 I/O devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1694.3.1 Timers and Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1694.3.2 A/D and D/A Converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1714.3.3 Keyboards. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1714.3.4 LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1734.3.5 Displays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1734.3.6 Touchscreens . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175

4.4 Component Interfacing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1754.4.1 Memory Interfacing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1764.4.2 Device Interfacing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176

4.5 Designing with Microprocessors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1774.5.1 System Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1774.5.2 Hardware Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1794.5.3 The PC as a Platform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180

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4.6 Development and Debugging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1834.6.1 Development Environments . . . . . . . . . . . . . . . . . . . . . . . . . . . 1834.6.2 Debugging Techniques . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1844.6.3 Debugging Challenges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187

4.7 System-Level Performance Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1894.7.1 System-Level Performance Analysis. . . . . . . . . . . . . . . . . . . . 1894.7.2 Parallelism. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194

4.8 Design Example: Alarm Clock. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1964.8.1 Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1964.8.2 Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1984.8.3 System Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2004.8.4 Component Design and Testing . . . . . . . . . . . . . . . . . . . . . . . 2034.8.5 System Integration and Testing . . . . . . . . . . . . . . . . . . . . . . . . 204Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204Further Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 205Questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 205Lab Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207

CHAPTER 5 Program Design and Analysis 209Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 209

5.1 Components for Embedded Programs . . . . . . . . . . . . . . . . . . . . . . . . . 2105.1.1 State Machines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2105.1.2 Stream-Oriented Programming and Circular

Buffers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2125.1.3 Queues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213

5.2 Models of Programs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2155.2.1 Data Flow Graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2155.2.2 Control/Data Flow Graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217

5.3 Assembly, Linking, and Loading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2205.3.1 Assemblers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2225.3.2 Linking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225

5.4 Basic Compilation Techniques . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2275.4.1 Statement Translation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2295.4.2 Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2335.4.3 Data Structures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234

5.5 Program Optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2365.5.1 Expression Simplification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2365.5.2 Dead Code Elimination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2375.5.3 Procedure Inlining . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2375.5.4 Loop Transformations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2385.5.5 Register Allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2395.5.6 Scheduling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2445.5.7 Instruction Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246

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5.5.8 Understanding and Using your Compiler . . . . . . . . . . . . . 2475.5.9 Interpreters and JIT Compilers . . . . . . . . . . . . . . . . . . . . . . . . 247

5.6 Program-Level Performance Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . 2485.6.1 Elements of Program Performance . . . . . . . . . . . . . . . . . . . . 2505.6.2 Measurement-Driven Performance Analysis . . . . . . . . . . 254

5.7 Software Performance Optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . 2575.7.1 Loop Optimizations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2575.7.2 Performance Optimization Strategies . . . . . . . . . . . . . . . . . 261

5.8 Program-Level Energy and Power Analysisand Optimization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 262

5.9 Analysis and Optimization of Program Size . . . . . . . . . . . . . . . . . . . . 2665.10 Program Validation and Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 267

5.10.1 Clear-Box Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2685.10.2 Black-Box Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2765.10.3 Evaluating Function Tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 277

5.11 Software Modem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2785.11.1 Theory of Operation and Requirements . . . . . . . . . . . . . . 2785.11.2 Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2805.11.3 System Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2805.11.4 Component Design and Testing . . . . . . . . . . . . . . . . . . . . . . . 2825.11.5 System Integration and Testing . . . . . . . . . . . . . . . . . . . . . . . . 282Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 282Further Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 283Questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 283Lab Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 291

CHAPTER 6 Processes and Operating Systems 293Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293

6.1 Multiple Tasks and Multiple Processes . . . . . . . . . . . . . . . . . . . . . . . . . 2946.1.1 Tasks and Processes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2946.1.2 Multirate Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2966.1.3 Timing Requirements on Processes . . . . . . . . . . . . . . . . . . . 2986.1.4 CPU Metrics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3026.1.5 Process State and Scheduling . . . . . . . . . . . . . . . . . . . . . . . . . . 3036.1.6 Some Scheduling Policies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3036.1.7 Running Periodic Processes . . . . . . . . . . . . . . . . . . . . . . . . . . . 306

6.2 Preemptive Real-Time Operating Systems . . . . . . . . . . . . . . . . . . . . . 3086.2.1 Preemption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3086.2.2 Priorities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3096.2.3 Processes and Context . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3106.2.4 Processes and Object-Oriented Design . . . . . . . . . . . . . . . 315

6.3 Priority-Based Scheduling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3166.3.1 Rate-Monotonic Scheduling. . . . . . . . . . . . . . . . . . . . . . . . . . . . 3166.3.2 Earliest-Deadline-First Scheduling . . . . . . . . . . . . . . . . . . . . . 320

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6.3.3 RMS vs. EDF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3236.3.4 A Closer Look at Our Modeling Assumptions. . . . . . . . . 324

6.4 Interprocess Communication Mechanisms. . . . . . . . . . . . . . . . . . . . 3256.4.1 Shared Memory Communication . . . . . . . . . . . . . . . . . . . . . . 3266.4.2 Message Passing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3296.4.3 Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 329

6.5 Evaluating Operating System Performance . . . . . . . . . . . . . . . . . . . . 3306.6 Power Management and Optimization for Processes . . . . . . . . . 3336.7 Design Example: Telephone Answering Machine . . . . . . . . . . . . . 336

6.7.1 Theory of Operation and Requirements . . . . . . . . . . . . . . 3366.7.2 Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3406.7.3 System Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3426.7.4 Component Design and Testing . . . . . . . . . . . . . . . . . . . . . . . 3446.7.5 System Integration and Testing . . . . . . . . . . . . . . . . . . . . . . . . 345Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 345Further Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 346Questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 346Lab Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 352

CHAPTER 7 Multiprocessors 353Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 353

7.1 Why Multiprocessors?. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3537.2 CPUs and Accelerators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 356

7.2.1 System Architecture Framework. . . . . . . . . . . . . . . . . . . . . . . 3577.2.2 System Integration and Debugging. . . . . . . . . . . . . . . . . . . . 360

7.3 Multiprocessor Performance Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . 3607.3.1 Accelerators and Speedup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3607.3.2 Performance Effects of Scheduling and Allocation . . . 3647.3.3 Buffering and Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . 368

7.4 Consumer Electronics Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3697.4.1 Use Cases and Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . 3697.4.2 Platforms and Operating Systems . . . . . . . . . . . . . . . . . . . . . 3717.4.3 Flash File Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 372

7.5 Design Example: Cell Phones . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3737.6 Design Example: Compact DISCS and DVDS . . . . . . . . . . . . . . . . . 3757.7 Design Example: Audio Players . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3807.8 Design Example: Digital Still Cameras . . . . . . . . . . . . . . . . . . . . . . . . . 3817.9 Design Example: Video Accelerator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 384

7.9.1 Algorithm and Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . 3847.9.2 Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3887.9.3 Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3887.9.4 Component Design. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3907.9.5 System Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 392

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Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 392Further Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 393Questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 393Lab Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 395

CHAPTER 8 Networks 397Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 397

8.1 Distributed Embedded Architectures . . . . . . . . . . . . . . . . . . . . . . . . . . 3988.1.1 Why Distributed? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3998.1.2 Network Abstractions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3998.1.3 Hardware and Software Architectures . . . . . . . . . . . . . . . . 4018.1.4 Message Passing Programming . . . . . . . . . . . . . . . . . . . . . . . . 404

8.2 Networks for Embedded Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4058.2.1 The I2C Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4068.2.2 Ethernet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4118.2.3 Fieldbus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 413

8.3 Network-Based Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4138.4 Internet-Enabled Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 416

8.4.1 Internet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4178.4.2 Internet Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4198.4.3 Internet Security. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 421

8.5 Vehicles as Networks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4218.5.1 Automotive Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4228.5.2 Avionics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 425

8.6 Sensor Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4268.7 Design Example: Elevator Controller . . . . . . . . . . . . . . . . . . . . . . . . . . 427

8.7.1 Theory of Operation and Requirements . . . . . . . . . . . . . . 4288.7.2 Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4308.7.3 Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4318.7.4 Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 433Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 434Further Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 434Questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 434Lab Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 436

CHAPTER 9 System Design Techniques 437Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 437

9.1 Design Methodologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4379.1.1 Why Design Methodologies? . . . . . . . . . . . . . . . . . . . . . . . . . . . 4379.1.2 Design Flows . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 439

9.2 Requirements Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 446

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9.3 Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4479.3.1 Control-Oriented Specification Languages. . . . . . . . . . . . 4479.3.2 Advanced Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 451

9.4 System Analysis and Architecture Design . . . . . . . . . . . . . . . . . . . . . . 4549.5 Quality Assurance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 457

9.5.1 Quality Assurance Techniques . . . . . . . . . . . . . . . . . . . . . . . . . 4609.5.2 Verifying the Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4629.5.3 Design Reviews. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 464Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 466Further Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 466Questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 466Lab Exercises . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 467

APPENDIX A UML Notations 469Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 469

A.1 Primitive Elements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 469A.2 Diagram Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 469

A.2.1 Class Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 471A.2.2 State Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 471A.2.3 Sequence and Collaboration Diagrams . . . . . . . . . . . . . . . 473

Glossary 475

References 489

Index 497

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List of Examples

Application Example 1.1 BMW 850i brake and stability control system . . . . . 3Example 1.1 Requirements analysis of a GPS moving map . . . . . . . . . . . . . . . . . . . . 15Example 2.1 Status bit computation in the ARM .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62Example 2.2 C assignments in ARM instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67Example 2.3 Implementing an if statement in ARM .. . . . . . . . . . . . . . . . . . . . . . . . . 70Example 2.4 Implementing the C switch statement in ARM .. . . . . . . . . . . . . . . . . 71Application Example 2.1 FIR filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72Example 2.5 An FIR filter for the ARM .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72Example 2.6 Procedure calls in ARM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75Application Example 3.1 The 8251 UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92Example 3.1 Memory-mapped I/O on ARM.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94Example 3.2 Busy-wait I/O Programming. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95Example 3.3 Copying characters from input to output using

busy-wait I/O. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96Example 3.4 Copying characters from input to output with basic

interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98Example 3.5 Copying characters from input to output with interrupts

and buffers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99Example 3.6 Debugging interrupt code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103Example 3.7 I/O with prioritized interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106Example 3.8 Direct-mapped vs. set-associative caches . . . . . . . . . . . . . . . . . . . . . . . . 117Example 3.9 Execution time of a for loop on the ARM .. . . . . . . . . . . . . . . . . . . . . . . 127Application Example 3.2 Energy efficiency features in the PowerPC 603. . . . 130Application Example 3.3 Power-saving modes of the StrongARM SA-1100 . . 132Application Example 3.4 Huffman coding for text compression . . . . . . . . . . . . . 134Example 4.1 A glue logic interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176Application Example 4.1 System organization of the Intel StrongARM

SA-1100 and SA-1111 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182Programming Example 4.1 Breakpoints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185Example 4.2 A timing error in real-time code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187Example 4.3 Performance bottlenecks in a bus-based system. . . . . . . . . . . . . . . . . 193Programming Example 5.1 A software state machine . . . . . . . . . . . . . . . . . . . . . . . . . . 210Programming Example 5.2 A circular buffer implementation of an FIR

filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213Programming Example 5.3 A buffer-based queue . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214Example 5.1 Generating a symbol table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223Example 5.2 Compiling an arithmetic expression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229Example 5.3 Generating code for a conditional . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231Example 5.4 Loop unrolling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 238Example 5.5 Register allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240

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xviii List of Examples

Example 5.6 Operator scheduling for register allocation . . . . . . . . . . . . . . . . . . . . . . 243Example 5.7 Data-dependent paths in if statements . . . . . . . . . . . . . . . . . . . . . . . . . . 251Example 5.8 Paths in a loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252Example 5.9 Cycle-accurate simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 256Example 5.10 Data realignment and array padding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260Example 5.11 Controlling and observing programs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 268Example 5.12 Choosing the paths to test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 270Example 5.13 Condition testing with the branch testing strategy. . . . . . . . . . . . . . 273Application Example 6.1 Automotive engine control . . . . . . . . . . . . . . . . . . . . . . . . . . 296Application Example 6.2 A space shuttle software error . . . . . . . . . . . . . . . . . . . . . . 300Example 6.1 Utilization of a set of processes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 304Example 6.2 Priority-driven scheduling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 309Example 6.3 Rate-monotonic scheduling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 317Example 6.4 Earliest-deadline-first scheduling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 320Example 6.5 Priority inversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 324Example 6.6 Data dependencies and scheduling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 325Example 6.7 Elastic buffers as shared memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 326Programming Example 6.1 Test-and-set operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 328Example 6.8 Scheduling and context switching overhead . . . . . . . . . . . . . . . . . . . . 330Example 6.9 Effects of scheduling on the cache . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 332Example 7.1 Performance effects of scheduling and allocation . . . . . . . . . . . . . . . 365Example 7.2 Overlapping computation and communication . . . . . . . . . . . . . . . . . 366Example 7.3 Buffers and latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 368Example 8.1 Data-push network architectures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 405Example 8.2 Simple message delay for an I2C message. . . . . . . . . . . . . . . . . . . . . . . . 414Application Example 8.1 An Internet video camera . . . . . . . . . . . . . . . . . . . . . . . . . . . 420Application Example 9.1 Loss of the Mars Climate Observer . . . . . . . . . . . . . . . . . 439Example 9.1 Concurrent engineering applied to telephone systems . . . . . . . . . 444Application Example 9.2 The TCAS II specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . 451Example 9.2 CRC card analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 456Application Example 9.3 The Therac-25 medical imaging system. . . . . . . . . . . . . 458

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Preface to The Second Edition

Embedded computing is more important today than it was in 2000, when the firstedition of this book appeared. Embedded processors are in even more products,ranging from toys to airplanes. Systems-on-chips now use up to hundreds of CPUs.The cell phone is on its way to becoming the new standard computing platform.As my column in IEEE Computer in September 2006 indicated, there are at least ahalf-million embedded systems programmers in the world today,probably closer to800,000.

In this edition I have tried to both update and revamp. One major change isthat the book now uses the TI TMS320C55x™ (C55x) DSP. I seriously rewrote thediscussion of real-time scheduling. I have tried to expand on performance analysisas a theme at as many levels of abstraction as possible. Given the importance ofmultiprocessors in even the most mundane embedded systems, this edition alsotalks more generally about hardware/software co-design and multiprocessors.

One of the changes in the field is that this material is taught at lower and lowerlevels of the curriculum. What used to be graduate material is now upper-divisionundergraduate; some of this material will percolate down to the sophomore levelin the foreseeable future. I think that you can use subsets of this book to coverboth more advanced and more basic courses. Some advanced students may notneed the background material of the earlier chapters and you can spend more timeon software performance analysis, scheduling,and multiprocessors. When teachingintroductory courses,software performance analysis is an alternative path to explor-ing microprocessor architectures as well as software; such courses can concentrateon the first few chapters.

The new Web site for this book and my other books is http://www.waynewolf.us. On this site, you can find overheads for the material in this book,suggestions for labs, and links to more information on embedded systems.

ACKNOWLEDGMENTSI would like to thank a number of people who helped me with this second edition.Cathy Wicks and Naser Salameh of Texas Instruments gave me invaluable help infiguring out the C55x. Richard Barry of freeRTOS.org not only graciously allowedme to quote from the source code of his operating system but he also helped clarifythe explanation of that code. My editor at Morgan Kaufmann, Chuck Glaser, knewwhen to be patient, when to be encouraging, and when to be cajoling. (He alsohas great taste in sushi restaurants.) And of course, Nancy and Alec patiently let metype away. Any problems, small or large, with this book are, of course, solely myresponsibility.

Wayne WolfAtlanta, GA, USA

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Preface to The First Edition

Microprocessors have long been a part of our lives. However,microprocessors havebecome powerful enough to take on truly sophisticated functions only in the pastfew years. The result of this explosion in microprocessor power, driven by Moore’sLaw, is the emergence of embedded computing as a discipline. In the early days ofmicroprocessors, when all the components were relatively small and simple, it wasnecessary and desirable to concentrate on individual instructions and logic gates.Today,when systems contain tens of millions of transistors and tens of thousands oflines of high-level language code, we must use design techniques that help us dealwith complexity.

This book tries to capture some of the basic principles and techniques of this newdiscipline of embedded computing. Some of the challenges of embedded computingare well known in the desktop computing world. For example, getting the highestperformance out of pipelined, cached architectures often requires careful analysisof program traces. Similarly, the techniques developed in software engineering forspecifying complex systems have become important with the growing complexityof embedded systems. Another example is the design of systems with multipleprocesses. The requirements on a desktop general-purpose operating system anda real-time operating system are very different; the real-time techniques developedover the past 30 years for larger real-time systems are now finding common use inmicroprocessor-based embedded systems.

Other challenges are new to embedded computing. One good example is powerconsumption.While power consumption has not been a major consideration in tra-ditional computer systems,it is an essential concern for battery-operated embeddedcomputers and is important in many situations in which power supply capacity islimited by weight, cost, or noise. Another challenge is deadline-driven program-ming. Embedded computers often impose hard deadlines on completion timesfor programs; this type of constraint is rare in the desktop world. As embeddedprocessors become faster, caches and other CPU elements also make executiontimes less predictable. However, by careful analysis and clever programming, wecan design embedded programs that have predictable execution times even in theface of unpredictable system components such as caches.

Luckily, there are many tools for dealing with the challenges presented by com-plex embedded systems: high-level languages, program performance analysis tools,processes and real-time operating systems, and more. But understanding how allthese tools work together is itself a complex task. This book takes a bottom-upapproach to understanding embedded system design techniques. By first under-standing the fundamentals of microprocessor hardware and software,we can buildpowerful abstractions that help us create complex systems.

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xxii Preface to The First Edition

A NOTE TO EMBEDDED SYSTEM PROFESSIONALSThis book is not a manual for understanding a particular microprocessor. Whyshould the techniques presented here be of interest to you? There are two rea-sons. First,techniques such as high-level language programming and real-time opera-ting systems are very important in making large, complex embedded systems thatactually work. The industry is littered with failed system designs that didn’t workbecause their designers tried to hack their way out of problems rather than step-ping back and taking a wider view of the problem. Second, the components usedto build embedded systems are constantly changing, but the principles remainconstant. Once you understand the basic principles involved in creating com-plex embedded systems, you can quickly learn a new microprocessor (or evenprogramming language) and apply the same fundamental principles to your newcomponents.

A NOTE TO TEACHERSThe traditional microprocessor system design class originated in the 1970s whenmicroprocessors were exotic yet relatively limited.That traditional class emphasizesbreadboarding hardware and software to build a complete system. As a result, itconcentrates on the characteristics of a particular microprocessor, including itsinstruction set, bus interface, and so on.

This book takes a more abstract approach to embedded systems. While I havetaken every opportunity to discuss real components and applications, this bookis fundamentally not a microprocessor data book. As a result, its approach mayseem initially unfamiliar. Rather than concentrating on particulars, the book tries tostudy more generic examples to come up with more generally applicable principles.However, I think that this approach is both fundamentally easier to teach and inthe long run more useful to students. It is easier because one can rely less oncomplex lab setups and spend more time on pencil-and-paper exercises,simulations,and programming exercises. It is more useful to the students because their eventualwork in this area will almost certainly use different components and facilities thanthose used at your school. Once students learn fundamentals, it is much easier forthem to learn the details of new components.

Hands-on experience is essential in gaining physical intuition about embeddedsystems. Some hardware building experience is very valuable; I believe that everystudent should know the smell of burning plastic integrated circuit packages. ButI urge you to avoid the tyranny of hardware building. If you spend too much timebuilding a hardware platform, you will not have enough time to write interestingprograms for it. And as a practical matter, most classes do not have the time to letstudents build sophisticated hardware platforms with high-performance I/O devicesand possibly multiple processors.A lot can be learned about hardware by measuringand evaluating an existing hardware platform. The experience of programming

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Preface to The First Edition xxiii

complex embedded systems will teach students quite a bit about hardware aswell—debugging interrupt-driven code is an experience that few students are likelyto forget.

A home page for the book (www.mkp.com/embed) includes overheads, instruc-tor’s manual, lab materials, links to related Web sites, and a link to a password-protected ftp site that contains solutions to the exercises.

ACKNOWLEDGMENTSI owe a word of thanks to many people who helped me in the preparation ofthis book. Several people gave me advice about various aspects of the book:Steve Johnson (Indiana University) about specification, Louise Trevillyan and MarkCharney (both IBM Research) on program tracing, Margaret Martonosi (Prince-ton University) on cache miss equations, Randy Harr (Synopsys) on low power,Phil Koopman (Carnegie Mellon University) on distributed systems, Joerg Henkel(NEC C&C Labs) on low-power computing and accelerators, Lui Sha (Univer-sity of Illinois) on real-time operating systems, John Rayfield (ARM) on the ARMarchitecture, David Levine (Analog Devices) on compilers and SHARC, and ConKorikis (Analog Devices) on the SHARC. Many people acted as reviewers atvarious stages: David Harris (Harvey Mudd College); Jan Rabaey (University ofCalifornia at Berkeley); David Nagle (Carnegie Mellon University); Randy Harr (Syn-opsys); Rajesh Gupta, Nikil Dutt, Frederic Doucet, and Vivek Sinha (Universityof California at Irvine); Ronald D. Williams (University of Virginia); Steve Sapiro(SC Associates); Paul Chow (University of Toronto); Bernd G. Wenzel (Eurostep);Steve Johnson (Indiana University); H. Alan Mantooth (University of Arkansas);Margarida Jacome (University of Texas at Austin); John Rayfield (ARM); DavidLevine (Analog Devices); Ardsher Ahmed (University of Massachusetts/DartmouthUniversity); and Vijay Madisetti (Georgia Institute of Technology). I also owe abig word of thanks to my editor, Denise Penrose. Denise put in a great dealof effort finding and talking to potential users of this book to help us under-stand what readers wanted to learn. This book owes a great deal to her insightand persistence. Cheri Palmer and her production team did an excellent jobon an impossibly tight schedule. The mistakes and miscues are, of course, allmine.