Cross Hole Ultrasonic Monitor

Characterization Presentation

High Speed Digital Signal Lab

Students :Lotem SharonYuval Sela

Instructor : Ina Rivkin

Cross Hole Ultrasonic Monitor

(CHUM) system made by Piletest

Quality control of deep concrete

foundation

Ultrasonic waves through the concrete

Measuring the energy and the first

arrival time

Background

MotivationThe current CHUM uses sample rate of 500kHz,

complying American standard.A necessity came up to comply with the

1MHz French standard.

GoalDeveloping a board based on FPGA,

that samples data at rates of up to 1MHz,

and connects to the Micro-Controller

Experimenter Board.

Block diagram

ADC

FPGA (FIFO)

Micro-Controll

er

Analog from

Rx

High speed

Low speed

To user interface

Analog Devices AD7671 LQFP48 Analog /Digital Converter

Altera FPGA Cyclone IV EP4CE6 EQFP144

Texas Instruments Micro-Controller MSP430F5419AIPZ, on MSP-EXP430F5438 Experimenter Board

1MHz

SpecificationsThe FPGA receives a 16-bit data from ADC, in 1MHz.

It stores 2 kilo-words in a FIFO memory, and makes it accessible to the µC at lower speed, by a 8-bit bus.

The system works on a battery, thus it has to be energy efficient.

Our Board

ADC

FPGA 16-Bit

Data

JTAGPOWER

8-Bit Data

Control

RESET

Clock

Detailed Scheme

Development environment for Micro ControllerTexas Instruments MSP430F5419AIPZ Micro Controller

JTAG connector to

Program / debug

GPIO interface, connects

to our board.

Micro Controller Experimenter Board

MSP-EXP430F5438

IdleCount=0

FIFO

Full=0

1RD 0CNVST 0RD

Data Write

Count++0RDFIFO

Full=1Count=0

Data Ready

Count++

St. Mach. Start=0 Sample Rate=0 Busy=1

St. Mach.

Start=1

SampleRate=1 Busy=0

Count=2048

FIFO RD=0

FIFO RD=1

FIFO RD=1

FIFO RD=0

FIF

O R

D=

1

Cou

nt=

2048

FPGA State Machine

Count<2048

FIF

O R

D=

1

FIF

O R

D=

0H

/L B

yte

=0

FIF

O R

D=

0

H/L B

yte =1

FIFO RD=0

Gantt

Midterm Presentation

Rudimentary Electrical Scheme

Characterization Presentation

FPGA State Machine Determination

waiting for arrival of µC Evaluation Board

Reserve Dudy

A Complete Signal Scheme

Signals, Pwr Supply And Consumption

Learning IAR Development Tool

6/11 13/11 20/11 27/11 4/12 11/12 18/12 25/12 1/1 8/1

Characterization Presentation

Midterm Presentation