Custom IC Design Lab (Fall 2011-12)Experiment Date: 4th October 2011 Name: P.JAGADEESH (11!D001"#$OON SO%&$E AP'()(E&P%&POSE:1. TodesignandanalyzetheCommonSourceamplifier withresistiveloadbyplotting DC, AC and transient analysis.. Calculate !oltage gain Av "in d#$ and % d# fre&uency.%. To design the Common Source amplifier with current source load with a voltagegain of '(.*HEO&+: $OON SO%&$E AP'()(E& ,(*H &ES(S*(!E 'OADThe principle of operation of a common source amplifier is based on the simple fact thatby virtue of its transconductance, a )*S+,T converts a variation in its gate to sourcevoltage into a small-signal drain current which can be made to pass through a resistor togenerate an output voltage.+ig 1. Common Source amplifier with /esistive 0oadDC #ias 1oint of the Common-Source AmplifierCustom IC Design Lab (Fall 2011-12)+or biasing, ignore the small-signal source !s andits small-signal resistance andcalculate the biasing voltage.!oltage 2ain.Av 3 "d!out4d!in$ 3 -gm/D5here gm 3 6n 540 Co7 "!in - !t $.$OON SO%&$E S*AGE ,(*H $%&&EN* SO%&$E 'OADThe gain of the amplifier increasing the load impedance of the Common Source stageallows obtaining a large voltage gain in a single stage. #ut using a resistor or a diodeconnected load to increase the load resistance also limits the voltage swing of the circuit.Thus the most practical choice is to replace the load of CS stage by a current source. 8nthis circuit both the transistors operate in saturation. The circuit is shown here.Custom IC Design Lab (Fall 2011-12)+ig .Common Source stage with current source loadSince the total impedance that appears in this circuit at the output node is given by /e& 3"ro1 99 ro$The gain for the amplifier now becomes Av 3 - gm "ro1 99 roTheadvantageofthecurrentsourceovertheresistorliesinthefactthat theoutputimpedence of ) and the minimum voltage drop across it are less strongly coupled thatthe correspondingvalues of a resistor. The current source provides the additionalfle7ibility to the design of being able to vary the overdrive voltage of ) and hence thevoltageswings at theoutput of theamplifier bysimplyvaryingthe widthof thetransistor. 8f ro is not sufficiently large the length and width of the device can be variedto obtain a smaller : while maintaining the same overdrive voltage, though thefle7ibility comes at the price of the large capacitance introduced by ) at the outputnode.$(&$%(* D(AG&A: Custom IC Design Lab (Fall 2011-12)1.Common Source amplifier with /esistive 0oad E*HODS:1. Draw the schematic of the Common source amplifier with resistive load.. 1lot the DC analysis under biasing condition and note down the voltage at ma7. gm and this voltage is called biasing voltage.%. 1lot the transient analysis for output voltage and input voltage and calculate the voltage gain Av.;. 1lot the AC analysis and calculate the 2ain in db.DA*A ANA'+S(S DC Analysis.Custom IC Design Lab (Fall 2011-12))a7. trans-conductance gm 3 '. 7 1(-; mho.!oltage ? ma7. gm, !bias 3 -"".1m! 0oad /esistance /D 3 1(@ ohm.!oltage gain A! 3 -gm/D 3 "..-/ Transient Analysis.1eaA-peaA *utput !oltage 3 B%>.= C %