CSC Muon Trigger September 16, 2003 CMS Annual Review 1 CSC Muon Trigger - Annual Review Jay Hauser, with many slides from Darin Acosta and Stan Durkin

September 16, 2003CMS Annual Review

1CSC Muon Trigger

CSC Muon Trigger - Annual ReviewJay Hauser, with many slides from Darin Acosta and Stan Durkin

Personnel: Professors

Darin Acosta (Florida), Robert Cousins (UCLA), Jay Hauser (UCLA), Paul Padley (Rice), Jaybus Roberts (Rice)

Postdocs Sang-Joon Lee (Rice), Holger Stoeck (Florida), Slava Valouev (UCLA), Martin von der Mey (UCLA), Song

Ming Wang (Florida), Yangheng Zheng (UCLA) Students

Alexei Drozdertski (Florida), Brian Mohr (UCLA), Jason Mumford (UCLA), Greg Pawloski (Rice), Bobby Scurlock (Florida),

Engineers JK Smith (UCLA), Alex Madorsky (Florida), Mike Matveev (Rice), Ted Nussbaum (Rice), Alex Tumanov (Rice -

Software) Collaborating engineers (PNPI)

Victor Golovtsov, Valeri Iatsioura, Lev Uvarov

Outline: Status of Boards Test Beam 2003 Results Experience and Plans for Production Testing Plans for Integration and Slice Tests Schedule and Milestones


2CSC Muon Trigger

Current Status of CSC Trigger Elements – Quick Summary

On-chamber Comparator ASICs for Cathodes (CFEB cards) – DONE. ALCT Anode Trigger – almost done (~90%)

Peripheral-crate TMB Trigger Motherboard – pre-production prototypes MPC Muon Port Card – 2nd generation prototype CCB Clock & Control Board – 2nd generation prototype

Track Finder crate in counting house SP2002 Sector Processor – 2nd generation prototype CSC Muon Sorter – 1st generation prototype Backplane – 2nd generation prototype


3CSC Muon Trigger

CSC Muon Trigger Scheme

CSC

CFEBCFEBCFEB CFEB

ALCT1 of 24

CFEB

1 of 2

LVDB

1 of 5

1 of 5

Anode Front-end Board

Cathode Front-end Board

Anode LCT Board

MPC

DMB

TMB

DMB

TMB

DMB

TMB

DMB

TMB

DMB

TMB

DMB

TMB

DMB

TMB

DMB

TMB

DMB

TMB

CCBC

ONTROLLER

Peripheral Crate on iron disk (1 of 60)

Trigger Timing & Control

CSC Track-Finder Crate (1)

Trigger Motherboard (9)

DAQ Motherboard (9)Clock Control Board

Optical link

In underground counting room On detector

Muon Portcard (1)

EMU part: on-chamber nearing end of production, peripheral crate production > ESR in Nov. ‘03

TriDAS part: Second generation prototypes

Trigger Primitives

3-D Track-Finding and Measurement

Sector Processor (12)

Muon Sorter (1)


4CSC Muon Trigger

On-chamber CSC Trigger Electronics

Comparator ASICs – DONE. Compare pulse heights from

adjacent strips to find position of muon to ½-strip

15000 16-channel ASICS on CFEB boards (OSU)

ALCT Boards – nearly DONE. Finds tracks among anode

hits, stores data for readout 468+spares boards of 3 types

(288-, 384-, 672-channel)

ALCT Shipments By Destination (5-Sept-2003)

0

20

40

60

80

100

120

UC-FAST UF-FAST PNPI-FAST IHEP-FAST-384 IHEP-FAST-288 DUBNA-FAST SPARES-ALLTYPES

Number Left

Number Shipped


5CSC Muon Trigger

CSC Peripheral Crates in UXC55

MPC

DMB

TMB

DMB

TMB

DMB

TMB

DMB

TMB

DMB

TMB

DMB

TMB

DMB

TMB

DMB

TMB

DMB

TMB

CCB

CONTROLLER

Clock Control Board (CCB)

TRIG Motherboard (TMB)

DAQ Motherboard (DMB)

Crate Controller

Muon Port Card (MPC)


6CSC Muon Trigger

Trigger Motherboard Generates Cathode LCT and matches ALCT with CLCT Prototyped 18 TMB2001 with XCV1000E (15 for chamber testing). 4 new TMB2003 prototypes with “production engineering” and XC2V4000. Nov. ’03 ESR should lead into production cycle in ‘04. 468 boards 9U x 400mm required for CSC trigger

ALCT input ALCT input connectorsconnectors

Mezzanine boardMezzanine board

CFEB Input CFEB Input connectorsconnectors

UCLA


7CSC Muon Trigger

Clock and Control Board

TTCrx Mezzanine Card

ECL inputs

ECL outputs

Rice

Mezzanine card with PLD

9U * 400 MM BOARD

Common design for both Peripheral and Track-Finder crates 20 Boards exist Have been distributed and used for chamber testing 60+1 required for CMS operation


8CSC Muon Trigger

Mezzanine card (same as TMB design)

TLK2501 serializers

Optomodules(1.6 Gbit/s)

Muon Port Card

Rice

Sorts up to 18 LCTs from 9 chambers and transmits best 3 to Track-Finder crate

6 Boards of second generation have been fabricated and assembled.

Board has passed standalone tests, communication tests with TMB, and cosmic ray tests

Successfully read data from 2 chambers and sorted correctly

Tests with Track-Finder are continuing

Tests in time-structured test beam are underway now (for second time this year)

60 required for CMS operation


9CSC Muon Trigger

1st Prototype Track-Finder Tests

Sector ProcessorSector Processor(Florida)(Florida)

Sector ReceiverSector Receiver(UCLA)(UCLA)

Clock Control Clock Control Board (Rice)Board (Rice)

SBS SBS VME VME InterfaceInterface

Custom Custom ChannelLinkChannelLinkBackplaneBackplane(Florida)(Florida)

Muon Port CardMuon Port Card(Rice)(Rice)

Very successful, Very successful, but overall CSC but overall CSC latency was too latency was too

longlong

New 2002 New 2002 design improves design improves latency, reduces latency, reduces # of crates from # of crates from

6 to 16 to 1Results included in Trigger TDR(2000)


10CSC Muon Trigger

CSC Track-Finder Crate

SR /

SP

SR /

SP

SR /

SP

SR /

SP

SR /

SP

SR /

SP

SR /

SP

SR /

SP

SR /

SP

SR /

SP

SR /

SP

SR /

SP

CC

B

SB

S 6

20 C

ontr

olle

r

Sector Receiver/Processor

Clock and Control Board

Muon Sorter

From MPC (chamber 4)



From MPC (chamber 1B)

From MPC (chamber 1A)

To DAQ

MS

Single Track-Finder Crate Design with 1.6 Gbit/s optical linksCustom 6U GTLP backplane for interconnections

Second generation prototypes


11CSC Muon Trigger

SP2002 (Main Board)

Merged 3 SR2000s

Optical Transceivers

•16 x 1.6 Gbit/s Links

Front FPGA

TLK2501 Transceiver

Phi Local LUT

Eta Global LUT

Phi Global LUT

VME/CCB

FPGA

To/from custom GTLP back-plane

Data conversion:

Receiver: Florida

12 Used in CMS System


12CSC Muon Trigger

SP Trigger Logic

From SP2000 to SP2002 mezzanine card (5 manufactured)

Xilinx Virtex-2 XC2V4000~800 user I/O

Performs track-finding logic and PT assignment

Florida


13CSC Muon Trigger

GTLP BACKPLANEINTERFACE

MEZZANINE CARD (same as SP design)

LVDSDRIVERSAND SCSI-3CONNECTORS

Muon Sorter

Rice

Sorts up to 36 muons from 12 SP’s and transmits best 4 to GMT Have 4 boards in hand, one stuffed (except for backplane interface) Sorter testing is in progress, will test with Track-Finder in the autumn Only 1 needed in CMS


14CSC Muon Trigger

CSC Test Beam Studies 2003 First structured beam period May 23-June 1

Trigger primitives tests were highly successful: Reliable high-rate trigger and DAQ system ALCT timing tests, CLCT and TMB studies High-rate tests and HV, threshold, angle scans

MPC-to-SP optical link data transfer unsuccessful (synch. problems)

Unstructured beam period June 13-28 Improved low- and high-rate CLCT and TMB studies, angle scans

Second structured beam period Sept. 17-22 Patches to fix optical link data transfer from MPC to SP New readout shell program (fully OO software)


15CSC Muon Trigger

2003 Time-structured Beam Test Setup

Peripheral Crate2 DMB, 2 TMB1 CCB, 1 MPC

FED crate 1 DDU

PC

TTC crate

DAQ Data

Trigger primitives

S1 S2 S3

beam

CSC 1 CSC 2

Track finder Crate

TRIDAS

X5A Setup


16CSC Muon Trigger

Typical Muon Event

Raw data includes 8 or 16 time bins history


17CSC Muon Trigger

Structure repeats during 2.6 s spill length

48 bunches25 ns bunch spacingbunch width 3-5 ns

SPS orbit period

1.2 s

23 s

2003 Time-Structured Test Beam

Optimal timing found High efficiency (~98-99%)

achieved Peripheral crate system

basically working as desired Small CLCT efficiency loss at

high rates, almost no ALCT efficiency loss

Scintillation Counters

48 bunches

ALCT


18CSC Muon Trigger

CSC Bunch ID From ALCT Timing First, tune the ALCT data latching in 2 ns intervals (0-32ns)

and maximize the single-BX fraction of events:

Then look at the BX distribution relative to BX from scintillator (L1A):

ALCT BX efficiency 98.7%


19CSC Muon Trigger

CLCT Positions Key CLCT half strip from

chamber 2 vs.1: On fine scale “staircase”

structure indicates good trigger position resolution

(note that chamber 1 is vertically higher, thus the offset in position)


20CSC Muon Trigger

CSC Trigger High Rate Tests

Expected LCT rate at LHC < 25 KHz (ME1/1)

data consistent with dead-time = 225 ns

Chamber #1 CLCT

0

500

1,000

1,500

2,000

0 500 1,000 1,500 2,000 2,500 3,000

Beam Intensity (KHz)

CL

CT

Ra

te (

KH

z)


21CSC Muon Trigger

CSC Track Finder Test

Successfully passed optical link loopback tests and MPCSP chain tests using 40 MHz crystal oscillator to drive system

MPCSP optical link tests failed at the structured beam tests in May 2003 (link errors every few ms)

Clock was derived from TTC system (mivivxrx) Combined clock jitter presumably too large to drive optical links PLL was not used to clean clock (i.e. QPLL was not available)

Sector Processor2 CSCs


22CSC Muon Trigger

2003 Unstructured Test Beam Results Very high efficiencies achieved

Highest trigger efficiency of 99.9% required low rate (few kHz) Improved DAQ throughput allowed readout up to 80k full events per

spill. Typical “run” is 1 or 2 spills. Improved scans taken:

Logic scope read out on most data HV scan Comparator threshold scan Pattern requirements scan Angle scans


23CSC Muon Trigger

ALCT Production Testing - Example ~510 Boards, ~200000 Channels Semi-automated procedures Using 3 test stations

2 for testing 1 for fixing

Crew of up to 14 students testing (3 FTE) Sign-off sheets to track testing failures Test before and after 2-day burn-in 2 students trained for fixing 1 engineer for difficult cases 1 postdoc supervises it all


24CSC Muon Trigger

Testing Other CSC Trigger Boards TMBs (468+spares) testing (Emu):

Production testing with loop-back board tests all I/O (already built) In-situ CMS testing by pulsing analog levels on CFEBs, reading

comparators; also recording digital outputs to MPC and DDU. MPCs (60+) production or in-situ CMS testing:

Inputs will be tested at full speed with FIFO on TMB Outputs will be tested at full speed with input FIFO of SP VME readout

SPs (12+): Like MPC but with inputs from MPC, outputs to MS

CCBs (60+): Simple module function, tested on bench and by exercising peripheral and

Track Finder crate functions MS (1+):

With only 1+spares, can be tested by hand as well as with input data from FIFOs on SP outputs


25CSC Muon Trigger

Plans for Integration and Slice Tests Test beam 2003 is the first full chain test from 2 CSC chambers to SP input Sept. test beam cycle goals (see next slides):

Validate that correct trigger primitives are found and successfully received over optical links

Record as much data as possible under various detector configurations for future track identification studies

Will perform DTCSC TF interface tests the week following Sept. beam test Next (6/04) structured test beam cycle will test pre-production boards (CCB,

MPC, SP, TTC+QPLL) 6/04-3/05 Slice Test (on surface)

Really begins with next summer test beam 6/04 Use 2 full CSC peripheral crates, covering 2 stations x 60 degrees at SX5

9/1/05 Commissioning begins in UX5 Integration with CMS-wide systems important for Track Finder: Slow controls

(downloading), database, connection to Global Muon Trigger, software framework, time synchronization studies

1/1/07 Commissioning ends at UX5


26CSC Muon Trigger

Sector Processor Clock Patch

Voltage Controlled Crystal Oscillator PLL Patch

• Low jitter Output

• Cleans Backplane clock to drive SP logic

• x2 BackPlane Clock supplies reference to TLK2501

LVDS Repeater Delivers Multiplied Clock to Front

FPGAs to Drive TLK2501 clock input

VCXO and PLL added to clean synchronous clock


27CSC Muon Trigger

SP Patch Results

Conditions Type of Test Time Errors

Patched CCB Clock, 100m fibers

SPSP loopback PRBS test 5 hours x 3 links 0

“ MPCSP PRBS test (within same TF crate)

24 hours x 3 links 0

TTCvx with 40.0787 MHz XO Patch

MPCSP PRBS test (within same TF crate)


“ MPC SP PRBS test (peripheral crate to TF crate) with L1A rate @ 100kHz.


Eagerly awaiting QPLL chips from CERN


28CSC Muon Trigger

Preparation for Sept. 2003 Beam Test

CSCs

Scintillator Panels

HV Supply

CCBMPC

DDU

Dynatem

TMB

DMB

SP

CCBSBS

TTCvi

TTCvx

Cosmic ray test stand in Florida

System brought to working order

(everything now shipped to CERN)

TF CratePeriph Crate


29CSC Muon Trigger

CSC Trigger FY02-05 L2,3 Milestones - I Begin Proto. 2

Begin MPC Proto. 2 Begin SR/SP Proto. Begin Backplane Proto. 2 Begin CCC Proto. 3 Begin Sorter Proto.

Finish Proto. 2 Finish MPC Proto. 2 Finish SR/SP Proto. Finish Backplane Proto. 2 Finish CCC Proto. 3 Finish Sorter Proto.

Finish Proto. 2 Test Finish MPC Proto. 2 Test Finish SR/SP Proto. Test Finish Backplane Proto. 2 Test Finish CCC Proto. 3 Test Finish Sorter Proto. Test

Finish Final Design Finish MPC Final Design Finish SR/SP Final Design Finish Backplane Final Design Finish CCC Final Design Finish Sorter Final Design

5/14/0110/1/0110/1/0110/1/0110/1/015/14/016/24/039/30/021/30/032/28/038/19/023/31/039/30/034/30/034/30/034/30/034/30/039/30/033/31/043/31/043/31/043/31/043/31/043/31/04

√√√√√√√√√ (except PT memories, ordered)√√√2/28/049/30/031/30/042/28/04√ but needs redesign2/28/04 GMT integration?7/30/043/31/047/30/047/30/047/30/047/30/04


30CSC Muon Trigger

CSC Trigger FY02-05 L2,3 Milestones - II Begin Production

Begin MPC Production Begin SR/SP Production Begin Backplane Production Begin CCC Production Begin Sorter Production

Finish Production Finish MPC Production Finish SR/SP Production Finish Backplane Production Finish CCC Production Finish Sorter Production

Begin Installation Begin MPC Installation Begin SR/SP Installation Begin Backplane Installation Begin CCC Installation Begin Sorter Installation

Finish Installation Finish MPC Installation Finish SR/SP Installation Finish Backplane Installation Finish CCC Installation Finish Sorter Installation

8/1/044/1/048/1/048/1/048/1/048/1/043/31/053/31/053/31/053/31/053/31/053/31/054/1/054/1/054/1/054/1/054/1/054/1/055/1/055/1/055/1/055/1/055/1/055/1/05


31CSC Muon Trigger

CSC Trigger FY02-05 L2,3 Milestones - III Begin System Tests

Begin MPC System Tests Begin SR/SP System Tests Begin Backplane System Tests Begin CCC System Tests Begin Sorter System Tests

Finish System Tests Finish MPC System Tests Finish SR/SP System Tests Finish Backplane System Tests Finish CCC System Tests Finish Sorter System Tests

6/1/056/1/056/1/056/1/056/1/056/1/059/30/059/30/059/30/059/30/059/30/059/30/05


32CSC Muon Trigger

Conclusions The CSC system is in very good shape:

Chambers being mounted on disks at SX5 Majority of the chambers already built and tested, including on-

chamber electronics Test beam showed that CSC peripheral crate electronics work very

well under “battle conditions” Of course, much work remains:

We especially need to validate the optical link clocking for MPC-SP data transfer

Production starts soon for peripheral crate electronics Production planning will start soon for Track Finder (MPC, SP, MS)

boards

Documents

CSC Muon Trigger September 16, 2003 CMS Annual Review 1 CSC Muon Trigger - Annual Review Jay Hauser, with many slides from Darin Acosta and Stan Durkin