Design and Control of a Buck-Boost DC-DC Power Converter

Design and Control of a Buck-BoostDC-DC Power Converter

Robin Vujanic

Semester ThesisJuly 2008

Supervision:

Dr. S. MariethozProf. M. Morari

Contents

1 Introduction 11.1 Motivation and Objectives . . . . . . . . . . . . . . . . . . . . . . . . . 11.2 Converter Topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31.3 Synchronous Rectification . . . . . . . . . . . . . . . . . . . . . . . . . 51.4 Degrees of Freedom . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2 Models of the Circuit 112.1 What is considered and what is not considered . . . . . . . . . . . . . 112.2 Simulations in PLECS . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132.3 Basic Analytical Models: Full-Buck and Full-Boost . . . . . . . . . . . 16

2.3.1 Buck Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172.3.2 Boost Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.4 Buck-Boost Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212.4.1 Estimation Equations . . . . . . . . . . . . . . . . . . . . . . . . 222.4.2 Equations for the four States . . . . . . . . . . . . . . . . . . . 232.4.3 Equations for the State-Times . . . . . . . . . . . . . . . . . . . 242.4.4 The Averaged Model . . . . . . . . . . . . . . . . . . . . . . . . 272.4.5 The Hybrid Model . . . . . . . . . . . . . . . . . . . . . . . . . 30

3 Power Losses 333.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 333.2 Losses Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 333.3 Modeling Power Losses . . . . . . . . . . . . . . . . . . . . . . . . . . 35

iii

Contents

4 Controller Design 414.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 414.2 Why MPC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 424.3 Basic Control Strategies . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

4.3.1 Buck, the Simplest Mode . . . . . . . . . . . . . . . . . . . . . 434.3.2 Boost Mode and the Gain Scheduling Technique . . . . . . . . 44

4.4 Buck-Boost Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 464.4.1 The Feedforward . . . . . . . . . . . . . . . . . . . . . . . . . . 474.4.2 The Feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . 514.4.3 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

5 Conclusion 59

Bibliography 61

iv

Chapter 1

Introduction

In Zweifelsfaellen entscheide man sich fuer das Richtige.

Karl Kraus

Abstract

A study on the properties and control of a promising circuit topology for a DC-DC buck-boost power converter is presented. The circuit contains four transistors operated syn-chronously in couples. We propose a set of mathematical models to describe this circuit,and an approach to determine the behavior of the losses occurring inside of it. These arethen combined in order to achieve a control scheme that drives the circuit while mini-mizing said losses. The control strategy proposed here is based on a combined feedback(MPC) and feedforward action. Control performance parameters such as disturbancesrejection capability have been investigated as well.

1.1 Motivation and Objectives

The present work deals with the design and control implementation of a Buck-Boost DC-DC power converter.

DC-DC power converters are employed in order to transform an unregulated DCvoltage input (i.e. a voltage that possibly contains disturbances) in a regulated out-put voltage. For example, a DC-DC power converter can transform an unregulated(i.e. distorted) 9V input voltage in a regulated (i.e. ”clean”) voltage of 12V at the out-put. Some DC-DC power converters have a fixed output reference and ensure thatsuch voltage is always delivered, no matter what the input is; some others can havea variable output reference, which can be therefore set depending on the currentneed of the device the power converter is used in. The converter discussed in thiswork belongs to this second category. In particular, the converter is able to deliveroutput voltages both higher as well as lower than (or even equal to) the input volt-age; this is why it is referred to as a ”buck-boost” (or ”step-up/step-down”) power

1

CHAPTER 1. INTRODUCTION

unregulatedv in

DC

DC

regulatedv out

Figure 1.1: Abstract functionality of a DC-DC Power Converter: an unregulated input voltageis transformed into a regulated (i.e. ”clean”) output voltage; The output reference voltage, inthe case of a buck-boost converter, can be set to be either smaller, larger or equal the inputvoltage.

converter. A schematic depicting the abstract functionality of a DC-DC power con-verter can be seen in Figure 1.1.

Such power converters are needed in a vast number of electrical devices, whichon one side is a motivation for this project, and on the other side also explains whymuch research is still conducted on this topic. Very high efficiencies have beenachieved by converters currently on the market, yet the main goal of this project is topush the everlasting quest for still-higher-efficiencies a step further, by exploiting anovel converter topology and modern control techniques together with appropriatedesign choices.

Recent studies on this topic (Frehner 2007) were able to establish some rudimen-tal model of the circuit (the plant) and then applied standard control techniques(PID and LQR based control schemes). These studies resulted in poor overall per-formance since:

• The topology was not exploited to its fullest; it was studied and controlledonly either in its full-buck mode or in its full-boost mode (see Chapter 2 forwhat is meant with ”full-buck”, ”full-boost” modes), thereby simplifying theanalysis but causing unsatisfactory results as well.

• The implementation of these standard control techniques presented challenges,mainly because of two reasons:

– first, with PID and LQR controls it is difficult to implement state and in-puts constraints (which arise in a natural way when dealing with the con-trol of this plant); an approach via saturators was attempted, but still thecontroller performance was unsatisfactory, especially in the boost mode;

– second, especially with the PID approach the control of a multiple-inputsplant becomes considerably more challenging compared to a single-inputplant; since the plant was considered always either in its full-boost or init full-buck mode, this problem has not actually been faced

2

1.2. CONVERTER TOPOLOGY

T1

T2

T3

T4

L R L

R C

C

VinVout

-

+

“buck”-leg “boost”-leg output stageinput stage

Figure 1.2: Schematic of the circuit topology used to achieve DC-DC power conversion; thedifferent stages are depicted, and notice the load, which is simulated by a current source forthe moment. Later, it will be replaced by a Load resistance for calculations.

• The controllers did not account for the losses inside the circuit, nor a modelfor these losses was established.

The present work shows the advances made with respect to these limitations.

1.2 Converter Topology

Consider Figure 1.2, which depicts the circuit topology employed for this project.It can be split into two separated voltage conversion stages, the ”buck”-leg and

the ”boost”-leg; the first stage (the ”buck”-leg) consists of switches T1 and T2, whilethe second stage (the ”boost”-leg) contains switches T3 and T4. We divide the circuitin these two legs because it turns out that for proper functionality of the circuit(i.e. in order to avoid a voltage source to be short-circuited - a condition referredto as ”shoot-through”) each of these two pairs of switches (i.e. for example T1 andT2) need to work in a complementary manner, and is therefore to be regarded as a”couple” of switches. Switch T3 and T4 are the other ”couple of transistors” andthese two couples constitute the two circuit legs1.

For T1 and T2 to work in a complementary manner means that when switch T1is conducting current (it is on), switch T2 must be off, and vice-versa.

1The transistors used in this work for switching are MOSFETs.

3


dead-time

d1

d2phase

1-d1

dead-time

dead-time dead-time

a)

b)

Ts

Figure 1.3: Typical gate signals obtained for a certain choice of (d1, d2, φ); (a) depicts thesignals sent to the first couple of switches (T1 and T2) while (b) shows the signals sent to T3and T4 (also notice the phase there).

On an important side note, in order to safely avoid the occurrence of both switchesbeing on (which would lead to shoot-through), short periods of time between theswitchings are introduced, during which both transistors are turned off; these areso-called dead times2. This way of operating switches for current rectification isreferred to as synchronous rectification and is briefly discussed in Section 1.3.

Getting back to the discussion on the active times of the switches, the followingnaming convention has been used (see Figure 1.3): the time during which T1 is on(and therefore T2 is off) is denoted as d1. Since all of the switches are operated in acyclic manner (as it is usual in power converter designs), d1 is actually the portion oftime over a cycle during which T1 is on. To make an example, d1 = 0.2 means thatT1 is on 20% of the time of an entire cycle, and is usually referred to as the duty-cycle of T1. Therefore, if negelecting small dead-times, 1 − d1 is the time portionduring which T2 is on (i.e. the ”duty-cycle” of T2). The same principle applies forthe second leg, where the portion of time during which T3 is on is denoted as d2

(and therefore 1− d2 is the time during which T4 is on).

Further, notice that the two duty cycles d1 and d2 can be shifted one relative to

2During these times, if necessary, conduction is ensured by the body-diodes found in parallel with thetransistors, which are actually a ”parasitic” result of the transistor’s fabrication.

4

1.3. SYNCHRONOUS RECTIFICATION

the other by adding a phase between them, which is denoted with φ 3. These dutycycles (d1 and d2) and the phase are important variables affecting the behavior of thecircuit because they are in fact the variables that are going to be controlled in orderto achieve the desired output voltage signal. Figure 1.3 shows the typical look of thegate signals corresponding to certain choices of d1, d2 and phase and illustrates theconcept of the dead time.

Note: especially when considering the circuit in its ”pure” boost version, thischoice for d2 is *not* consistent with the literature where d2 would be the time dur-ing which T3 is off. This controvert convention was adopted at the beginning of thisstudy and was kept later on for compatibility with initial results.

For the rest of the circuit, the names used for the components is to be understoodas follows:

• L, C, Rload, RC , RL: these are the components inside the circuit. L and C are theinductor and the (output) capacitor, Rload is the resistor used to model a loadon the output, RC and RL are the parasitic ESRs (Equivalent Series Resistances)to L and C.

Note: unfortunately, C is also the de-facto established symbol for a matrix inthe standard matrix form of the state-space description of systems, and thisconvention for naming this matrix is also used here (see below). However, themeaning of each instance of C is clear from the context.

• vin, vout, vC , iL: input and output voltages, voltage across the capacitor, cur-rent through the inductor.

Note: in order to avoid confusion, voltages are going to be denoted with theletter ”v” and inputs (to the plant, see Chapter 4) with the letter ”u”.

• T1, T2, T3, T4: the switching transistors.

1.3 Synchronous Rectification

While earlier DC-DC power converters relied on the use of diodes for currentrectification (which is necessary for the converter’s operation), increased per-

formances have been achieved by adopting synchronous rectification in the designof the power supply instead. Synchronous rectification means that the functionality

3For readability of the code developed for this project, it is to be noted that a unit-less denotation hasbeen used for the phase. A phase of 0.3 means that the d2 signal is shifted of 30% of a duty cycle withrespect to the d1 signal, i.e. the switch T3 is going to switch in the on mode 30% of a cycle later thanwhen the switch T1 was turned on.

5


once provided by the diode - i.e. current rectification - is now undertaken by a recti-fying transistor, typically a MOSFET. Such rectification improves efficiency, thermalperformance, power densities, manufacturability, reliability as well as having typ-ically faster switching transients, and decreases the overall system cost for powersupplies (Selders 2003). These performance increases are mainly due to the fact thatthe on-resistance of MOSFETs, RDS,on, can be reduced either by increasing the sizeof the die or by paralleling discrete devices, while the forward voltage-drop acrossdiodes cannot be lowered under a certain (physically imposed) limit; this motivatesthe choice of using synchronous rectifiers in the circuit topology studied for thisproject.

1.4 Degrees of Freedom

Using the models that are going to be discussed in detail in Chapter 2, it is possi-ble to obtain the vout/vin ratio provided by the circuit with a given combination

of d1, d2 and φ.Because of their definition, the d1, d2 and φ variables are constrained to lie in the

interval [0,1], i.e.:

(d1, d2, φ) ∈ [0, 1]3 (1.1)

Two typical surfaces showing how the vout/vin ratio behaves with respect to the(d1, d2, φ) variables at steady state are depicted in Figures 1.5 a) and b).

It is confirmed from this surfaces that the general behavior of the output voltage,in the ideal case, follows the equation:

vout = vind1

d2(1.2)

Some important aspects emerging from this figure have to be highlighted:

• First, notice how this confirms the choice of naming ”buck” and ”boost” thetwo legs composing the converter made previously; in fact, d1 (the duty cyclecorresponding to the ”buck” leg) is a multiplicative factor to vin between zeroand one, while d2 (duty cycle of the ”boost” leg) is a multiplicative factor tovin between one and .

• Second, this figure also shows that the output voltage varies linearly withvarying d1 while instead, when varying d2, it varies non-linearly. The non-linearity of the boost stage will have deep consequences for the developmentof the control (it is going to pose a major challenge for the design of a validcontroller); this is going to be discussed more in detail in Chapter 2 and 4.

6

1.4. DEGREES OF FREEDOM

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

0

0.5

10

1

2

3

4

5

6

7

d2

vout / vin = f(d1,d2)

d1

v ou

t / v

in

dependence of the output voltage on d1, d2

00.2

0.40.6

0.81 0

0.10.2

0.30.4

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

d1

vout/vin: 0.4

phase

d2

dependence of the output voltage on the phase φ

Figure 1.4: Dependence of the output voltage from the inputs of the plant, i.e. (d1, d2, φ)

7


0.05

0.05

0.1

0.1

0.1

0.2

0.2

0.2

0.3

0.3

0.3

0.4

0.4

0.4

0.5

0.5

0.5

0.6

0.6

0.6

0.7

0.7

0.7

0.8

0.8

0.8

0.8

0.9

0.9

0.9

0.9

1

1

1

1

1.2

1.2

1.2

1.2

1.4

1.4

1.4

1.6

1.6

1.6

1.8

1.8

1.8

2

2

2

2.4

2.4

3

3

3.4

3.4

4

4

56

d1

d2

vout / vin (d1,d2) iso-lines

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

Figure 1.5: Output-voltage iso-lines resulting from slicing Figure a) with planes perpendicu-lar to the vertical axis. Notice that all the points along each of these curves represents d1,d2

combinations that will always deliver the same vout/vin ratio.

• Third, notice from Figure 1.5 b how the vout/vin ratio does not depend onthe phase φ; and while the vout/vin ratio is unaffected by changes in φ, vari-ables describing the circuit state (in particular the inductor’s current iL) areindeed going to be affected by changes in the phase, resulting in different per-formances in terms of losses. This is a very important aspect, and leads to ourfirst ”degree of freedom”: the phase4.

• Fourth, ”slicing” this surface along planes perpendicular to the vout/vin (”z-”)axis results in the set of curves depicted in Figure 1.5. This is the set of curvesof constant output voltage as a function of d1 and d2. This is also a result offundamental importance because it leads to our second ”degree of freedom”:each choice of d1 and d2 along one of these curves will always lead to the sameoutput voltage.

The main objective of this project can now be stated as follows: by exploitingthese two degrees of freedom we will be able to affect the state of the circuit;thus, many internal states will lead to the same output voltage, and the main taskwill be to choose among all these possibilities the one that will lead to the leastpossible power losses - i.e. to the most efficient way of driving the circuit.

This has been achieved as follows: first, different models of the circuit have been

4The wording ”degree of freedom” is used to highlight the fact that φ can be chosen arbitrarily whileleaving the output voltage unaffected.

8

1.4. DEGREES OF FREEDOM

developed for different purposes, see next Chapter. After that, a thorough study ofthe losses inside the circuit has been conducted using some of these models; this isexposed in Chapter 3. Based on the study of the losses, the design of a control thatdrives the circuit while accounting for losses has been done, and will be presentedin Chapter 4. Chapter 5 is a conclusive chapter, where possible outlooks will bediscussed and a summary of this project will be given.

9

Chapter 2

Models of the Circuit

Bildung ist das, was uebrig bleibt, wenn der letzte Dollarweg ist.

Mark Twain

2.1 What is considered and what is not considered

The circuit being considered in this work is depicted in Figure 2.1. Notice that forthe development of the models, the output load is simulated with a resistance,

Rload. The meaning of the rest of the symbols has been exposed in Section 1.2.In order to develop a controller, tools in order to forecast how the behavior of the

plant and the losses are going to be are necessary. In this work, two such tools havebeen used:

1. Simulations in PLECS, a Simulink toolbox1.

1Part of the validation of the losses behavior discussed later has also been conducted with PSpice, see(Walter 2008)

T1

T2

T3

T4

L R L

R C

C

VinVout

-

+

R load

Figure 2.1: Schematic of the circuit topology used to achieve the equations of the analyticalmodels.

11

CHAPTER 2. MODELS OF THE CIRCUIT

2. Analytical models of the circuit.

Under ”behavior of the circuit” we understand the following: we are interestedin knowing the currents inside the circuit (especially through the inductor) and thevoltages across the components (especially on the capacitor) as a function of the timeand with respect to changes to the input. Therefore this is the information our toolsshould return us.

This translates into the following model structure for the plant:

• The states are the current through the inductor iL and the voltage across thecapacitor vC .

• Two of the inputs are the duty cycles that are imposed on the two pairs ofswitches (one duty cycle for the input leg, one duty cycle for the output leg),and a third input is the phase between the two duty cycles. As explainedpreviously, only one duty cycle is necessary in order to control two switchesbecause they must work in a complementary manner.

• The output is the output voltage (equal to vC in the ideal case - i.e. no ESR).

Converter’s Circuit(plant)

d1d2

phase i L vC(states)

voutu,

Figure 2.2: Block diagram for the plant, depicting the inputs, the states and the output.

What is not going to be considered (at least for the formalization of the analyticalmodels) are the following non-idealities:

• Dead-times: they are implemented in the PLECS simulations but not in theanalytical models (see Section 2.3-2.4).

• Parasitic components: a number of parasitic and non-ideality-induced com-ponents could be added to the scheme, including various inductances andcapacitances, especially if a more detailed small- and large-signal descriptionfor the transistors was to be made (rather than taking its ideal behavior, as hasbeen done). This is avoided here, these effects are actually present and willdeviate the results of an actual implementation from the simulation’s results.

12

2.2. SIMULATIONS IN PLECS

But the essential behaviors discussed in this work are still going to be presentand are still going to be important aspects for design decisions.

The only parasitic components considered are going to be RL and RC , mainlydue to backwards compatibility with previous works (Frehner 2007).

Reverse recovery and voltage drop of diodes, skin and proximity effects of in-ductors, transistors’ channel resistances and drain capacitance charge/dischargemechanisms are some of the processes which are not modeled. Including themin an analytical model greatly increases complexity (basically each additionalcapacitance or inductance adds one more state to the model), and, further,their presence influences homogenously the total losses rather than increasingone in particular between the conduction or the switching losses (see Chapter3). Since we are interested in a comparison between these tzpe of losses ratherthan in their total amount, and since the stress for this study has been put onsimplicity and generality, these effects have been neglected.

• Discontinuous conduction mode is not considered.

In the following sub chapters, the two methodologies (PLECS Simulations andAnalytical Models) are described more in detail.

2.2 Simulations in PLECS

These simulations have been used extensively at the beginning in order to gainan understanding of the general behavior of the circuit without having to dwelve

too much into differential equations. The Simulink schematic used for these pur-poses is shown in Figure 2.3.

What has been done in this case is the following: first, for

D1 = d1 ∈ R | 0 ≤ d1 ≤ 1D2 = d2 ∈ R | 0 ≤ d2 ≤ 1

PHASE = φ ∈ R | 0 ≤ phase ≤ 1

The inputs set

U := D1×D2× PHASE

has been ”gridded”, resulting in U∗ ⊂ U . Then, for each knot of the discretized setU∗ ⊂ U , the behavior of the circuit has been studied.

The results of a single simulation done with PLECS can be seen in Figure 2.2,where the predicted inductor current is depicted. As can be seen, this prediction

13


Figure 2.3: Screenshot of the PLECS circuit used to make simulations.

indeed corresponds closely to the result we would have by applying an analyticalmodel (discussed later in this Chapter) instead.

In general, PLECS simulations have been useful in order to gain a general un-derstanding of the circuit (for example, how does the vout/vin = f(d1, d2) surfacelooks like?) and of the losses. However, for decisional purposes they have beencompletely substituted with simulations based on analytical models because of anumber of shortcomings this approach presents:

1. First, simulation times are much longer: this approach can increase calculationtimes by hundreds. On one side, this makes evaluation of changes of circuitbehaviour with respect to small changes in components, control strategies etc,less viable. And on the other hand, this forces the use of a wider grid forthe discretized set U∗. Larger grid translates into less accurate evaluation ofoptimal input trajectories (optimal with respect to losses, see Chapter 3).

2. Second, PLECS simulations have transients at the beginning. They can beshortened by strategically supplying adequate initial conditions for the induc-tor’s current and the capacitor’s voltage (see Equations 2.30 - 2.35), but theycan never be completely avoided. Since the behavior of the circuit is consid-ered at steady state, this results in even higher calculation times, because thesimulation time needs to be increased. Further, this makes the calculation ofRMS values of steady state signals less precise because there is no guaranteethat the chunk of signal taken in order to calculate the RMS value is alreadycompletely at steady state, without having to resort to unfeasibly long simula-

14

2.2. SIMULATIONS IN PLECS

2.97 2.971 2.972 2.973 2.974 2.975 2.976 2.977 2.978 2.979 2.98x 10-3

30.1

30.12

30.14

30.16

30.18

30.2

30.22

30.24PLECS Simulation

time (s)

i L (A

)

result with PLECS simulations

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1x 10-5

30.12

30.14

30.16

30.18

30.2

30.22

30.24

30.26

time (s)

i L (A

)

Analytical Model Simulation

result with analytical models

Figure 2.4: Comparison between the result for the inductor’s current iL of a PLECS simula-tion with the prediction of the analytical model.

tion times.

3. Third, in order to develop the control and in general to gain a tool with whichit is actually possible to have a grasp on the plant, it is going to be necessaryto obtain the analytical equations in any case.

Nonetheless, testings of results were sometimes made with PLECS mostly forvalidation purposes; especially in order to assess the controller performance later,the plant’s behavior was simulated with a PLECS circuit.

15


2.3 Basic Analytical Models: Full-Buck and Full-Boost

The standard methodology deployed to obtain a model for such a switched sys-tem is to take an average of the differential equations, where the weights of

the average are basically the portions of a single cycle during which these equationshold2.

In a first approximation, during these times a switch turned on is considered asan ideal short, while a switch turned off is considered as an ideal open, making iteasy to determine what the differential equations for each state are. A more detaileddescription of this technique is given in the next subchapters; further documentationcan be found on (Mohan et al. n.d.) and (Cuk and Middlebrooks n.d.).

The averaging procedure removes the complications involved in the switchingmechanisms, as those are basically ignored and only the average values of the sig-nals are modeled. On one hand, this is an advantage because it delivers a simplermodel, useful to control slow changes of the signal3. On the other hand, the infor-mation on the exact value of the signals at the switching times is lost, making it anunusable tool for precise assessments of performance benchmarks such as switchingand conduction losses.

This is the basic reason why the feedback controller for the complete buck-boosttopology, which is based on this averaged model, only takes care of things such asensuring stability and disturbances rejection; since it cannot ”understand” how tocontrol better in terms of switching and conduction losses, this part of the control-ling mechanism is lend to another structure. This is going to be discussed further inChapter 3 and 4.

In the next Sections, 2.3.1 and 2.3.2, the two separated models for the full-buckand for the full-boost operation modes are first discussed. After those, a modelwhich fully discloses all the degrees of freedom the circuit makes available andwhich describes the complete buck-boost functionality of the circuit is described.

It is to be noted that the first two models are a special case of the last one (bothin functional and mathematical sense), as it is also going to be shown.

Yet, it is also very important to observe that the complete description bringsalong a number of features that are not to be found in the separated topologies; thesefeatures are unique and show that the complete description is not just a patchworkof the two simpler models, therefore making it a more complex reality which needsto be considered carefully.

2Additional documentation on DCDC Power converters modeling can be found in (?),(?),(?),(?),(?)3With ”slow” it is meant slower than the switching frequency

16

2.3. BASIC ANALYTICAL MODELS: FULL-BUCK AND FULL-BOOST

2.3.1 Buck Model

The circuit can be considered equivalent to a synchronous buck converter if the thirdswitch T3 is always turned on, i.e. if d2 = 1. A preliminary study of the ”buck mode”is useful to show the general approach which is going to be used for more complexmodes.

It turns out in fact that this version is the most attractive one as a starting pointfor a study because the differential equations describing the states of the circuit (iLand vC) coming from the averaging method are linear by nature. This makes thesuccessive development of a control for this mode of the circuit straight-forward.

The procedure is the following: first, consider the case where T1 is on, and T2 isoff; applying Kirchhoff Voltage Law (KVL) and Kirchhoff Current Law (KCL) to thecircuit depicted in Figure 2.1 leads to the following equations for the states:

vin = iLRL + LdiLdt

+ vC +RCCdvC

dt(2.1)

iL = CdvC

dt+

vC

Rload+ C

dvC

dt

RC

Rload(2.2)

Then, consider the complementary case where T1 is off, and T2 is on; the sameequations hold basically, if vin is taken to be zero. Again, applying KCL and KVLleads to:

0 = iLRL + LdiLdt

+ vC +RCCdvC

dt(2.3)

iL = CdvC

dt+

vC

Rload+ C

dvC

dt

RC

Rload(2.4)

The basic idea of the averaging technique is now the following: the set of Equations2.1-2.2 is valid during the portion of cycle time d1, while the other set, Equations2.3-2.4 is valid during 1−d1. Multiply each set of Equations with these weights, andthen sum them together; simple algebraic reorganization of that result leads to:

diLdt

= −[RL

L+

RCRload

L (RC +Rload)

]iL +

[− 1L

+RC

L (RC +Rload)

]vC +

vin

Ld1 (2.5)

dvC

dt=[

Rload

C (Rload +RC)

]iL −

[1

C (Rload +RC)

]vC (2.6)

For the output the following equation holds in both switching positions (no actualaveraging is therefore required):

vout = vC + CdvC

dtRC (2.7)

17


Equation 2.7 can be expanded by substituting dvC

dt from Equation 2.6, and after somealgebraic manipulation we obtain:

vout = vC +iLRload − vC

Rload +RCRC (2.8)

Equations 2.5-2.6 and 2.8 are the averaged model. It is evident that a matrix versionof these equations in the standard linear state-space description can be obtainedwithout the need of an additional linearization because, as can be observed (andas explained previously), the equations are linear in the states and in the inputs bythemselves. The standard matrix formulation is:

x = Ax+Bu

y = Cx+Du(2.9)

with:

x =[iLvC

]u = d1

(2.10)

and:

A =

[−RL

L + −RCRload

L(RC+Rload) − 1L + RC

L(RC+Rload)Rload

C(Rload+RC) − 1C(Rload+RC)

]B =

[vin/L

0

]

C =[Rload

RC

Rload+RC1− RC

Rload+RC

]D =

[0] (2.11)

The equivalent buck topology which is achieved by setting d2 = 1 lacks of thedegrees of freedom which are given by the full (d1, d2, φ) coordinates when they canbe chosen independently in [0, 1]3. This is why there is no optimization with respectto losses for this topology: because there is only one possible d1 which is able toreach a given vout demand.

This is also why, as it can be verified, a simple feedback approach (as opposedto a combined feedforward and feedback approach, as discussed later) is enough tocontrol this scheme.

2.3.2 Boost Model

The circuit in Figure 2.1 becomes equivalent to a synchronous boost converter if thefirst switch, T1, is always on, i.e. if d1 = 1.

It turns out that this version does not have linear differential equations comingautomatically out of the averaging procedure.

18

2.3. BASIC ANALYTICAL MODELS: FULL-BUCK AND FULL-BOOST

This is one of the most important difficulties encountered while developing acontroller for this mode of the circuit and for the whole buck-boost topology: theset of differential equations governing them is a set of non-linear equations (non-linear both in the states and in the inputs). It is therefore mandatory to makesome sort of linearization at some point (being it a single linearization or multi-ple linearizations arising in a PWA approach) in order to apply standard controltechniques. Control of a non-linearized plant should not be undertaken in a firstapproach for the control strategy.

Thus, it is clear that more care is needed to gain the model this time comparedto the buck version, while the procedure is basically the same: first determine theset of differential equations valid in each of the two circuit states emerging from thetwo switching positions of T3 and T4 (step 1). Then multiply them by the portion oftime in which they are active, and then sum them together (step 2). This is the setof non-linear differential equations described in the previous paragraph. This set ofequations is then linearized around some operating point, and only then a standardmatrix formulation of the state-space model can be formulated (step 3).

It is to be noted that formulating the set of non-linear equations in terms of somematrices prior to linearization is possible to a certain extent, but can be confusingand is therefore avoided here. Also note that the equations are first merged andonly after that they are linearized.

(step 1) The equations are again gained with a combination of KVL and KCL,with a procedure basically equal to the previous case; after algebraic manipulations,we achieve the equations valid while the switch T3 is on (and T4 is off)

diLdt

=1L

vin −

[iLRL + vC +RC

RloadiL − vC

Rload +Rc

](2.12)

dvC

dt=

1C

RloadiL − vC

Rload +RC(2.13)

vout = vC +RCRloadiL − vC

Rload +RC(2.14)

On the other hand, while T3 is off (and T4 is on), we have:

diLdt

=1L

(vin − iLRL) (2.15)

dvC

dt= − vC

C (Rload +RC)(2.16)

vout = vC + vCRC

Rload +RC(2.17)

19


(step 2) Now we can merge the equations taking their weighted sum. The mul-tiplicative weight for the first set of equations is d2, while the weight for the secondset is 1− d2. Summing them afterward results in the following set of averaged non-linear differential equations:

diLdt

=1L

vin −

[iLRL + d2vC + d2RC

RloadiL − vC

Rload +RC

](2.18)

dvC

dt=

1C

d2RloadiL − vC

Rload +RC(2.19)

vout = vC +RCd2RloadiL − vC

Rload +RC(2.20)

Notice from this equations the evident non-linearity, which is due to terms such as”d2vC”.

(step 3) The set can now be linearized, and we choose as linearization point thedummy point x0 = [iL,0, vC,0] and u0 = [d2,0]. The result is the following set ofequations:

diLdt

=1L

[−RL + d2,0

RCRload

RC +Rload

]iL +

d2,0

L

[1− RC

Rload +RC

]vC + ...

...+1L

[vC,0 +RC

RloadiL,0 − vC,0

Rload +RC

]d2

(2.21)

dvC

dt=

1C

[d2,0

Rload

Rload +RC

]iL +

1C

[− 1Rload +RC

]vC + ...

...+1C

[RloadiL,0

Rload +RC

]d2

(2.22)

vout = d2,0

[RCRload

Rload +RC

]iL +

[1− RC

Rload +RC

]vC (2.23)

which can clearly be expressed in the standard state-space matrix form, and usedonce numerical values for x0 and u0 are chosen. Explicitly, this results in the follow-ing matrix description

x = Ax+Bu

y = Cx+Du(2.24)

with:

x =[iLvC

]u = d2

(2.25)

20

2.4. BUCK-BOOST MODEL

and:

A =

1L

(−RL + d2,0

RCRload

RC+Rload

)d2,0L

(1− RC

Rload+RC

)1C

(d2,0

Rload

Rload+RC

)1C

(− 1

Rload+RC

) (2.26)

B =

1L

(vC,0 +RC

RloadiL,0−vC,0Rload+RC

)1C

(RloadiL,0Rload+RC

) (2.27)

C =[d2,0

RCRload

Rload+RC1− RC

Rload+RC

](2.28)

D =[(

RCRload

Rload+RC

)iL,0

](2.29)

This concludes the introductory discussion on the basic full-boost and full-bucktopologies. In the next Section, the discussion is extended to the complete buck-boost functionality and the results are going to be shown.

2.4 Buck-Boost Model

Taking the discussion a step further, in this section the development of the com-bined buck-boost topology is presented. As noted previously, when exploiting

the degrees of freedom of this circuit, a handful of new features arises which are notto be encountered in the previous special cases. Among others, these can be cited:

1. Operating the switches as discussed in Section 1.2 gives rise to four feasiblecombinations of switching states 2.5 compared to the previous cases where weonly had two intermitting states. This is the reason why this converter is calleda four-state converter.

2. This also directly relates to the fact that the equations for the state-times (thetime portions, during which one of the four state is active each cycle) are morecomplex than before; the solution to this problem is given below, see Section2.4.3.

3. Previously the choice of the duty cycles d1 (for the buck) and d2 (for the boost)was constrained by the vout output demand. For instance, in the buck mode, ifthe demand was vout = 10V with a given vin = 20V , then there was only onefeasible d1 which could achieve that demand (which is d1 = 0.5 in the idealcase). This is no longer the case, as it is going to be shown, since an infinity ofcombinations of (d1, d2, φ) exists that achieves a given vout demand.

21


4. This additional degrees of freedom also enable us to have a better control onthe currents flowing inside the circuit while keeping the same vout. Exploitingthis property is going to allow us to optimize the switching in order to achievebetter performance in terms of losses.

5. Another important aspect concerning the modeling is that two different mod-eling approaches are actually going to be taken this time. The first one is theusual averaging-technique, which will deliver the model used for the feedbackMPC. The second one is an engineered simulation of the hybrid behavior ofthe switched system, described further in Section 2.4.5; the true waveform ofiL (and not only its average) will be reproduced with this model, which willbe used as a reliable tool for assessing the losses behaviour.

In the following, the presentation of the different models needed for the evaluationof the buck-boost functionality is organized as follows: in Section 2.4.1, the Equa-tions valid for the mean values of the plant’s variables at steady state is briefly de-scribed; in Section 2.4.2, the Equations governing the circuit behavior in each of thefour possible states are presented, and in the subsequent Section 2.4.3, the algorithmused in order to determine the state times (the weights of the average) is exposed.The results of these two Sections will be combined in Section 2.4.4 in order to achievethe average model, and in Section 2.4.5 in order to obtain the hybrid model.

2.4.1 Estimation Equations

This is a set of equations useful for determining the steady-state mean values ofdifferent signals. They do not account for the presence of the parasitic ESRs whichare otherwise included throughout the rest of the report, but are nonetheless useful.Output values:

vout = vind1

d2(2.30)

iout =vind1/d2

Rload(2.31)

Capacitance:

vC = vout (2.32)

iC = 0 (2.33)

22


Inductance:

vL = 0 (2.34)

iL =vind1/d2

Rloadd2(2.35)

2.4.2 Equations for the four States

For each of the four states depicted in Figure 2.5 the corresponding sets of governingdifferential equations is given here below. These differential equations are obtained,as usual, by applying KVL and KCL laws and then by algebraically reorganizingthem, similar to what has been done in Sections 2.3.1 and 2.3.2. The denotations areto be understood as follows: State ”13” means that switches T1 and T3 are currentlyon; State ”23” means T2 and T3 are on, and so on.

a)

L

R C

C

R loadL

R C

C

VinR load

L

R C

C

VinR load

L

R C

C

R load

R L

R L

R L

R L

a)

b) d)

c)

Figure 2.5: Pictures of the circuit in its four possible states.

23


State ”13” (see Figure 2.5.a)

diLdt

=1L

[vin − iL

(RL +

RC

1 +RC/Rload

)− vC

(1− RC

Rload +RC

)](2.36)

dvC

dt=(iL −

vC

Rload

)(1

C (1 +RC/Rload)

)(2.37)

vout = vC +RCiLRload − vC

(Rload +RC)(2.38)

State ”14” (see Figure 2.5.b)

diLdt

=1L

[vin −RLiL] (2.39)

dvC

dt= − vC

C (RC +Rload)(2.40)

vout = vC −RCvC

(Rload +RC)(2.41)

State ”23”4 (see Figure 2.5.c)

diLdt

=1L

[−iL

(RL +

RC

1 +RC/Rload

)− vC

(1− RC

Rload +RC

)](2.42)

dvC

dt=(iL −

vC

Rload

)(1

C (1 +RC/Rload)

)(2.43)

vout = vC +RCiLRload − vC

(Rload +RC)(2.44)

State ”24”5 (see Figure 2.5.d)

diLdt

=−RL

LiL (2.45)

dvC

dt= − vC

C (RC +Rload)(2.46)

vout = vC −RCvC

(Rload +RC)(2.47)

2.4.3 Equations for the State-Times

The following equations will model the time the circuit spends in each of the fourstates for a given (d1, d2, φ) coordinate. Notice that these equations also respect the

4Notice that is basically the same set of equations as the previous one, if vin is taken to be zero.5Again, this is the same set of equations of State 14 if vin is set to zero.

24


(relative) order in which these states appear6.Notice how a partitioning in cases was necessary to model the state-times cor-

rectly: a case-choice is to be made each time in order to fetch the valid set of equa-tions (in figure 2.6 the correspondence between case and switching condition is de-picted).

a)

b)

c)

d)

e)

f)

Figure 2.6: Diagrams of the different possible gate signals.

The symbols are understood as follows: t13 is the time spent while T1 and T3 areon (therefore T2 and T4 are off). Similarly, t23 means T2 and T3 are on, and so on;interpret the following as a MATLAB-code snippet (i.e. nested ”if” routines wherenecessary).

Case 1 (Figure 2.6.a):

if (phase<=d1) && (mod(phase+d2,1)<= d1)

if ((phase+d2 - mod(phase+d2,1)) == 0)

t14 = phase;

t13 = d2;

6While the relative sequence of states is not a relevant information for the averaged model, it is in factfundamental for properly simulating the switching behavior which is done in Section 2.4.5 in order togain the hybrid model

25


t14 = d1 - (d2+phase);

t24 = 1-d1;

end

Case 2 (Figure 2.6.b):

if ((phase+d2 - mod(phase+d2,1)) ˜= 0)

t14 = phase - (1-d2);

t13 = 1-d2;

t23 = d1-phase;

t24 = 1-d1;

end

end

Case 3 (Figure 2.6.c):

if (phase>=d1) && (mod(phase+d2,1)>= d1)

if ((phase+d2 - mod(phase+d2,1)) == 0)

t14 = d1;

t24 = phase-d1;

t23 = d2;

t24 = 1-phase-d2;

end

Case 4 (Figure 2.6.d):

if ((phase+d2 - mod(phase+d2,1)) ˜= 0)

t13 = d1;

t14 = phase-(1-d2)-d1;

t24 = 1-d2;

t23 = 1-phase;

end

end

Case 5 (Figure 2.6.e):

if (phase<=d1) && (mod(phase+d2,1)>= d1)

t13 = phase;

t14 = d1-phase;

t13 = phase+d2-d1;

t23 = 1-phase-d2;

end

26


Case 6 (Figure 2.6.f):

if (phase>=d1) && (mod(phase+d2,1)<= d1)

t13 = phase-(1-d2);

t23 = d1-(phase-(1-d2));

t24 = phase-d1;

t23 = 1-phase;

end

Based on the results of these two first Subsections, it is now possible to estabilishthe equations for the averaged and hybrid models.

2.4.4 The Averaged Model

Multiplying the state-equations (2.38)-(2.47) with the corresponding state-times al-ready provides the set of non-linear differential equations used to get the averagedmodel. Explicitly, this results in:

diLdt

=1L

[vin − iL

(RL +

RC

1 +RC/Rload

)− vC

(1− RC

Rload +RC

)]t13 + ...

...+1L

[vin −RLiL] t14 + ...

...+1L

[−iL

(RL +

RC

1 +RC/Rload

)− vC

(1− RC

Rload +RC

)]t23 + ...

...+−RL

LiL t24

(2.48)

dvC

dt=(iL −

vC

Rload

)(1

C (1 +RC/Rload)

)t13 + ...

...+−vC

C (RC +Rload)t14 + ...

...+(iL −

vC

Rload

)(1

C (1 +RC/Rload)

)t23 + ...

...+−vC

C (RC +Rload)t24

(2.49)

vout =[vC +RC

iLRload − vC

(Rload +RC)

](t13 + t23) + ...

...+[vC −RC

vC

(Rload +RC)

](t14 + t24)

(2.50)

27


Equations 2.48-2.49 can be rewritten in a more compact form as follows:

[ ˙iL˙vC

]= F (iL, vC , vin, d1, d2, φ) =

=(F13

[iLvC

]+vin

L

)t13(d1, d2, φ) +

(F14

[iLvC

]+vin

L

)t14(d1, d2, φ) + ...

...+ F23

[iLvC

]t23(d1, d2, φ) + F24

[iLvC

]t24(d1, d2, φ)

(2.51)with:

F13 = F23 =

−1L

(RL + RC

1+RC/Rload

)−1L

(1− RC

Rload+RC

)(1

C(1+RC/Rload)−1

Rload

(1

C(1+RC/Rload)

(2.52)

F14 = F24 =[−RL

L

0

](2.53)

Since this model is non-linear, like the boost version discussed in Section 2.3.2,a linearization around some operating point, denoted here again x0 = (iL,0, vC,0)and u0 = (d1,0, d2,0, φ0), needs to be made. Such linearization can be written in thestandard state-space matrix form yielding, for A:

A =∂F (iL, vC , vin, d1, d2, φ)

∂x(iL, vC)

∣∣∣∣x0,u0

=

= F13t13(d1,0, d2,0, φ0) + F14t14(d1,0, d2,0, φ0) + ...

...+ F23t23(d1,0, d2,0, φ0) + F24t24(d1,0, d2,0, φ0) ∈ R2×2

(2.54)

The values t13(d1,0, d2,0, φ0), t14(d1,0, d2,0, φ0), ..., which are still left undeterminedin this last result have to be determined with the right case-choice from the ”if”-structure presented in the previous Section.

28


For B, we do partial derivation with respect to the inputs, yielding:

B =∂F (iL, vC , vin, d1, d2, φ)

∂u(d1, d2, φ)

∣∣∣∣x0,u0

=

=(

F13

[iLvC

]+vin

L

)∂t13(d1, d2, φ)

∂u

∣∣∣x0,u0

+ ...

...+(

F14

[iLvC

]+vin

L

)∂t14(d1, d2, φ)

∂u

∣∣∣x0,u0

+ ...

...+F23

[iLvC

]∂t23(d1, d2, φ)

∂u

∣∣∣x0,u0

+ ...

...+F24

[iLvC

]∂t24(d1, d2, φ)

∂u

∣∣∣x0,u0

=

=

[0 iL,0

C(1+RC/Rload) 0vin

L−RloadvC,0

L(Rload+RC) + −RCiL,0L(1+RC/Rload) 0

]∈ R2×3

(2.55)

Notice that the last equality in Equation (2.55) is not trivial. First, only aftercomputation of the partial derivative of the state-times with respect to the inputs,i.e.:

∂t13(d1, d2, φ)∂u

∣∣∣x0,u0

,∂t14(d1, d2, φ)

∂u

∣∣∣x0,u0

,∂t23(d1, d2, φ)

∂u

∣∣∣x0,u0

,∂t24(d1, d2, φ)

∂u

∣∣∣x0,u0

it turns out that for each ”if”-case the B matrix looks always the same, while poten-tially six different matrices could have arisen for each of the six cases. Second, noticehow the last column of B contains only zeros; this confirms the statement made inSection 1.4, where it was asserted that the mean of the output voltage does not de-pend on φ. Based on this model, it actually turns out that none of the mean values(i.e. also the internal states’ mean values) changes if the phase is varied7.

For the C and D matrices, the derivation of the output Equation with respect tothe states and the inputs has to be made, leading to8:

C =[

RloadRC

Rload+RC(t13 + t23) 1− RC

Rload+RC

]∣∣∣∣x0,u0

∈ R1×2 (2.56)

D =[iL,0

RloadRC

Rload +RC

∂(t13 + t23)∂u

]∣∣∣∣x0,u0

∈ R1×3 (2.57)

7The fact that the output mean value is not influenced is in fact a consequence of this fact, and thereforeonly indirectly a consequence of the fact that the last column of B only contains zeros.

8In the MATLAB routines attached to this document, approximations for these matrices have usuallybeen made. In particular, C has been approximated to be C ≈ [0 1] and D ≈ [0 0 0]

29


This ends the discussion about the models needed for the feedback part of thecontrol scheme, discussed in Section 4.4.2.

2.4.5 The Hybrid Model

Hybrid model might sound exotic, but it is developed here in the (probably) mostintuitive way without resorting to tools such as HYSDEL9. This is done by using theinformation on the state times and their sequence from the previous Sections 2.4.2-2.4.3: basically, the sequence in which the states appears is known, and their activetime is known as well. The voltage across the inductor is easily estimated with thefollowing equations:

State ”13”:

vL = vin −[vC +

(iL −

vout

Rload

)]− iLRL (2.58)

State ”23”:

vL = −[vC +

(iL −

vout

Rload

)]− iLRL (2.59)

State ”14”:

vL = vin − iLRL (2.60)

State ”24”:

vL = −iLRL (2.61)

Then, integrating

diL =vL

Ldt (2.62)

over the period of time during which each state is active (thereby approximatingwith the assumption that vL be constant) readily gives the desired waveform withthe small addition that the offset still needs to be adjusted. This can be done eitherby using the approximative equation for the mean iL at steady state (2.35), which isdone here (because of its simplicity) with good results, or by enforcing the constraintthat the current at the beginning of each period must be equal the current at the endof it.

9http://control.ee.ethz.ch/˜ hybrid/hysdel/

30


Figure 2.2 shows for one given (d1, d2, φ) coordinate that the two approachesagree up to 0.1%; it can be verified that the prediction for iL obtained this way isaccurate also for other choices of u.

As stated previously, the results from this hybrid model are used afterward tomake assessment regarding the behavior of switching and conduction losses; this isgoing to be the main topic of Chapter 3.

31

Chapter 3

Power Losses

Ploetzliche Regenfaelle koennen zum Betreten einerBuchhandlung zwingen.

Loriot

3.1 Introduction

Our objective is to drive the circuit while minimizing the losses occurring insideof it. In order to do this, models for the behavior of these losses are necessary;

i.e. the aim of this Chapter is to present how this mapping, Ploss = f(d1, d2, φ), canobtained.

3.2 Losses Description

There are two different types of losses occurring inside the circuit: ConductionLosses (PConduction) and Switching Losses (PSwitching); in the following, these

two types of losses are going to be shortly described.

Conduction Losses

These are losses of resistive type, and, for the particular circuit that is investi-gated, they are produced because of current flowing through the following resistivemedia:

• MOSFETs’ channel resistance RDS,on

• MOSFETs’ body diode

• Capacitance’s ESR (Equivalent Series Resistance)

• Inductance’s ESR

33

CHAPTER 3. POWER LOSSES

Being these losses of resistive type, they can be modeled to be proportional to thesquare of the RMS value of the current flowing inside the circuit, i.e.:

PConduction ∼ i2L,rms (3.1)

Note: this estimation is already an approximation, since higher losses will usu-ally cause a rise of temperature, which is going to affect the values of the parasitiveresistances, which in turn is going to affect the losses.

Switching Losses

The mechanisms involved in the production of switching losses are more com-plicated than the previous ones. They are produced by the action of turning onand off active devices on the power’s path, therefore they only happen at discretetimes ”tj” (where j indexes all the times at which switchings of a given MOSFEToccur) and for a short period; they occur under the following circumstances (Mohanet al. n.d.):

• switching of power currents (”turning on and off currents in the presence ofvoltage”)

• parasitic drain capacitance charge and discharge

• gate drive losses

• body diode reverse recovery

In the part of investigation conducted on switching losses, only the first contribution(i.e. switching losses due to switching of power currents) has been considered. Anestimate of their magnitude can be obtained as follows:

• If the MOSFET is turning on, and the current was not flowing through itsbody diode, then the switching loss can be estimated as being proportional tothe product of the current that will start to flow through the MOSFET and thevoltage across the MOSFET prior to switching, i.e.:

PSwitching,j ∼ v(t−j )iL(t+j ) (3.2)

• If the MOSFET is turning off, on the contrary, and the current will not be ableto flow through its body diode, then the switching loss can be estimated asbeing proportional to the product of the current that was flowing through itand the voltage that will be applied to the MOSFET after, i.e.:

PSwitching,j ∼ v(t+j )iL(t−j ) (3.3)

34

3.3. MODELING POWER LOSSES

because of this, if the current iL is positive (flowing from the input stage to the out-put stage), then switching losses will occur only at switches T1 and T4. Conversely,if iL is negative, then switching losses will occur in switches T2 and T3.

On a side note, it can be noted that since these losses occur at switching times,the more switchings there are, the higher the switching losses will be (if the sameMOSFETs are used), i.e. switching losses grow proportionally to the switching fre-quency. Therefore, on one hand, switching frequency should not be chosen to bearbitrarily high. But on the other hand, switching frequency should not be chosentoo low either because that would cause higher ripples on the output voltage.

Also, it is of critical importance to note at this point that during the simulationsdescribed further in this chapter, the magnitude of the losses is estimated using thesevery equations. But since these equations only give results that are proportional to theexact values, their shape will describe the general behavior of the losses properly,but their magnitude will need to be corrected by an adequate multiplicative correc-tion constant. This constant will strongly depend on the choice of components thatis going to be made. This aspect is discussed more in detail in the next Section.

3.3 Modeling Power Losses

Itis possible to achieve a characterization of the switching and conduction lossesusing the equations of above, by estimating their value for each choice of (d1, d2, φ).

This is accomplished by using the model (2.58)-(2.61) discussed in Section 2.4.5,which reproduces the hybrid behavior of the plant; explicitly, for each combinationof (d1, d2, φ), the shape of iL is calculated. This enables the calculation of the con-duction losses. Then, the equations for the state-times exposed in Section 2.4.3 areused to fetch the sequence of switchings occurring during each cycle, and the timesat which each switching occurs. This information is sufficient in order to calculatethe switching losses.

Notice that such a detailed description (in contrast to a simplified version givenby the averaged models) is needed in order to assess losses, first because the RMSvalue of the current is needed (which can only be calculated if the correct shape ofthe iL current is known), and second because the losses also depend on the sequenceof switchings which is adopted, which therefore needs to be known (what switch isswitched when, so that the current can be multiplied with the correct voltage).

The losses have been investigated for many vout/vin ratios, i.e. the set of (d1, d2, φ)combinations giving the same output voltage has been gridded and then simulatedfor each of the resulting knots. Typical results for low output references and for highoutput references are shown in Figure 3.3 and 3.3.

35


Figure 3.1: Switching and Conduction Losses for a low vout/vin demand. Values are notscaled properly, but do give an idea of the percentages. Notice that the switching losses havea pretty marked behavior in this case; this is probably due to resonant occurrences inside thecircuit which should be investigated further. This image has been selected mainly because itshows well how conduction and switching loss minima-locations do not necessarily coincide.

A fundamental result of this study is shown in Figure 3.3: it is evident from thetwo pictures that the positions at which conduction losses and switching lossesare minimal do not necessarily coincide. The same result can be verified in Figure

36


Figure 3.2: Switching and Conduction Losses for a high vout/vin demand. Values are notscaled properly, but do give an idea of the percentages. The switching losses behavior de-picted for this case is more representative of what is usually encountered.

3.3. This poses a challenge in the following sense: if the two minimal positionswould coincide, then the minimum of the sum of the two losses would also be atthat same place; but since they do not, it is important to sum up together the correctvalues for conduction and switching losses, in order to achieve the correct positionof the minimum of the total. On one side, this means that sometimes there needs to

37


be an optimized trade-off between these two types of losses. On the other hand, thisalso means that the exact values of the two losses will influence the position of theminimum of the sum. Or stated another way round: we saw that the exact valuesof switching and conduction losses still depend on the value of the multiplicativecorrection terms that need to be applied; these values in turn depend on the choiceof components, and as a consequence the value and position of the minimum totalloss will depend on the choice of components.

2.96 2.964 2.968 2.972 2.976 2.981.1

1.11

1.12

1.13

1.14

1.15

1.16

1.17

Conduction Losses vsSwiching Losses

time (ms)

i L (

A)

2.96 2.964 2.968 2.972 2.976 2.980

5

10

15

20

25

30

time (ms)

Sw

itch

ing

Lo

ss (

~)

phase = 0.8phase = 0.2

Figure 3.3: Comparison between conduction (upper graph) and switching losses (lowergraph) for two different (d1, d2, φ) combinations giving both vout/vin = 0.2 (both haved1 = 0.14, d2 = 0.7). On the first graph, it is clear that the blue curve, with φ = 0.2 hasoverall lower conuction losses, because its RMS value is lower than the red one. On the lowergraph, however, where switching losses are depicted (as losses occurring only at discretetimes) it is clear that the blue inputs combination delivers higher switching losses. Therefore,it is verified that conduction and switching losses do not necessarily have coinciding minimalpoints, since lowering one might cause an increase in the other.

For the successive development of the controller, which will depend on these

38


results, a certain choice for the corrective weights has been made, which is in noway bound to any actual choice of components - as it should. This choice has beenmade for prototyping purposes, and appropriate weight still need to be determinedfrom a proper selection of components.

39

Chapter 4

Controller Design

Short cuts make long delays.

Hobbit Proverb

4.1 Introduction

Based on the research done on the models in Chapter 2 and the Losses in Chapter3, it is now possible to start developing an efficient control for the plant. As a

reminder, our task is to control the duty cycles of each pair of transistors and theirphase, so as to ensure:

• first and most important: reaching of and stabilizing around a given outputvoltage demand;

• reaching the target steady state should happen in the desired manner, i.e. thecontroller needs to handle transients properly;

• the controller also needs to be able to reject disturbances (usually encounteredon the load and on the input voltage source vin);

• while doing all this, the controller (in the full buck-boost mode) needs tochoose among the infinite possibilities of inputs, that would satisfy the aboveconditions, those that will cause the least losses.

Notice that, as explained previously, minimization of losses is only possible if allthe degrees of freedom of the circuit are exploited, i.e. there is no optimization ofcontrol strategy towards minimal losses for the buck or boost modes alone.

The presentation of the development of such a controller is going to be handledin the next Sections as follows: first the choice of MPC as control approach for thefeedback is motivated; in Section 4.3 the control techniques deployed for the basicversions of the circuit (full-buck and full-boost) are discussed, based on which themore complex control for the whole buck-boost functionality is finally going to bediscussed, Section 4.4.

41

CHAPTER 4. CONTROLLER DESIGN

4.2 Why MPC

MPC was chosen based on the following reasons:

• its ability to efficiently deal with constraints

• because standard control techniques such as a PID implementation deliveredunsatisfactory results (Frehner 2007)

• because of its robustness to model uncertainties

• and because it works for multiple inputs plants exactly the same way as itworks for the SISO ones, thereby allowing analogous implementations for thebuck/boost (one input) and buck+boost (three inputs) modes; on the contrary,traditional implementations using control techniques such as PIDs presentmany challenges when applied to multiple inputs plants, especially when itcomes to the assessment of control performances such as stability, robustnessand disturbances rejection.

Also, while MPC was previously only applied to slow-dynamics plants, be-cause the control action needed to be calculated from an optimization problem eachtime (on-line control), recent developments made it possible to move the burden ofcalculating the control moves off-line, through what is called a multi-parametric(quadratic in this case) program approach (mpQP), thus allowing to apply MPCsalso to plants with fast dynamics (IfA Website1).

Calculating the input move on-line would consist in solving a quadratic program(QP) each time (if 2-norm cost functions are taken - as it is usually the case), and amultiparametric approach just means that this optimization problem is parametrizedand solved for a certain set of parameters x (this is the set of all the x’s containedin a predefined constrained set X), and during runtime the correct input is easilycomputed by plugging in the parametrized solution the appropriate current state x.

Multiparameter problems allow to calculate so-called explicit MPCs. An expliticMPC is therefore nothing more than a look-up table that will return the control moveto be taken given some current state x. Notice that this is the same control move thatwould be applied if an on-line MPC strategy would be chosen instead of the explicitone.

Since the control moves are pre-calculated moving around the whole feasibleU ×X set, it is necessary to constrain it in order to make this procedure end in finitetime. This is why this technique can be applied only to constrained problems. Forthis particular plant, the inputs, which are basically the duty cycles and the phase,

1see (IfA n.d.) http://control.ee.ethz.ch/ hybrid/control.php

42

4.3. BASIC CONTROL STRATEGIES

need to be bounded between 0 and 1. This results in the inputs set U to be delimitedto:

U =u ∈ R3 | u ∈ [0, 1]3

(4.1)

X , on the other hand, is only ”loosely” constrained, i.e. it is taken to be much largerthen the actual values of the states are ever going to be driven at, just to make thecomputation feasible. Notice that other restrictions could be made, in particular arestriction on the inductor current to be non-negative (if discontinuous mode hasto be considered) and other restrictions to ensure soft-start requirements could bemade2.

4.3 Basic Control Strategies

4.3.1 Buck, the Simplest Mode

As discussed in Chapter 2.3.1, the model obtained with the averaging techniqueis linear. There is only one variable being controlled (d1) and there is no opti-

mization of controls towards least losses. This is why a simple feedback approach(as opposed to a combined feedforward and feedback approach, as discussed later)is enough to control this scheme.

The feedback control is implemented as an explicit MPC. The MPC is to be fedwith a discrete time model which is easily obtained from the continuous model ofEquations (2.24)-(2.29) with the c2d() routine in MATLAB . Thus, starting from theseequations and plugging in testing values for the components reported in Table 4.1,the following discrete-time model results:

xk+1 = Axk +Buk (4.2)

yk = Cxk +Duk (4.3)

with:

A =[

0.9992 −0.04980.03321 0.9925

]B =

[0.99970.01662

]C =

[0.9998 0.0009998

]D = [0];

2http://control.ee.ethz.ch/˜ hybrid/applications.php#powerElectronics

43


Full-Buck, Full Boost vin 20V

L 2e−5H

C 3e−5F

Rload 5Ω

RL 0.001Ω

RC 0.001Ω

Buck-Boost vin 20V

L 2e−4H

C 3e−5F

Rload 5Ω

RL 0.001Ω

RC 0.001Ω

Sampling Frequency TS 100kHz

Table 4.1: Values of the components used to test the behavior of the controller.

A typical start-up response of the controlled output can be seen in Figure 4.1.The details of this implementation, such as the influence of the weights and of theprediction horizon, are not discussed further, since this is a special case of the com-plete buck-boost topology; such discussions are going to be made for the generalcase in Section 2.4.

4.3.2 Boost Mode and the Gain Scheduling Technique

Analogous to the Buck operation mode, only one variable is being controlled(d2) and no optimization towards least losses can be done. Therefore also in

this case a simple feedback controlling strategy (i.e. not a combined feedforward +feedback) is taken. And again, the feedback is based on a MPC approach, and thediscrete-time model is obtained with c2d() like before.

But the boost operation mode presents a challenge which was not encounteredfor the buck mode: since the model obtained with the averaging technique is notlinear, the matrices obtained linearizing around x0 and u0 still depend on the nu-merical values of x0 and u0, as can be seen from Equations (2.24)-(2.29). This couldindeed be a major problem because basically it means that different steady-state op-erating points have different dynamics. Notice that this challenge is to be faced inthe full buck-boost operation mode as well.

Fortunately, it turns out that while the plant driven in boost mode is indeed non-linear, it still behaves ”well” (see below for what is meant with ”well”).

This fact has been exploited both for the boost and the buck-boost mode. Thereasoning behind it is the following: the fact that the model is non-linear is a realitywhich cannot be avoided and needs to be accounted for; the most basic approach to

44

4.3. BASIC CONTROL STRATEGIES

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 50

1

2

3

4

5

6

7Full-Buck Output Performance

time (ms)

v ou

t (V

)

Figure 4.1: Startup performance of the controller developed for the full-buck operation, withvout,ref = 6V . Small ripples are visible at steady state, since noise was added to vin in orderto make a first assessment of noise rejection performance.

face this problem from a control perspective is to apply a Gain Scheduling Tech-nique3: this technique basically consists in linearizing the system around as manysteady-state points as possible (and at least so many as to ensure the basic require-ments of controlling) and then to design a control for each of these linearizations; af-terwards switching policies between these multiple controls need to be established,thereby obtaining a control that works for the whole region.

In the boost case, due to its low degree of non-linearity, only one of such lin-earizations is strictly necessary in order to ensure reaching of the target steady-statevout and stabilization around that point. Of course, the best performance is obtainedwhen the target steady-state point is at or near to the point around which the modelof the plant was linearized. Taking output demands far from that point result in adegradation of performance during transients. The extent of this performance lossdepends on the choice of components, but this has not been investigated further;yet, later in Section 2.4 the discussion on the whole buck-boost functionality is go-ing to lead to this same topic again, and it is going to be shown that indeed the plantbehaves ”well”.

3http://control.ee.ethz.ch/˜ apnoco/Lectures/lec08.pdf

45


Pluggin numerical values for the components in the continuous model (2.24)-(2.29), choosing as a linearization point vout/vin = 1.5 and then obtaining the discrete-time model from c2d() results in the following matrix description:

xk+1 = Axk +Buk (4.4)

yk = Cxk +Duk (4.5)

with:

A =[

0.9998 −0.019930.01329 0.9932

]B =

[−2.5090.8137

]C =

[0.0003999 0.9998

]D = [0.025];

The control scheme deployed for this mode can be seen in Figure 4.2. A typicalstart-up response of the controlled output can be seen in Figure 4.3. Also in thiscase the details of the implementation, such as the influence of the weights andof the prediction horizon, are not discussed further since this is a special case ofthe complete buck-boost topology; such discussions are going to be made for thegeneral case in the next Section.

4.4 Buck-Boost Operation

The buck-boost implementation is similar to the boost one in that non-linearity isstill present. Other than that, it turns out that exploiting the possibilities given

by the full buck-boost operation requires additional care because:

• there are now multiple inputs

• control actions also need to drive the plant while ensuring least possible losses

While going from a single input to a multiple inputs plant is done smoothlywith an MPC approach, losses control require additional care. In this work, the waythe handling of losses has been achieved is by applying a combined feedforwardand feedback control structure (rather than a feedback control alone, as done pre-viously). A simplified abstraction of the control scheme that enlightens the controlflow can be seen in the block diagram in Figure 4.4. The more detailed Simulinkimplementation, including all the subsystems used, can be seen in Figure 4.4.

46

4.4. BUCK-BOOST OPERATION

Figure 4.2: Control scheme deployed for the full-boost operation mode. The feedforward ele-ment is nothing more than an implementation of the Equations 2.4.1 used to achieve approx-imatively the right output voltage. The finer control towards the exact value is undertakenby the feedback MPC. The addition of noise on vin is also visible. The PLECS circuit wassubstituted with an implementation of the Equatins in 2.3.2.

4.4.1 The Feedforward

The feedforward control (denoted as precalculated look-up table in the block dia-gram) is responsible for the major contribution to the signal u. It is by far the sim-plest approach with which complications such as proper treatment of losses can behandled.

The feedforward table is constructed as follows: recall that in Chapter 3 the in-vestigations led to two surfaces for each vout/vin demand telling us how switchingand conduction losses behave with respect to the inputs 4. The information fromthese surfaces has been used here as follows: the total loss for each given point is aweighted sum of switching and conduction losses. The weights can be adjusted andcan potentially lead to different feedforward tables, but the essence of the procedureis the same. In this work, the weighting has been the following5:

Ploss,Total = 0.7Pswitching + 0.3Pconduction (4.6)

These total losses are then compared between each other for each vout/vin demandand the combination of inputs that leads to the least total loss is chosen and inserted

4Notice that all the losses mentioned in the current discussion are losses calculated at steady state.5As stated, the weights could be different based on the true value of the components chosen (and they

do not necessarily need to add up to 1).

47


0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 50

5

10

15

20

25

30

35

40Full-Boost Output Performance

time (ms)

v ou

t (V

)

Figure 4.3: Startup performance of the controller developed for the full-boost operation, withvout,ref = 25V . Again, small ripples are visible at steady state, since noise was added tovin in order to make a first assessment of noise rejection performance. Further, the initialovershoot can be regulated with a proper choice of the weights, which is not shown but thatcan be verified.

v in

vout,ref

Precalculated Steady State Controls

(look-up table)

+

MPC-Based Feedback

PWM Circuit Model(PLECS)

v

x

x0

u

û

0

uout

Figure 4.4: Block diagram of the control scheme deployed for the full buck-boost operationmode.

in the feedforward lookup table.It is to be noted again that, under these circumstances, changing the weights can

and will change the optimal u to be plugged into the feedforward table.Feedforward control therefore ensures that among all the infinite possibilities of

48


Global Scheme

Feedback and Feedforward Blocks

PWM Block

Figure 4.5: Detailed scheme of the control scheme deployed for the whole buck-boost func-tionality.

49


(d1, d2, φ) control combinations that will steer the plant to the desired output de-mand at steady state, only the ones around that one which will cause the least lossesare going to be selected.

In general, feedforward control ensures that the plant will be steered to (at leastapproximately) the right state even if the feedback were to be switched off. It isstraightforward in that no mathematical model needs to be elaborated and then(somehow) patched together with the MPC, which would considerably increase itscomplexity and size (in memory).

The typical content of a feedfoward table is depicted in Figure 4.4; notice how,for the specific choice of weights of above, the control usually tries to drive the plantwith the highest d2 possible. This is directly related with the fact that the current inthe inductor iL (which increases with decreasing d2, see Equations in Section 2.4.1)is a direct measure for the conduction losses.

Figure 4.6: Figure depicting the typical content of a feedforward table. Each point corre-sponds to a certain vout/vin ratio.

50


4.4.2 The Feedback

The feedback part is going to be similar to the previous implementations (Section4.3.2), i.e. it is the part of the controlling structure that will ensure reaching of thedesired steady-state output and rejection of disturbances.

The difference from the previous cases is that this time the MPC will steer theplant to x = 0 ∈ Rn (therefore y = 0 ∈ R). So instead of handling controls towardsabsolute values for the output, the feedback will correct signals deviating from thedesired steady state, i.e. the input to the MPC is not going to be x anymore (remem-ber, MPC is a state-feedback control) but rather x − x0, a strategy usually referredto as ”control towards origin” for obvious reasons. For this reason, one can expectthat the control actions from the MPC are going to be zero once the steady state hasbeen achieved, if the feedforward control was precise enough and if there are nodisturbances.

Since the plant is non-linear, the gain scheduling technique is going to be usedalso here. This time, however, two different linearizations are going to be madeinstead of one. This is due to the plant working in two regions where different setof equations for the state times hold (see Section 2.4.3). Explicitly,

• For the range vout/vin ∈ [0.05, 0.4], the set of equations for the state-times thatis valid is the 5th

• For the range vout/vin ∈ [0.4, 4], the set of valid equatins is the 2nd one instead.

The simplest approach to deal with this aspect is therefore to linearize once aroundsome point contained in the first range, and then linearize once more around an-other point in the second range. For this work, the two linearization points chosenare vout/vin = 0.2 for the ”lower” linearization, and vout/vin = 1.5 for the ”upper”one. The values of u0 and x0 deriving from these choices, which are what is actu-ally needed, are going to be fetched from the feedforward control component (seebelow).

The policy adopted to switch between these two MPCs is straightforward: ifvout/vin is smaller than 0.4 then choose the first one, if vout/vin is larger than 4, thenchoose the second one. Two things need to be noted here:

• output demands out of the actual ranges where the equations are valid (i.e.vout/vin smaller than 0.05 or larger than 4) are still treated with the correspond-ing one of these two MPCs, because they shouldn’t be requested to start with,and even if they are, the output performance is still decent (see Figure 4.12) inpart due to the feedforward action.

• disturbances in vin should also be considered. If the input voltage vin is mea-sured, then the correct vout/vin ratio is calculated and the correct lineariztion

51


is chosen, therefore no problem arises. If instead vin cannot be measured, anddisturbances to it would actually cause a switch of used controller, but thisswitches are not accomplished because these disturbances are not measured,then the need to rely on the robustness of the control arises. This is an as-pect that should be investigated further (along with a precise assessment ofthe controller’s robustness and stability).

The controller has been designed with the help of the mpt studio routine in-cluded in the mpt toolboox for MATLAB (R)6. Other than choosing a ”control to-wards origin” policy for the reasons explained above, the feedback MPC has beendesigned as follows: to calculate the cost function, the 2-Norm has been chosen;the weights on the states and on the output and the prediction horizon have beendetermined iteratively; the procedure has been the following: first, look at the in-fluence to the output curve given by the output weight; since the output voltage isbasically the same signal as vC , this weight is also going to be the weight to the vC

state (therefore, a weight of zero is going to be applied to the state vC , for otherwisedeviations of vC from the desired reference would be accounted twice for); for the”lower MPC” implementation a weight on the output of 10 has been chosen, seeFigure 4.4.2.

The prediction horizon has also iteratively been chosen to be 5, and its influencecan be seen in Figure 4.4.2. In general, it is desirable to have the highest predictionhorizon possible. High prediction horizons improve stabilization characteristics ofMPCs and in general provide better output performances; yet they cannot be chosenarbitrarily high, since computation of the control self increases dramatically withincreasing prediction horizon, and its size (in bytes) increases considerably as well,thus potentially making impossible their implementation on platforms with limitedstorage capacities such as DSPs. After this step, the influence of the weight on the iLstate has been considered, and as can be seen in Figure 4.4.2, even while varying thisparameter by many orders of magnitude, there seems to be no appreciable influenceto the output voltage signal once the other two weights are established.

The same procedure has been applied also for the ”upper” MPC, see Figure 4.4.2.

4.4.3 Results

It can be argued that if this precalculated lookup table does indeed contain the bestvalues the plant (circuit) can be driven at steady state, then the contribution from theMPC feedback can be avoided. This is of course not the case: first, looking at Figure4.9, it is clear that the contribution from the MPC boosts the performance during

6http://control.ee.ethz.ch/˜ mpt/

52


the initial transient. Furthermore, a feedback action is always desired in any controlscheme, in order to ensure the ability to reject disturbances and model uncertainties.

The two contributions to the u signal coming from the feedback and from thefeedfoward part can be seen in Figure 4.10. As it can be seen, the MPC supplies theplant with a contribution different than zero only during the transient. As soon asthe transient has settled, it contribution goes to zero and stays there; this is alwaysthe case as long as no disturbances or other external influences affect the circuit; ifdisturbances are indeed applied, then the MPC control is going to counter those andits contribution is going to be different than zero.

A typical disturbance rejection done by the controller can be seen in Figure 4.11:the blue bottom curve depicts the perturbation (in percentage) affecting the inputvoltage vin, while in the upper graph, the red curve shows how this perturbationaffects the output voltage if no feedback action is taken, and the green one showsthe output if rejections are countered by the MPC.

The resulting output start-up performance for a set of different output referencescan be seen in Figure 4.12; notice that the controller is indeed able to drive the circuitboth in its ”buck” mode and ”boost” mode, as specified in the objectives for thisproject. Further, notice that the control is indeed able to properly drive the plant alsotowards steady states different than those around which the models were linearized,thus showing its ”well” behavior.

53


0 0.2 0.4 0.6 0.8 1 1.2-5

0

5

10

15Output Weight Dependence

time (ms)

v ou

t (V

)

0 0.2 0.4 0.6 0.8 1 1.20

0.5

1

1.5

2

2.5

3

time (ms)

i L (A

)

0.11100

0.11100

0 0.2 0.4 0.6 0.8 1 1.20

0.5

1

1.5

2

2.5

3

time (ms)

i L (A

)

0 0.2 0.4 0.6 0.8 1 1.2-5

0

5

10

15iL State Weight Dependence

time (ms)

v ou

t (V

)

0 0.2 0.4 0.6 0.8 1 1.2-5

0

5

10

15Prediction Horizon Dependence

time (ms)

v ou

t (V

)

0 0.2 0.4 0.6 0.8 1 1.20

0.5

1

1.5

2

2.5

3

3.5

time(ms)

i L (A

)

12510

12510

Figure 4.7: These Figures show the change in output response and in the iL behavior withrespect to changes to weightings for the ”lower” part of the controller.

54


0 0.2 0.4 0.6 0.8 1 1.2-10

0

10

20

30

40Output Weight Dependency

time (ms)

v ou

t (V

)

0 0.2 0.4 0.6 0.8 1 1.20

2

4

6

8

10

12

time (ms)

i L (A

)

0.010.11100

0.010.11100

0 0.2 0.4 0.6 0.8 1 1.2-10

0

10

20

30

40i Weight Dependency

time (ms)

v ou

t (V

)

0 0.2 0.4 0.6 0.8 1 1.20

2

4

6

8

10

12

time (ms)

i L (A

)

0.010.11100

0.010.11100

L

0 0.2 0.4 0.6 0.8 1 1.2-10

0

10

20

30

40Prediction Horizon Dependence

time (ms)

v ou

t (V

)

0 0.2 0.4 0.6 0.8 1 1.20

5

10

15

time (ms)

i L (A

)

12510

12510

Figure 4.8: These Figures show the change in output response and in the iL behaviour withrespect to changes to weightings for the ”upper” part of the controller. As before, there is nonoticeable influence from the iL weight.

55


0 0.5 1 1.5 2 2.5 3 3.5-5

0

5

10

15

20

25

30

35

40

Feedforward vsFeedforward + Feedback

time (ms)

v ou

t (V

)

feedforward

feedforward + feedback

Figure 4.9: Difference of output behaviour if the MPC is deactivated.

0 0.2 0.4 0.6 0.8 1 1.20.4

0.6

0.8

1

Typical Control Action

time (ms)

0 0.2 0.4 0.6 0.8 1 1.2-0.8

-0.6

-0.4

-0.2

0

0.2

0.4

time (ms)

d10d20phase0

d1*d2*phase*

Figure 4.10: Typical control actions of the two parts of the controller. The upper graph showsthe control actions supplied by the precalculated look-up table (which are therefore constantsignals) and the lower graph shows the signals that are superimposed generated by the MPC.

56


1.5 2 2.5 3 3.5 4 4.5 5-5

-3.33

-1.67

0

1.67

3.33

5

6.67

8.33

vin Perturbations Rejection

time (ms)

v ou

t d

evi

ati

on

%

1.5 2 2.5 3 3.5 4 4.5 5-4

-3

-2

-1

0

1

2

3

time (ms)

v in

pert

urb

ati

on

%

without Feedbackwith Feedback

Figure 4.11: Disturbances rejection behavior, with and without the MPC action.

57


0 0.2 0.4 0.6 0.8 1 1.2

0

5

10

15

20

25

30

35

40

Start-Up Performance

time (ms)

v ou

t (V

)

2V

5V

10V

15V

20V

25V

30V

40V

Figure 4.12: Start-up performance for different output demands.

58

Chapter 5

Conclusion

The present work is a study on the circuit depicted in Figure 1.2 which is used toachieve DC-DC power conversion.

In the first part of the work (Chapters 1-3), different models for its behaviourhave been developed, including a state-space averaged model and an hybrid one.Based on these models simulations have been conducted in order to assess the lossesoccurring inside of it. These simulations reveal that it is in general not possible todrive the circuit while minimizing simultaneously both conduction and switchinglosses. Rather, in order to drive the circuit in the most efficent way, an optimizedbalance between these two losses needs to be made. Further, this balance dependson the specific choice of components used.

In the second part of the work (Chapter 4), for a specific choice of components,the implementation of a controller for this circuit is discussed. The controller hasbeen designed as working on the combined action of a precalculated look-up table(feedforward action) and a Model Predictive Control (MPC) based feedback action.The abilty to drive the circuit both in its boost as well its buck modes and its noiserejection capabilty are the performance benchmarks for this controller which havebeen studied.

Recommended extensions to this work include the refinement of the models toaccount for parasitics and non-ideal behaviours, so as to enable a subsequent con-troller implementation based solely on MPC, and a more accurate evaluation of thecontroller’s stabilization capabilties.

59

Bibliography

Cuk, S. and Middlebrooks, R.: n.d., Modeling, analysis and design of switching converters.

Erickson, R.: n.d., Dc-dc power converters, Article in Wiley Encyclopedia of Electrical and Elec-tronics Engineering .

Frehner, P.: 2007, Control of a buck-boost power converter, Semester Thesis, IFA, ETHZ .

IfA, W.: n.d., http://control.ee.ethz.ch/ hybrid/control.php, Institut fr Automatik Website, IFA,ETHZ .

Lin, Y.-C. and Liaw, D.-C.: 2006, A method using an averaging technique for the analysis andevaluation of real quasi-resonant converters, IEICE TRANS. ELECTGRON. .

Mohan, N., Undeland, T. M. and Robbins, W. P.: n.d., Power electronics: Converters, applica-tions, and design.

Note, A.: n.d., Synchronous rectification aids low-voltage power supplies.

Plesnik, M.: 2006, Use of the state-space averaging technique in fast steady-state simulationalgorithms for switching power converters, IEEE CCECE/CCGEI .

Selders, R.: 2003, Synchrnous rectification in high-performance power converter design,POWER designer .

Torrisi, F. D., Bemporad, A., Bertini, G., Hertach, P., Jost, D. and Mignone, D.: 2002, Hysdel2.0.5 - user manual, IEEE CCECE/CCGEI .

Walter, S.: 2008, Design and control of a buck-boost dc-dc power converter, Semester Thesis,IFA, ETHZ .

61

Documents

Design and Control of a Buck-Boost DC-DC Power Converter