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J Supercomput (2011) 55: 400–431 DOI 10.1007/s11227-009-0336-z Designing a Fault-tolerant Fully-Chained Combining Switches Multi-stage Interconnection Network with Disjoint Paths Nitin  · Shruti Garhwal  · Neha Srivastava Published online: 8 October 2009 © Springer Science+Business Media, LLC 2009 Abstract  Multi-stage Interconnection Networks (MINs) are designed to achieve fault-tolerance and collision solving by providing a set of disjoint paths. Ching-Wen Chen and Chung-Ping Chung had proposed a fault-tolerant network called Combin- ing Switches Multi-stage Interconnection Network (CSMIN) and an inaccurate algo- rithm that provided two correct disjoint paths only for some source-destination pairs. This paper provides a more comprehensive and accurate algorithm that always gen- erate correct routing-tags for two disjoint paths for every source-destination pair in the CSMIN. The 1-fault tolerant CSMIN causes the two disjoint paths to have regular distances at each stage. Moreover, our algorithm backtracks a packet to the previous stage and takes the other disjoint path in the event of a fault or a collision in the net- Nitin, Member, SIAM, IEEE and ACM Nitin () Department of Computer Science and Engineering and Information Technology, Jaypee University of Information and Technology, Waknaghat, Solan 173215, Himachal Pradesh, India e-mail: delnitin@ufl.edu Nitin e-mail: [email protected] Nitin e-mail: [email protected] Nitin e-mail: [email protected] S. Garhwal Accenture Services Private Limited, Building 1B, Raheja Mindspace, Madhapur 500081, Hyderabad, India e-mail: [email protected] N. Srivastava Accenture Services Private Limited, Tower 5, Cybercity, 143, Magarpatta City, Hadapsar–Mundhwa Road, Hadapsar 411013, Pune, India e-mail: [email protected]

Designing a Fault-tolerant Fully-Chained Combining Switches Multi-stage Interconnection Network with Disjoint Paths

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Multi-stage Interconnection Networks (MINs) are designed to achievefault-tolerance and collision solving by providing a set of disjoint paths. Ching-WenChen and Chung-Ping Chung had proposed a fault-tolerant network called CombiningSwitches Multi-stage Interconnection Network (CSMIN) and an inaccurate algorithmthat provided two correct disjoint paths only for some source-destination pairs.This paper provides a more comprehensive and accurate algorithm that always generatecorrect routing-tags for two disjoint paths for every source-destination pair inthe CSMIN.

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  • J Supercomput (2011) 55: 400431DOI 10.1007/s11227-009-0336-z

    Designing a Fault-tolerant Fully-Chained CombiningSwitches Multi-stage Interconnection Networkwith Disjoint Paths

    Nitin Shruti Garhwal Neha Srivastava

    Published online: 8 October 2009 Springer Science+Business Media, LLC 2009

    Abstract Multi-stage Interconnection Networks (MINs) are designed to achievefault-tolerance and collision solving by providing a set of disjoint paths. Ching-WenChen and Chung-Ping Chung had proposed a fault-tolerant network called Combin-ing Switches Multi-stage Interconnection Network (CSMIN) and an inaccurate algo-rithm that provided two correct disjoint paths only for some source-destination pairs.This paper provides a more comprehensive and accurate algorithm that always gen-erate correct routing-tags for two disjoint paths for every source-destination pair inthe CSMIN. The 1-fault tolerant CSMIN causes the two disjoint paths to have regulardistances at each stage. Moreover, our algorithm backtracks a packet to the previousstage and takes the other disjoint path in the event of a fault or a collision in the net-

    Nitin, Member, SIAM, IEEE and ACM

    Nitin ()Department of Computer Science and Engineering and Information Technology, Jaypee Universityof Information and Technology, Waknaghat, Solan 173215, Himachal Pradesh, Indiae-mail: [email protected]

    Nitine-mail: [email protected]

    Nitine-mail: [email protected]

    Nitine-mail: [email protected]

    S. GarhwalAccenture Services Private Limited, Building 1B, Raheja Mindspace, Madhapur 500081, Hyderabad,Indiae-mail: [email protected]

    N. SrivastavaAccenture Services Private Limited, Tower 5, Cybercity, 143, Magarpatta City, HadapsarMundhwaRoad, Hadapsar 411013, Pune, Indiae-mail: [email protected]

  • Designing a Fault-tolerant Fully-Chained Combining Switches 401

    work. Furthermore, to eliminate the backtracking penalties of CSMIN, we proposea new design called Fault-tolerant Fully-Chained Combining Switches Multi-stageInterconnection Network (FCSMIN). It has similar characteristics of 1-fault toler-ance and two disjoint paths between any source-destination pair, but it can tolerateonly one link or switch fault at each stage without backtracking. Our simulation andcomparative analysis result shows that FCSMIN has added advantages of destination-tag routing, lower hardware costs, strong reroutability, lower preprocessing overhead,and higher fault-tolerance power in comparison to CSMIN.

    Keywords Multi-stage Interconnection Network Combining Switches Multi-stageInterconnection Network Fault-tolerant Fully-Chained Combining SwitchesMulti-stage Interconnection Network Collision solving Routing-tag Algorithm Rerouting tag Distance-tag algorithm and Disjoint Paths

    1 Introduction and motivation

    Interconnection Networks (IN) [110] are used to design a network in which there areseveral independent paths between two modules being connected which increases theavailable bandwidth. Many stages of inter-connected switches form a MIN. For highreliability and performance, several methods have been suggested that provide fault-tolerance to MINs [1118]. The basic idea of in case of fault-tolerance is to providemultiple paths for a source-destination pair, so that the alternate paths can be used incase of a fault in the path. However, to guarantee 1-fault tolerance, a network shouldhave a pair of alternate paths for every source-destination pair which are disjoint innature [18].

    Previous work in this direction by Ching-Wen Chen and Chung-Ping Chung in[19] proposed a fault-tolerant network called CSMIN and an incorrect algorithm thatdid not provide two correct disjoint paths for some source-destination pairs. Theirwork did not generate correct routing-tags for some source-destination pairs. Therouting-tags generated for such source-destination pairs were not correct in the sensethat the resulting two disjoint paths in CSMIN did not reach the desired destination.This paper provides a more comprehensive and accurate algorithm that always gen-erates correct routing-tags for every source-destination pair in the CSMIN so that theresulting two disjoint paths reach the desired destination.

    Our algorithm can also dynamically reroute packets between these two paths tosolve the faults or collision situation for every source-destination pair in CSMIN.

    With the aim to achieve the demands of high reliability, many prior researchershave worked upon the objective of making MINs fault-tolerant. The fault-tolerancecapability in a MINs guarantees that a packet will have an alternative routing path if itencounters a faulty or busy switch or a communication link in its original routing path[18]. A MIN is able to meet the reliability demands if it is at least 1-fault tolerant, i.e.there is at least one alternative path to deal with faults or collisions. This alternativepath should be disjoint with the original routing path followed and it would not haveany implication whenever a switch or a link fails in the original routing path (then thealternative path will also fail). Most of the MINs do not generate two disjoint paths,

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    are not fault-tolerant, and hence (in turn) will result in packet losses and eventuallydegradation in the performance. Moreover, to improve this situation, we used to havetwo disjoint paths, which always guarantees a solution of the problem of faults orcollisions in a network.

    Furthermore, we propose a new design called Fault-tolerant Fully-Chained Com-bining Switches Multi-stage Interconnection Network (FCSMIN) that makes use ofdestination-tag routing for stages 1 to n to overcome the backtracking problem inCSMIN. FCSMIN has the similar characteristics of 1-fault tolerant and two disjointpaths between any source-destination pair. However, it can tolerate only one link orswitch fault at each stage without backtracking. For stages 1 to n, chaining links areadded between nodes that belong to a neighboring group at the same stage. When alink fault occurs at a stage in FCSMIN, the chaining link is used. We also introducetwo new destination-tag routing functions, UpRoute and DownRoute, which can beused to find two disjoint paths in FCSMIN. One can find the literature regarding thedestination-tag algorithm and dynamic rerouting in [1922].

    The rest of the paper is as follows. Section 2 explains the basics of MINs, fault-tolerance, and disjoint-path networks. Section 3 provides an insight into the topol-ogy and the salient features of the 1-fault tolerant CSMIN. It also covers our pro-posed accurate algorithms that provide two disjoint paths for every source-destinationpair and the dynamic rerouting between the two disjoint paths to solve collisions orfaults for every packet. Section 4 provides the details of comparison, experimentalsetup, and simulation results of our algorithm in terms of arrival and collision ratiofor every source-destination pair in CSMIN. Section 5 covers the proposed designknown as FCSMIN with chaining links and with multiplexers and demultiplexers.The FCSMIN uses a dynamic algorithm for routing and easy rerouting using ei-ther the UpRoute or DownRoute function. Section 6 presents a comparative analysisof FCSMIN over CSMIN followed by the conclusion and future scope provided inSects. 7 and 8, respectively.

    2 Preliminaries and background

    2.1 Multi-stage interconnection networks

    MINs are currently used for many different applications, ranging from internal busesin Very Large-Scale Integration (VLSI) circuits to wide area computer networks. Itconnects input devices to output devices through a number of switch stages, whereeach switch is a crossbar network. The number of stages and the connection patternsbetween stages determine the routing capability of the networks. The lack of stan-dards and the need for very high performance and reliability pushed the developmentof MIN for parallel computers with hundreds of processors and some commercial ma-chines. Since the assurance of high reliability is a significant task in complex systems,fault-tolerance is crucial for MINs to serve the communication needs. In the absenceof faults, the most important performance metrics of a MIN are system latency andthroughput.

  • Designing a Fault-tolerant Fully-Chained Combining Switches 403

    2.2 Fault-tolerance aspects of MINs

    The fault-tolerance capability in a MIN guarantees that a packet will have an alter-native routing path if it encounters a faulty or busy switch or a communication linkin its existing routing path. A MIN will entirely meet the reliability demands if it isat least 1-fault tolerant, i.e. there is at least one alternative path to deal with faultsor collisions. This alternative path should be disjoint in nature with the existing rout-ing path followed. The performance of a MIN in terms of its throughput is highlydependent on its collision solving ability. A MIN should be to reroute packets on analternative path when two or more packets are in conflict for the use of a resourcesuch as a switching element or a communication link in the existing routing path.The lesser the number of packets lost due to collision the better is its efficiency insolving collisions; The better the collision solving ability, the better the performance.

    With the aim to achieve the above objectives of fault-tolerance and collision solv-ing, we attempt to design and simulate a MIN that is at least 1-fault tolerant andhas a high rate of collision solving. Many prior researches and developments havebeen made in this direction. Many designs and routing algorithms for MINs havebeen put forth to effectively deal with faults and collisions in the network. The natureof these designs and algorithms have been characterized to either compromise, bal-ance or optimize, all, any, or some of the following factors such as cost-effectiveness,reliability, throughput, communication delay, pre-processing overhead, and memorycapacity. Our work was inspired by the existing approaches that led to the design ofseveral regular, irregular, and hybrid MINs. These approaches exploited the topologyof a MIN in the following ways:

    1. Different number of switching elements at each stage.2. Adding or removing extra stages.3. Changing the nature of communication links from straight to non-straight upward

    or downward.4. Introducing buffer in the switching elements.5. Introducing a centralized controller in the form of additional circuitry for the con-

    trol logic.6. Introducing chaining links in some or all stages.7. Introducing multiplexers and demultiplexers in stages 0 and n.8. Combining the topologies of two or more MINs.

    Many significant changes have been made in the routing schemes adopted forMINs with aim of minimizing latency, easy rerouting, and a decrease in pre-processing overhead. Previous approaches or solutions were mostly blocking in na-ture. They always resulted in high rates of packet losses due to collisions or faults.Some regular networks like the cube interconnection network [2] provided only onepath for routing packets between any source and destination node. If this path failed,no other path existed to route the packets, and hence the packet was lost resulting inperformance degradation. Some irregular networks like Double Order Tree Intercon-nection Network (DoT) [11] provided more than one path of different path lengths forsome source-destination pairs. This one path had only one switching element in itsmiddlemost stage and whose failure could result in a choking condition. There were

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    also other approaches, explained in [9] as the hybrid ZETA Network, AugmentedBaseline Network, Quad-tree Network, and Augmented Shuffle-Exchange Network,which uses multiplexers, demultiplexers, and chaining links in an attempt to pro-vide fault-tolerance. However, these approaches were only fault-tolerant for somecases. Then there were some MINs like Gamma Interconnection Networks (GIN)[23], which were 1-fault tolerant. Although GIN provided two sets of paths to dealwith a faulty or busy switch or link, these paths were not disjoint in nature becausewhen the distance between the source and the target is even, the straight link betweenstage 0 and stage 1 and the switch at stage 1 connected by the straight link is thecommon element contained in these paths. Furthermore, Gamma networks have onlyone single path when the indices of the source and the target are the same.

    To address the problems of both performance and fault-tolerant capability, one canapproach to design and simulate a 1-fault tolerant network with the following issuesexplained in [19] as:1. Guarantee of at least two disjoint paths.2. Easy rerouting between disjoint paths.3. Keep low rerouting hops.4. Solve the occurrences of packet collisions.

    2.3 Previous work on providing disjoint paths

    There has been extensive research on disjoint paths to guarantee fault-tolerance [1925]. For example, these networks include modified Gamma Interconnection Network(CGIN) [24], Composite Banyan [26], Gamma Interconnection Network by chain-ing (PCGIN) [25], and Balanced Gamma Interconnection Network (BGIN) [25]. TheBGIN and the composite banyan modified the redundant link to a symmetric link toprovide two disjoint paths between any source target pair. In contrast with providingdisjoint paths, B-Network [27, 28], which modified the GIN, provides the capabil-ity of dynamic rerouting to prevent the collisions during the routing path. However,B-Network cannot guarantee 1-fault tolerance. With regard to CGIN, the networkcopies the links between the first two stages to the links between the last two stagesto generate two disjoint paths that are parallel during the middle stages. Finally, PC-GIN adds one link to the switches at stage 0 to generate two disjoint paths betweenany source-destination pair. However, these networks use two methods to handle thesituation of a packet encountering a faulty or busy element.

    One method sends two identical packets concurrently from the source to the desti-nation along with the two disjoint paths. This method causes more packet collisions.The other method uses backtracking rerouting [26]. The backtracking is a method inwhich a switch is used to send a packet back along the traversed path to the source,and takes another disjoint path to tolerate the faulty element. However, if the back-tracking scheme is applied, all output links in a switch changed to bi-directional andthe rerouting hops count is high. This causes an increase in the hardware cost and col-lision rate. Methods using extra stages to tolerate faults suffers from increased hard-ware cost and collision rate because no matter whether packets encounter a faultyor busy element or not, the length of routing paths still increases. Most of the textconsidered here is taken from [19].

  • Designing a Fault-tolerant Fully-Chained Combining Switches 405

    In our paper, to guarantee 1-fault tolerance, easy rerouting capability between dis-joint paths with low rerouting hops, we have considered the fault-tolerant networkcalled Combining Switches Multistage Interconnection Network (CSMIN) [19] andimplemented the above issues. Though this design proposed by Ching-Wen Chen andChung-Ping Chung made an impressive attempt in meeting the above requirements,it had an inaccurate routing algorithm, which did not always generate correct disjointpaths for every source-destination pair. We have smartly modified the algorithm andprovided a more accurate and comprehensive approach that always generates cor-rect routing-tags for the two disjoint paths for every source-destination pair in theCSMIN. The 1-fault tolerant CSMIN causes the two disjoint paths to have regulardistances at each stage. Moreover, our algorithm backtracks a packet to the previousstage and takes the other disjoint path in the event of a fault or a collision in the net-work. Thus, our approach guarantees 1-fault tolerance for all cases by providing twodisjoint paths. Moreover, an easy rerouting algorithm has been proposed that simplyput the packets on other disjoint paths to deal with faults or collisions. This reroutingalgorithm makes use of the backtracking mechanism with a very low average rerout-ing hop of one. This backtracking mechanism not only increases the system latency,but also increases the hardware cost as bi-directional switches are used in CSMIN forstages 1 to n to achieve reroutability. In search for solutions to the above problems,we proposed a new design called FCSMIN.

    FCSMIN has (the similar) characteristics of 1-fault tolerance and two disjointpaths between any source-destination pair, however, it can tolerate at least one linkor switch fault at each stage without backtracking by making use of destination-tagrouting algorithm for stages 1 to n. For stages 1 to n, chaining links are added be-tween nodes, belonging to a neighboring group at the same stage. Whenever a linkfault occurs at a stage in FCSMIN, a chaining link will be chosen automatically.

    In the next section, we have provided the accurate routing-tag and distance-tagalgorithms and strategic design issues of CSMIN and compared the same with FC-SMIN, B-Network, GIN, and CGIN are considered as running examples throughoutthe paper.

    3 CSMIN: accurate routing-tag and distance-tag algorithms and strategicdesign issues

    This section provides an accurate algorithm that provides two correct disjoint pathsand also generate correct routing-tags for the two disjoint paths for every source-destination pair in the CSMIN. The 1-fault tolerant CSMIN causes the two disjointpaths to have regular distances at each stage. Moreover, our algorithm backtracks apacket to the previous stage and takes the other disjoint path in the event of a fault ora collision in the network.

    3.1 Topology of CSMIN

    A CSMIN [19] of size N = 2n consists of n+1 stages labeled from 0 to n. At stage 0,switch 2i and switch 2i +1 are coupled into a 24 switch, for = 0 to (N2 1). Stage

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    Fig. 1 Combining Switches Multi-stage Interconnection Network (CSMIN)

    1 to Stage n have N switches labeled from 0 to 2n 1. All straight links betweenstage 1 and stage n are bi-directional. The switch architecture at the first and the laststage has 2 4 and 3 2 crossbars, respectively. Switches located at stage 1 have3 3 crossbars. Moreover, each switch located at the intermediate stage has a 4 4crossbar switch. Figure 1 illustrates a CSMIN of size 8.

    3.2 Routing-tag algorithm

    The previous work on CSMIN had used routing-tags to identify the two disjointpaths for a source-destination pair. However, the earlier algorithms generated in-correct routing-tags for the two disjoint paths of some source-destination pairs. Ourproposed algorithm provides comprehensive and accurate routing-tags for all source-destination pairs, so that CSMIN is completely 1-fault tolerant.

    Our algorithm exploits the topology of CSMIN so that there exists two paths be-tween any source-destination pair always having a regular vertical distance of 2i ateach stage i, where 1 i n 1, so that the two paths are always disjoint in nature.We define two distance-tag routing functions known as Downward and Upward. The

  • Designing a Fault-tolerant Fully-Chained Combining Switches 407

    path generated by the Downward function always goes through the downward non-straight or straight links only. The Upward function is the route consisting of only theupward non-straight or straight link.

    From the routing-tags generated by the proposed algorithm, the first two routing-tag bits are used for transferring packets from stage 0 to stage 1. The four links tostage 1 from a 24 switch in stage 0 are downward non-straight, downward straight,upward straight, upward non-straight as shown in the CSMIN Fig. 1. These links arerepresented by the two bit combinations (00, 01, 10, 11), respectively. We describe thecorrect and accurate algorithm to generate the Downward and Upward routing-tags,which consist of n + 1 bits each for a CSMIN of size 2n (= N), in Algorithm 1.

    3.3 Routing in CSMIN

    In this section, we describe the routing behavior of CSMIN. If a packet does notencounter a faulty or busy element, distance-tag routing is applied in CSMIN; that is,we compute the routing-tags, the Downward and Upward tags, and then one of thetwo routing-tags is used to send packets to the destination. Example 1 illustrates therouting path for the source S = 5 and the destination T = 5 with size N = 8.

    Example 1 If source S = 5, destination T = 5, and network size N = 8, the routingsituation in CSMIN is as shown in Fig. 2. The routing paths are described as follows:Solution: In the following Algorithm 1 for S = 5 and T = 5, we have1. S1 = 5 and T 1 = 5.2. S = 4 since T S is even and S is odd.3. DownwardD = (5 4)mod8 = 1 = 0001 and UpwardD = (8 (5 4))mod8 =

    7 = 0111 = 0222.4. DownwardD = 1101 and UpwardD = 0122 since c0 = 0 and S is even.5. DownwardD = 1001 and UpwardD = 0022 since c0 = 1 and S is even.6. DownwardD = 1000 since S1 = 5 and T 1 = 5.The Downward and Upward routing-tags thus generated from Algorithm 1 are 1000and 0022, respectively. Take one of these as the main routing-tag.

    3.4 Algorithm for dynamic rerouting

    In this section, we introduce the rerouting methods when a faulty switch or link or abusy switch or link is encountered. We have used the backtracking scheme in whichthe switch sends the packet back along the traversed path to the pre-stage switch. Thepre-stage switch takes the other disjoint path to tolerate the faulty or busy element.To switch packets (dynamically) between the two disjoint paths, the reversed straightlink of the bi-directional straight link is used to reroute packets to the previouslytraversed switch in the previous stage of CSMIN.

    We describe the algorithm for generating the rerouting-tags in Algorithm 2. Ifthe packet encounters a faulty or busy element and if the main routing-tag followedwas Downward, then the packet now follows the Upward routing-tag or vice versa.

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    Algorithm 1 Generating the routing-tag of two disjoint paths in CSMIN1. Input the source S and target T2. Let S1 = S and T 1 = T3. If (T S is even)

    If (S is even)S = S + 1

    ElseS = S 1

    End If4. Let distance DownwardD = (T S)ModN and UpwardD = (N (T S))ModN5. Convert DownwardD to its binary representation c0c1c2 . . . cn16. Convert UpwardD to its binary representation b0b1b2 . . . bn1 and replace any 1 with 27. If (c0 = 0 and S is odd)

    Replace c0c1 with 10 and b0b1 with 00Else If (c0 = 0 and S is even)

    Replace c0c1 with 11 and b0b1 with 01End If

    8. If (c0 = 1 and S is odd)Replace c0c1 with 11 and b0b1 with 01Else If (c0 = 1 and S is even)

    Replace c0c1 with 10 and b0b1 with 00End If

    11. For Downward tag c0c1c2 . . . cn1 & For Upward tag b0b1b2 . . . bn1If (s1 = 0/1)

    If (t1 = 1/2/3/4)If (cn1 = 1)

    cn1 = 0Else If (t1 = 0/5/6/7)

    If (bn1 = 2)bn1 = 0

    End IfIf (s1 = 2/3)

    If (t1 = 0/1/2/7)If (bn1 = 2)

    bn1 = 0Else If (t1 = 3/4/5/6)

    If (cn1 = 1)cn1 = 0

    End IfIf (s1 = 4/5)

    If (t1 = 1/2/3/4)If (bn1 = 2)

    bn1 = 0Else If (t1 = 0/5/6/7)

    If (cn1 = 1)cn1 = 0

    End IfIf (s1 = 6/7)

    If (t1 = 0/1/2/7)If (cn1 = 1)

    cn1 = 0Else If (t1 = 3/4/5/6)

    If (bn1 = 2)bn1 = 0

    End If12. Display Downward and Upward tag.

  • Designing a Fault-tolerant Fully-Chained Combining Switches 409

    Fig. 2 The two disjoint paths (2,5,5,5) and (2,3,1,5) indicated by the bold line in CSMIN withsource = 5 and target = 5, where the 4-tuple denotes the switch indices at stage 0,1,2, and 3, respec-tively

    Hence, the routing-tag is changed from Downward to Upward or from Upward toDownward for further routing. The switch traversed at the previous stage computesthe rerouting-tag. After the rerouting behavior, the packet is sent on the other disjointpath.

    3.4.1 Rerouting in CSMIN

    In this section, we present two rerouting situations one while traversing a non-straightlink illustrated by Example 2 and the other while traversing a straight link illustratedby Example 3.

    Example 2 The source is 2, the destination is 3, and the switch 7 at stage 2 is faulty (orthe upward link to this switch is faulty). The routing and rerouting paths are describedas follows:Solution: In the following Algorithm 1 for S = 2 and T = 3, we have

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    Algorithm 2 Generating Rerouting-tagThe original Downward tag = c0c1c2 . . . cn1The original Upward tag = b0b1b2 . . . bn1The packet at stage i 1 meets a faulty switch at stage iBegin

    If (i = 1)If (c0c1/b0b1 = 10/00)

    c0c1/b0b1 = 00/10;Remaining routing-tag = b2 . . . bn1/c2 . . . cn1

    Else If (c0c1/b0b1 = 11/01)c0c1/b0b1 = 01/11;Remaining routing-tag = b2 . . . bn1/c2 . . . cn1

    End IfElse If (ci/bi = 1)

    ci/bi = 2;Remaining routing-tag = bi+1 . . . bn1/ci+1 . . . cn1;

    Else If (ci/bi = 2)ci/bi = 1;Remaining routing-tag = bi+1 . . . bn1/ci+1 . . . cn1;

    Else If (ci/bi = 0)ci/bi = bi/ci ;Remaining routing-tag = bibi+1 . . . bn1b/cici+1 . . . cn1;

    End IfOutput the rerouting-tag

    End

    1. S1 = 2 and T 1 = 3.2. S = 2 since T S is odd.3. DownwardD = (3 2)mod8 = 1 = 0001 and UpwardD = (8 (3 2))mod8 =

    7 = 0111 = 0222.4. DownwardD = 1101 and UpwardD = 0122 since c0 = 0 and S is even.5. DownwardD = 1001 and UpwardD = 0022 since c0 = 1 and S is even.6. DownwardD = 1000 since S1 = 2 and T 1 = 3.

    The Downward and Upward routing-tags thus generated from Algorithm 1 are1000 and 0022, respectively. Take one of these as the main routing-tag. Figure 3ashows the two disjoint paths (1,1,7,3) and (1,3,3,3), where the 4-tuple means theswitch indices at stage 0,1,2, and 3, respectively.

    We assume that the packet uses the Upward tag. Since the switch 7 at stage 2 isfaulty (or the upward link to this switch is faulty), the switch 1 at stage 1 computesthe rerouting-tag by using Algorithm 2 and reroutes the packet on the downwardnon-straight link. The packet then uses the Downward tag to reach its destination.The number of rerouting hops to find the other disjoint path is 0. In Fig. 3b, switch 1at stage 1 reroutes a packet to switch 3 at stage 2 that is in the other disjoint path. Asa result, the packet can be delivered along the other disjoint path to tolerate the faulty

  • Designing a Fault-tolerant Fully-Chained Combining Switches 411

    (a)Fig. 3 The routing condition of CSMIN. (a) shows the routing condition in CSMIN with source S = 2and T = 3 and (b) shows the rerouting condition in CSMIN with source S = 2 and T = 3 for Example 2.The packet can be delivered along the other disjoint path to tolerate the faulty switch indicated by graycolor and the dash line means the original routing path

    switch that is indicated by gray color and the dash line means the original routingpath.

    Example 3 The source is 2 and the destination is 3. The Downward and Upwardrouting-tags, thus generated from Algorithm 1 for this source-destination pair are1000 and 0022, respectively. Take one of these as the main routing-tag. The routingand rerouting paths are described as follows.Solution: Let the straight link connecting switch 3 at stage 1 to switch 3 at stage 2to be faulty. When a packet encounters a faulty element from stage 1 to stage 2, theswitch at stage 1 reroutes the packet on the other disjoint path as shown in Fig. 4. Weassume that the packet uses the Downward tag. Since the Downward tag is used toroute the packet originally, the switch at stage 1 takes the upward non-straight link toswitch 1 at stage 2. Switch 1 at stage 2 then sends the packet on the backward straight

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    (b)Fig. 3 (Continued)

    link to switch 1 at stage 1. At Stage 1, switch 1 computes the Upward routing-tag,which in turn used to move from stage 1 to the destination (if no more busy or faultyelement is encountered). The number of rerouting hops to find the other disjoint pathis 1.

    In the next section, we present the simulation of CSMIN with backward straightlinks, B-Network, CGIN, and GIN for network size of 16 and compare their arrivalrate under a faulty-free situation with the situations with one fully faulty switch.Moreover, our result shows the improvements in the arrival ratio that results when afaulty switch is avoided after rerouting and compares that with the arrival ratio whena packet encounters a faulty switch again.

  • Designing a Fault-tolerant Fully-Chained Combining Switches 413

    Fig. 4 The rerouting condition in CSMIN with source S = 2 and T = 3 for Example 3. The packet canbe delivered along the other disjoint path to tolerate the faulty switch that is indicated by a gray color andthe dashed line means the original routing path

    4 Experimental setup and comparative analysis of CSMIN, B-Network, GIN,and CGIN based on simulation results

    In this section, we present our simulation, results, and discussions. The previous workon the routing algorithm for CSMIN did not generate correct routing-tags for somesource-destination pairs. The routing-tags generated for these source-destinationpairs were not correct in the sense that the resulting two disjoint paths in CSMINfor the desired destination did not reach the desired destination. Since their routingalgorithm was not valid, its simulation resulted in packets arriving at invalid destina-tions. Therefore, we have not considered their algorithm for comparison with ours.

    For our simulation, we have used the IBM System x, running with Novells SUSELinux Enterprise Server 11, and we continuously and randomly generated the dif-ferent source-destination requests in each cycle and continuously ran 32,768 cyclesto compute the arrival rate, the collision rate, and fault-tolerance rate. The followingcases have been addressed while computing the fault-tolerance rate:

  • 414 Nitin et al.

    (a)Fig. 5a The arrival rates vs. traffic load of CSMIN with backward straight links, B-Network, GIN, andCGIN for network size N = 16 and with the situation of no faults

    1. Network without faults;2. In addition, whenever a faulty element exists in the network, we assumed the faulty

    switch was fully faulty (i.e. the faulty switch cannot receive or send any packetsfrom any input links or output links.

    For measuring the arrival rate (without switch fault), we preformed simulations onCSMIN with backward straight links, B-Network, GIN, and CGIN for N = 16 withvarious traffic loads (i.e. the number of packets that has been sent simultaneously bythe different sources to different or same destination), which ranges between 12.5%to 100% to get our results and compared them. Furthermore, for measuring the arrivalrate, collision rate and fault-tolerance rate (with switch faults), we preformed simula-tions on FCSMIN, CSMIN with backward straight links, B-Network, GIN, and CGINfor N = 16 with various traffic loads to get results for comparison.

    Figure 5a presents the arrival rates of the networks with the situations of with-out fault. CSMIN with backward links have the best arrival ratio in comparison toB-Network, CGIN, and GIN for network size 16 and CGIN is the worst performer.On other hand, Fig. 5bd presents the arrival rates, collision rates, and fault-tolerantrates of the networks with the situation of a fully faulty switch. In low traffic, GINand CSMIN with backward straight links, which send two identical packets via twodisjoint paths concurrently perform better arrival ratios than or almost equal arrivalratios by CGIN and B-Network as they can also tolerate a faulty switch. However,there is always rapid performance degradation because of packet collisions. The num-ber of packet losses is very high for CGIN and very low for CSMIN. Therefore, CGINpresent a worse arrival ratio than other networks when the traffic load is high. In ad-dition, Fig. 5d presents the fault-tolerance capability of these networks. CSMIN withbackward straight links have higher fault-tolerant ratios than GIN, CGIN, and B-

  • Designing a Fault-tolerant Fully-Chained Combining Switches 415

    (b)

    (c)Fig. 5bd The arrival rates, collision rates and fault-tolerance rates vs. traffic load of CSMIN with back-ward straight links, B-Network, GIN, and CGIN for network sizes N = 16 and with the situation of a fullyfaulty switch

    Network. However, GIN performs better than CGIN and B-Network at higher loads(i.e. traffic load between 75% to 100%) but the collision losses are greater than thebenefits from tolerating faults. However, CSMIN with backward straight links cantolerate faults and prevent collisions; moreover, it has a better arrival ratio than othernetworks.

  • 416 Nitin et al.

    (d)Fig. 5bd (Continued)

    5 Fault-tolerant Fully-Chained Combining Switches Multi-stageInterconnection Network (FSCMIN)

    To eliminate the backtracking penalties of CSMIN, we propose a new design calledFault-tolerant Fully-Chained Combining Switches Multi-stage Interconnection Net-work (FCSMIN). FCSMIN has the similar characteristics of 1-fault tolerance and twodisjoint paths between any source-destination pair, but it can tolerate at least one linkor switch fault at each stage without backtracking.

    5.1 Topology of FCSMIN

    FCSMIN has multiple paths between any source-destination pair to provide betterfault-tolerance capability. The FCSMIN changes one of the original non-straight linksof CSMIN at stage i = 1 to n 1 to a chained link.

    A FCSMIN of size N = 2n consists of n + 1 stages labeled from 0 to n. The firststage of FCSMIN is similar to CSMIN having 2 4 crossbar switches. For stages 1to n 1, each switch of FCSMIN is augmented with a chaining links. 3 3 switchesreplace the switches at intermediate stages. We also remove either of the non-straightlinks between the last two stages so that the final stage has 2 1 switches.

    We have introduced this chaining links at all stages except for the last stage. Ei-ther the upward non-straight link or the downward non-straight link of CSMIN canbe changed to a chaining link for stages 0 to n 1. At the last stage n, we can re-move either the upward non-straight link or the downward non-straight link. Thus,we present two models of FCSMIN namely, UpRoute-function based FCSMIN andDownRoute-function based FCSMIN. The UpRoute and DownRoute are two func-tions of the destination-tag routing algorithm, which is used by FCSMIN in order

  • Designing a Fault-tolerant Fully-Chained Combining Switches 417

    to resolve the algorithmic and design issues faced by CSMIN. These functions arediscussed later.

    In FCSMIN, since the destination-tag routing algorithm does not involve back-tracking, it uses bi-directional switches between stages 1 to n, and thus brought downthe hardware cost of FCSMIN less than CSMIN.

    In UpRoute function based FCSMIN, the chaining scheme is that switch j ischained to switch (j 2i )mod 2n1, where i denotes stage number from 1 to n 1and n = log2 N . For example, at stage 1, the chain-out link of switch 2 is connectedto the chain-in link of switch 0. In the last stage, we remove all the downward non-straight links. Figure 6 shows the topology of UpRoute function based FCSMIN.

    In DownRoute function based FCSMIN, the chaining scheme is that switch j ischained to switch (j + 2i )mod 2n1, where i denotes stage number from 0 to n 1and n = log2 N . For example, at stage 1, the chain-out link of switch 2 is connected tothe chain-in link of switch 4. In the last stage, we remove all the upward non-straightlinks. Figure 7 shows the topology of DownRoute function based FCSMIN.

    5.2 Destination-tag routing

    We have used two destination-tag routing functions UpRoute and DownRoute forrouting packets from stage 1 to n in a FCSMIN. A switch j at stage i is an evenswitch if ji = 0 or an odd switch if ji = 1, where j0j1 . . . jn1 is the n-bit binaryrepresentation of j , and jn1 is the most significant. Let T denote a destination-tagwhere t0t1t2 . . . tn1 is the binary representation of t and tn1 is the most significant.By only using ti , we can decide routing from the switch at stage i to the switch atstage i + 1. The DownRoute function goes straight or downward, while the UpRoutefunction goes upward or straight. The behavior of UpRoute and DownRoute functionsis depicted in Fig. 8 and represented by (1) and (2).

    UpRoute(j, ti) =

    j + 2i if (ji = 0 and ti = 1)or (ji = 1 and ti = 0),

    j otherwise(1)

    DownRoute(j, ti) =

    j 2i if (ji = 0 and ti = 1)or (ji = 1 and ti = 0).

    j otherwise(2)

    5.3 Routing scheme in FCSMIN

    To implement the design of FCSMIN, we propose the use of a combination ofdistance-tag routing and destination-tag routing algorithm. The distance-tag rout-ing algorithm is used to transfer packets between stage 0 and stage 1, whilethe destination-tag routing algorithm is used to transfer packets from stage 1 tostage n. Under this combinational scheme, the distance-tag algorithm generates a2-bit routing-tag for transferring packets between stage 0 and stage 1. The four linksto stage 1 from a 2 4 switch at stage 0 are of types downward non-straight, down-ward straight, upward straight, and upward non-straight. A 2-bit combination such as00, 01, 10, and 11, respectively, represent these links.

  • 418 Nitin et al.

    Fig. 6 UpRoute function based FCSMIN of size 8

    For stages 1 to n with chaining links, the routing functions can be derived fromthe pre-defined UpRoute and DownRoute destination-tag routing functions as:

    UpRoute(j, ti) =

    (j 1)modN at stage iif (ji = 0 and ti = 0)if (ji = 1 and ti = 0)

    (j 1)modN at stage i + 1if (ji = 0 and ti = 0)if (ji = 1 and ti = 0)

    , (3)

  • Designing a Fault-tolerant Fully-Chained Combining Switches 419

    Fig. 7 DownRoute function based FCSMIN of size 8

    DownRoute(j, ti) =

    (j + 1)modN at stage iif (ji = 0 and ti = 0)if (ji = 1 and ti = 0)

    (j + 1)modN at stage i + 1.if (ji = 0 and ti = 1)if (ji = 1 and ti = 1)

    (4)

  • 420 Nitin et al.

    Fig. 8 Switching by UpRoute and DownRoute function at stage i

    Fig. 9 Switching by UpRoute and DownRoute function for stages 1 to n

    Let destination node be D = d0d1d2 . . . dn2dn1. Using the UpRoute function,when di = 0 in an odd switch at stage i, the packet is routed to an uplink else,the chaining link will be used as shown in Fig. 9. Using the DownRoute func-tion, when di = 1 is in an odd switch at stage i, the packet is routed to a down-link else, the straight link will be used. In addition, when the switch is even, rout-ing is opposite for both of the cases of UpRoute and DownRoute function applica-tions.

  • Designing a Fault-tolerant Fully-Chained Combining Switches 421

    When fault occurs, the chaining link provides alternate paths. Suppose a packetat a switch j = j0j1j2 . . . jn1 encounters a fault in the link between stage i andstage i + 1, the packet should be routed via the chaining link at stage i to switchj 2imod 2n, for 1 i n 1 where n = log2 N . Thus, the FCSMIN has a strongcapability to tolerate the link fault at each stage and allows dynamic link rerouting.

    5.4 New approach of providing fault tolerance in CSMIN using multiplexers anddemultiplexers

    CSMIN is a 1-fault tolerant MIN for all source-destination pairs; it guarantees fault-tolerance only for the intermediate stages. There are no alternative paths in the net-work in case of faults at stage 0 and stage n. Hence, in case of failure of switchesor links at the first or last stages in CSMIN, the packets will be lost completely. Inorder to make the network 1-fault tolerant at all stages (increasing the degree of fault-tolerance in CSMIN), we had proposed new modifications in the existing design ofFCSMIN by removing the chaining links and by introducing multiplexers and demul-tiplexers. Figure 10 shows the design of the new CSMIN of size 8 and its topology isdescribed as follows:

    1. Before stage 0, 2:1 multiplexers are introduced for each source i.2. After last stage, 1:2 demultiplexers are introduced for each destination i.

    5.4.1 Routing and rerouting in CSMIN with multiplexers and demultiplexers(CSMINMD)

    The function of adding multiplexers and demultiplexers at first and last stageof CSMIN are to facilitate fault-tolerance and at those stages. For 1-fault toler-ance at the intermediate stages, the rerouting algorithm of CSMINMD is as fol-lows.

    The topology of the network is such that in case of a switch or link failure atstage 0, the corresponding 2:1 multiplexer will transfer the packet on another in-put line and then is routed to its destination from the new input line. In case ofa switch or link failure at stage n, the rerouting algorithm of CSMINMD trans-fers the packet to the pre-stage switch of the alternative path. The packet is thentransferred from this switch by the straight link to a switch at stage n whose cor-responding 1:2 demultiplexers has the capability to transfer the packet to the orig-inal destination. By exploiting the topology of CSMIN, the selection of new inputand output lines is in such a way that the packet always reaches its original desti-nation. Example 4 helps in illustrating this fault-tolerance capability at stage 0 andstage n.

    Example 4 The source is 6, the destination is 4, and suppose that the switch 3 at stage0 and the switch 4 at stage 3 is faulty. The routing and rerouting paths are describedas follows.Solution: In that case, the multiplexer connected to input line 6 would transfer thepacket to its alternative input line 2 and then is routed for destination 4. Suppose thedownward path is followed to reach destination 4 from new source 2. On encountering

  • 422 Nitin et al.

    Fig. 10 Combining switches interconnection network with multiplexers and demultiplexers (CSMINMD)

    the faulty switch 4 at stage 3, then the packet is transferred to the pre-stage switch 0of the upward path by the rerouting algorithm of CSMINMD. The switch 0 at stage 2then transfers the packet to switch 0 at stage 3 by the straight link. The demultiplexersconnected to the switch 0 at stage 3 transfers the packet to its alternative output line4. Hence, the packet is not lost and arrives at the original destination 4. Figure 11illustrates this rerouting behavior for Example 4.

    In the next section, we simulated and compared the FCSMIN, CSMIN, B-Network, GIN, and CGIN under without faults, with a switch fault, and with twoswitch faults to get the arrival ratio and fault-tolerant ratio.

    6 Experimental setup and comparative analysis of FCSMIN, CSMIN,B-Network, GIN, and CGIN based on simulation results

    The issues related to CSMIN, which resulted in low fault-tolerance, high hardwarecosts, and increased system latency have been addressed here.

    For our simulation, we have used an IBM System x, running with Novells SUSELinux Enterprise Server 11, and we continuously and randomly generated the dif-ferent source-destination requests in each cycle and continuously ran 32,768 cycles

  • Designing a Fault-tolerant Fully-Chained Combining Switches 423

    Fig. 11 Routing and rerouting in CSMINMD for source 6 and destination 4 as shown by the bold lines.The faulty switch is indicated by the gray color and the dashed line means the original routing path

    to compute the arrival rate and fault-tolerance rate. The following cases have beenaddressed while computing the fault-tolerance rate:

    1. Network without faults;2. In addition, whenever a faulty element exists in the network, we assumed the faulty

    switch was fully faulty.

    For measuring the arrival rate (without switch fault), we preformed simulations onFCSMIN, CSMIN with backward straight links, B-Network, CGIN, and GIN for N =16 with various traffic loads, which ranges between 12.5% to 100% to get our resultsand compared them. In addition, for measuring the fault-tolerance rate (with switchfaults), we preformed simulations on FCSMIN, CSMIN with backward straight links,B-Network, CGIN, and GIN for network sizes N = 16, 32 and 64 (with various trafficloads) to get results for comparison.

    6.1 Fault-tolerance

    Figure 12ac, shows arrival rates (without switch fault, with a switch fault, and withtwo switch faults) vs. traffic load of FCSMIN, B-Network, CGIN, CSMIN with back-ward straight links, and GIN when the network size is 16. From the graph, it is de-picted that the FCSMIN has a better arrival ratio in comparison to other MINs. The

  • 424 Nitin et al.

    (a)

    (b)Fig. 12ac Arrival rate (without switch fault), arrival rate (with a switch fault), and arrival rate (with twoswitch faults) of FCSMIN, CSMIN with backward straight links, B-Network, GIN, and CGIN for networksize N = 16

    performance B-Network and GIN in terms of arrival ratio is comparable and CGINalways has a poor arrival ratio for all three cases.

    On the other hand, Fig. 12df presents the fault-tolerance capability of (with aswitch fault) of FCSMIN, CSMIN with backward straight links, B-Network, GIN,and CGIN when the network size is 16, 32, and 64. As the size increases, FCSMINprovides better fault-tolerance capability in comparison to every network especiallyfrom CSMIN. Moreover, CSMIN is not better than FCSMIN but it tolerates a greaternumber of faults than B-Network, GIN, and CGIN. At the traffic load, which ranges

  • Designing a Fault-tolerant Fully-Chained Combining Switches 425

    (c)Fig. 12ac (Continued)

    between 62.5% to 100%, GIN is far better than B-Network. CGIN network comes outto be the worst performer in terms of fault-tolerance. However, the collision lossesare greater than the benefits from tolerating faults. From here, we can conclude thatFCSMIN can tolerate faults and prevent collisions; moreover, it has a better arrivalratio than other networks.

    Furthermore, Fig. 12gi presents the fault-tolerance capability of (with a two-switch fault) of FCSMIN, CSMIN with backward straight links, B-Network, GIN,and CGIN when the network size is 16, 32, and 64, separately. For all sizes, FCSMINremains better in comparison to CSMIN and best when compared to others. GIN re-mains the outperformer when compared with B-Network and CGIN remains a poorperformer and eventually cannot tolerate too many faults.

    6.2 Hardware cost

    The switch hardware complexity of CSMIN is high because bi-directional switcheshave been used between stages 1 to n in order to backtrack a packet to the previouslytraversed switch (i 1) in case of a fault or collision at stage i. The use of theseswitches (to solve the backtracking) increases the hardware cost of the network. FC-SMIN does not make use of backtracking mechanism, therefore, use of bi-directionalswitches is eliminated. In addition to this, one of the non-straight links is removedfrom the switches in stages 1 to n depending upon the functionality of FCSMIN be-ing followed by using either UpRoute or DownRoute functions. This results in furthercost reduction of FCSMIN. If we compute the cost of CSMIN and FCSMIN, takingthe cost of k, m n switches as k m n units, the cost of uni-directional links as 1unit and the cost of bi-directional links as 2 units, then we observe that CSMIN costs376 units whereas FCSMIN costs 264 units for networks of size N = 8. From Fig. 13,it is depicted that as the size of the network increases the hardware cost of the CSMIN

  • 426 Nitin et al.

    (d)

    (e)Fig. 12df Fault-tolerance rates (with a switch fault) vs. traffic load of FCSMIN, CSMIN with backwardstraight links, B-Network, GIN, and CGIN for network sizes N = 16, 32, and 64 separately

    becomes higher in comparison to the hardware cost of FCSMIN. On the lower level,the hardware cost of CSMIN is comparable to FCSMIN but for the higher networksizes. There is a significant increase in the cost of CSMIN. Thus, our proposed designof FCSMIN is cheaper to implement than CSMIN.

    6.3 System latency

    The distance-tag algorithm used in CSMIN involves pre-processing overhead to com-pute the n+ 1 bit routing-tag. Our proposed algorithm uses distance-tag routing only

  • Designing a Fault-tolerant Fully-Chained Combining Switches 427

    (f)Fig. 12df (Continued)

    between stage 0 and 1. This approach requires computation of a 2-bit routing-tagbefore the packet transfer takes place. Thus, our proposed algorithm results in a lessamount of pre-processing overhead. Moreover, the use of destination-tag routing freesour routing scheme from the need to use backtracking to deal with faults or collisions.This results in a significant improvement in system latency. Thus, FCSMIN possessesthe same 1-fault tolerant and two disjoint path features of CSMIN at a lower hardwarecost and achieves routing and rerouting with better performance metrics.

    7 Conclusion

    The 1-fault tolerant CSMIN provides two disjoint paths to solve collision situation.In this paper, we have presented more efficient and comprehensive algorithms thatprovide two disjoint paths between every source-destination pair that reach the cor-rect destination. Since the vertical distance between these two paths at any particularstage i is 2i , the switch can easily reroute the packet between these two stages, inthe event of a fault or collision. However, the proposed algorithm backtracks packetin case of a faulty switch or collision, and eventually it reduces network operationalcost. Moreover, to achieve a good arrival ratio with respect to increasing traffic load,it is imperative to keep the packets loss due to collisions and faults, as low as pos-sible. The need to lower the hardware costs and backtracking penalties drove us tomake the necessary changes in CSMIN. To deal with such cases, we have modi-fied the existing design of CSMIN and presented an alternative design FCSMIN.Hardwiring of chaining links in FCSMIN for stages 1 to n 1 eliminates the needof other redundant hardware used in CMSIN. It also retains the two disjoint pathsthat successfully exhibit by the topology of CSMIN. The use of destination-tag algo-rithm helps us to eliminate backtracking in case of faults or collisions. Furthermore,

  • 428 Nitin et al.

    (g)

    (h)Fig. 12gi Fault-tolerance rates (with two switch faults) vs. traffic load of FCSMIN, CSMIN with back-ward straight links, B-Network, GIN, and CGIN for network sizes N = 16, 32, and 64 separately

    FCSMIN fault-tolerance ratio with one and two switch faults is higher in comparisonto CSMIN, B-Network, GIN, and CGIN. Therefore, FCSMIN is 1-fault tolerant MINwith a lower hardware cost and provides better system latency than CSMIN and otherdisjoint path MINs.

  • Designing a Fault-tolerant Fully-Chained Combining Switches 429

    (i)Fig. 12gi (Continued)

    Fig. 13 Comparison of FCSMIN and CSMIN with backward straight links based on hardware cost

    8 Future scope

    Our proposed algorithm for routing packets on CSMIN and FCMSIN achieves 1-fault-tolerance to solve the faults or collision situations. To achieve a good arrivalratio in terms of increasing traffic, it is imperative to keep the packet loss (due tocollisions and faults), as low as possible. For this, we will be attempting to design acomprehensive and efficient algorithm that will make the FCSMIN 2-fault tolerant.

  • 430 Nitin et al.

    Moreover, we are working on to provide three disjoint paths in the FCMIN by makingnecessary hardware changes to its existing design.

    Acknowledgements Very special thanks to Jaypee Education System (JES) and Jaypee University ofInformation Technology (JUIT), for providing excellent Research Environment and Learning Ambienceand Sun Solaris and High-end Parallel Computing Lab at JUIT.

    This research work is dedicated to my Shri Shri 1008 Swami Shri Paramhans Dayal SacchidanandMaharaja Ji and the loving memories of my departed maternal grandfather and grandmother and father-in-law, who continue to guide me in spirit.

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    485

    Designing a Fault-tolerant Fully-Chained Combining Switches Multi-stage Interconnection Network with Disjoint PathsAbstractIntroduction and motivationPreliminaries and backgroundMulti-stage interconnection networksFault-tolerance aspects of MINsPrevious work on providing disjoint paths

    CSMIN: accurate routing-tag and distance-tag algorithms and strategic design issuesTopology of CSMINRouting-tag algorithmRouting in CSMINAlgorithm for dynamic reroutingRerouting in CSMIN

    Experimental setup and comparative analysis of CSMIN, B-Network, GIN, and CGIN based on simulation resultsFault-tolerant Fully-Chained Combining Switches Multi-stage Interconnection Network (FSCMIN)Topology of FCSMINDestination-tag routingRouting scheme in FCSMINNew approach of providing fault tolerance in CSMIN using multiplexers and demultiplexersRouting and rerouting in CSMIN with multiplexers and demultiplexers (CSMINMD)

    Experimental setup and comparative analysis of FCSMIN, CSMIN, B-Network, GIN, and CGIN based on simulation resultsFault-toleranceHardware costSystem latency

    ConclusionFuture scopeAcknowledgementsReferences

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