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1 Development of High Voltage SiC Emitter TurnOff Thyristor (ETO) Alex Q. Huang Jerry Melcher September 30, 2009 Funded by the Energy Storage Systems Program of the U.S. Department Of Energy (DOE/ESS) through the Small Business Innovation Research (SBIR) program and managed by Sandia National Laboratories (SNL)

Development of High Voltage SiC Emitter Thyristor (ETO) 2008... · 1. Development of High Voltage SiC Emitter Turn ‐ Off Thyristor (ETO) Alex Q. Huang. Jerry Melcher. September

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Page 1: Development of High Voltage SiC Emitter Thyristor (ETO) 2008... · 1. Development of High Voltage SiC Emitter Turn ‐ Off Thyristor (ETO) Alex Q. Huang. Jerry Melcher. September

1

Development of High Voltage SiC Emitter  Turn‐Off Thyristor (ETO) 

Alex Q. Huang

Jerry Melcher

September 30, 2009

Funded by the Energy Storage Systems Program of the U.S. Department Of Energy (DOE/ESS) through the Small Business Innovation Research (SBIR) program and managed by Sandia National Laboratories (SNL)

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STTR Phase I2008 DOE Annual Review

2

STTR Phase I2008 DOE Annual Review

2

Problem statement:Low cost, reliable, high efficiency power control and storage technologies are needed to handle increasing levels of power flow in distribution and sub- transmission applications including integration of renewable energy resources.

How to address this problem:•10 kV-12 kV SiC Emitter Turn-off (ETO) Thyristor•5 kHz switching capability•100 A current rating. •Large current module using multichip module packaging (MCM)•Superior to Si IGBT and MOSFET

oHigher frequency operationoLower conduction lossesoLower switching losses

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STTR Phase I2008 DOE Annual Review

33

Si high power devices are approaching its physical limit:

• Voltage rating below 6.5 kV

• Operation frequency below 1 kHz

• Normal operation junction temperature is below 125 OC.

Limit of Si Power Devices

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STTR Phase I2008 DOE Annual Review

4

STTR Phase I2008 DOE Annual Review

4

Motivation of SiC ETO

Advantages of SiC ETO:• Improved switching speed • High temperature operation capability• Gate control.• Better SOA

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STTR Phase I2008 DOE Annual Review

55

Schematic of p type SiC ETO

Gate

Cathode

Anode

(a) p‐type ETO equivalent circuit;                    (b) corresponding ETO symbol. 

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STTR Phase I2008 DOE Annual Review

66

World’s first SiC ETO

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STTR Phase I2008 DOE Annual Review

77

Blocking Characteristics of SiC GTO

0 -1000 -2000 -3000 -40000

-1

-2

-3

-4

-5

-6

0.0

-2.8

-5.6

-8.4

-11.2

-14.0

J C (u

A/cm

2 )

I C (u

A)

VC (V)

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STTR Phase I2008 DOE Annual Review

88

DC Forward Characteristics of SiC GTO and ETO

0 -1 -2 -3 -4 -50

-2

-4

-6

-8

-10

-12

Increasing T

100 W/cm 2

25 oC 100 oC 150 oC

IG=-100 mA

I c (A)

VC (V)0 -1 -2 -3 -4 -5 -6

0

-2

-4

-6

-8

-10

-12

Increasing T

100 W/cm 2

25 oC 100 oC 150 oC

IG=-100 mA

I c (A)

VC (V)

(a) SiC GTO (b) SiC ETO

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STTR Phase I2008 DOE Annual Review

99

Transient Characteristics of SiC ETO

Eoff

= 9.88mJ for 36 mm2

SiC GTO, capable 8 kHz switching at 200 OC. 

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STTR Phase I2008 DOE Annual Review

1010

RBSOA study of SiC ETO

VDC‐link

=2.5 kV

JC

=100 A/cm2

Page 11: Development of High Voltage SiC Emitter Thyristor (ETO) 2008... · 1. Development of High Voltage SiC Emitter Turn ‐ Off Thyristor (ETO) Alex Q. Huang. Jerry Melcher. September

STTR Phase I2008 DOE Annual Review

1111

SiC ETO Based  Boost Converter Demo

Vg

Vout

Ic

Vc

Page 12: Development of High Voltage SiC Emitter Thyristor (ETO) 2008... · 1. Development of High Voltage SiC Emitter Turn ‐ Off Thyristor (ETO) Alex Q. Huang. Jerry Melcher. September

STTR Phase I2008 DOE Annual Review

12

Design of High Voltage (10‐kV) SiC GTO

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13

Simulated DC Characteristics

0 1 2 3 4 5 6 7 80

20

40

60

80

100

25 oC

200 oC

100 W/cm 2

200 W/cm 2

25 oC

200 oC

MOSFET

N-GTO J F (

A/cm

2 )

VF (V)

P-GTO

STTR Phase I2008 DOE Annual Review

13

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STTR Phase I2008 DOE Annual Review

1414

Simulated Transient Characteristics

p‐ETO n‐ETO

0.0 1.0 2.0 3.0 4.0 5.0-40

-30

-20

-10

0

10

20

30

40

-7

-6

-5

-4

-3

-2

-1

0

V C (kV

)

VG

V G (V

), I C (

A)

Time (us)

IA

VC

toff

=2.9 µs

Eoff

=190 mJ

toff

=0.52 µs

Eoff

=34 mJ

0.0 0.2 0.4 0.6 0.8 1.00

10

20

30

0

1

2

3

4

5

6

7

V A (k

V)

V G (

V),

I A (A

)

Time (us)

IA

VG

VA

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STTR Phase I2008 DOE Annual Review

1515

Effect of Buffer Layer in SiC GTO

4.2 4.4 4.6 4.8 5.0 5.2 5.4 5.6 5.8 6.00

20406080

100120140160180200220

(1E18)

(7E17)

(4E17)

(2E17)

NB=(4E16) cm-3

(6E17)(4E17)(3E17)(1E17)

NB=(4E16) cm-3

N-ETO

E off (

mJ)

Anode-Cathode Voltage (V)

P-ETO

1)

n‐ETO can achieve about 8 time smaller turn‐off energy, Eoff,

than p‐ETO due to a small 

lower  transistor current gain

2)

Eoff

reduces by 81% (6.6 mJ) and VF

increases by 18% (5.05 V)when

ND

increases form 4E16 

cm3

to 4E17 cm3

for n type SiC ETO

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STTR Phase I2008 DOE Annual Review

1616

Effect of Drift Layer Carrier Lifetime in SiC n‐GTO

3.6 4.0 4.4 4.8 5.2 5.6 6.00

10

20

30

40B

A

(0.6)

(1)(1.5)

tam= (2) us

NB= 4E17 cm-3

tam=0.6 us

(6E17)(4E17)(3E17)

(1E17)

NB= (4E16) cm-3

E off (

mJ)

Anode-Cathode Voltage (V)

The n type SiC GTO with a long drift layer carrier lifetime is superior to those 

with a short drift layer carrier lifetime for the trade‐off between on‐state 

voltage and turn‐off losses. 

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STTR Phase I2008 DOE Annual Review

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Summary

• We demonstrate the world’s first 4.5 kV SiC ETO

• The fast switching speed and low loss of the 4.5 kV SiC ETO 

indicates the attractive potential of high voltage (>5 kV) SiC ETO 

especially for high voltage high frequency applications.

• Theoretical comparisons of 10 kV SiC n and p type SiC ETO 

shows the superiority of n type ETO, such as faster switching, 

due to very low switching losses and wide RBSOA.

• Further improvement of n type ETO can be made by the 

optimization of buffer layer and drift layer lifetime of SiC GTO

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STTR Phase I2008 DOE Annual Review

1818

Further Work

• Development of 10 kV SiC n type ETO1) fabrication of 10 kV SiC n‐GTO2) Characterization of 10 kV SiC n‐ETO3) Application of 10 kV SiC n‐ETO

• Study of Si/SiC heterostructure

to reduce the turn‐ on knee voltage of SiC pn

junction ( 3 V)

1) Theoretical analysis2) Experimental study

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STTR Phase I2008 DOE Annual Review

1919

Questions ?

Thank you