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Development of Development of SiC SiC Power Power MOSFETs with Low On MOSFETs with Low On - - resistance resistance National Institute of Advanced Industrial Science and Technology (AIST) Power Electronics Research Center(PERC) Device&Process Team 1 Leader Kenji Fukuda

Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

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Page 1: Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

Development ofDevelopment of SiCSiC Power Power MOSFETs with Low OnMOSFETs with Low On--resistanceresistance

National Institute of Advanced Industrial Science and Technology (AIST)Power Electronics Research Center(PERC)Device&Process Team 1 LeaderKenji Fukuda

Page 2: Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

Theo

ryfor

S iC

Theo

ryfor

S i

Breakdown Voltage

CurrentSiC device

ProjectedSiC device

ElectrodeChannelResistance

Ion Implantation

Material ScienceDevice Science

Crystal Growth Device Processing

Device Fabrication

Defects

On-

R es i

sta n

ce

oxides

Theor

y for

SiC

On-

Res

ista

nce

On-

Res

ista

nce

Theor

y for

Si

Ultra low loss Power Devices Ultra low loss Power Devices Technology Japanese National Technology Japanese National

project(1998project(1998--2002)2002)

Page 3: Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

OutlineOutline

1.1. BackgroundBackground2.2. Present state of Present state of SiC SiC devicesdevices3.3. Problem & Solution of Problem & Solution of SiC SiC MOSFETsMOSFETs4. Gate oxide reliability4. Gate oxide reliability5.5. SummarySummary

Page 4: Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

Physical properties of wide gap Physical properties of wide gap semiconductorssemiconductors

Semi-conductors

3C-SiC

4H-SiC

6H-SiC

Si

GaAs

Eg(eV)Mobility (cm2/Vs)

Saturation velocity(cm/s)

Dielectric Breakdown field(V/cm)

Thermal conductivity(W/cm・K)

2.23

3.26

2.93

1.11

1.43

1000

900

500

1350

8000

3×106

3×106

3×105

4×105

4.5

4.5

4.5

1.5

0.5

2.7×107

2×107

2×107

1×107

2×107

Page 5: Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

Si-MOSFET

ND=4x1015cm-3ND=4x1013cm-3

330μm

30μm

n np p

n-Thickness

1/10

Carrier Concentration

100 times

On-State voltageabout 1/200

On-State voltage 250V@50A/cm2

On-State voltage 1.2V@50A/cm2

SiC-MOSFET

np n p

SiCSiC vs. Si (3300V MOSFET)vs. Si (3300V MOSFET)

Page 6: Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

High temperature operationHigh temperature operation

SiC

1. High thermal conductivity

2. Wide energy gap

1. High temperature operation is possible.

→ Powerful advantage

6H-SiC MOSFET at 300

J.W. Palmour et al.Physica B,185,461(1993)

Page 7: Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

Present state of Present state of SiC SiC devicesdevices

Rectifier

Inverter

DC

AC power supply

Motor(Load)

Diode・SBD (Schottky Barrier Diodes)・PiN Diode

Switching Devices・JFET(Junction FET)

・MOSFET

power electronics apparatuspower electronics apparatus

Page 8: Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

2.0

1.0

0

-1.0

-2.0

(100ns/div.)

Cur

rent

(A)

TimeReverse Recovery Characteristics

Si pn Diode

SiC-Schottky Barrier Diode

125 Ron :1 mΩcm2,Vbd=1kVSiCED(Siemens/Infineon)→ Sale($3/chip)

10

Cathode

350

n-epitaxial layer

n+ SiC-substrate

p+ p+

Guard Ring Anode Schottky Metal

μm

SiCSiC--SchottkySchottky Barrier DiodesBarrier Diodes

Page 9: Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

SiC-JFET(SIT)

Si-MOSFET

SiC-JFET CascodeArrengement with Si-MOSFET is necessary.

By P. Friedrich et al;”Static and Dynamic Characteristics of 4H-SiC JFETsDesigned for Different Blocking Categories”, Mate.Sci. Forum 338-342,2000,p.1243-1246.

Disadvantage of Disadvantage of SiC SiC JFETJFET

SiC JFET(SIT) is nomally-on device.

SiC MOSFET is ideal because it is normally-off type device.

Page 10: Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

1. High Ron=Contact +Sheet +Channel

Contact resistanceM/S interface controltechniqueSheet resistanceN-type I/I technique

Channel ResistanceMOS interface control technique

SiO2

Gate electrodeSource Source

ドレインDrain

Sheet resistanceP-type I/I technique

2. Oxide reliability

Current

Problems ofProblems of SiCSiC MOSFETsMOSFETs

Oxide reliability

Page 11: Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

"Crofton et al., Phys. Stat. Sol., 202 , 581 (1997)."

N-type contactNi electrode

P-type contactTi/Al electrode

-8

-7

-6

-5

-4

-3

-2

-1

0

17 18 19 20 21

present(4H)

before(6H)

!

-8

-7

-6

-5

-4

-3

-2

-1

0

17 18 19 20 21

present(4H)

before(6H)

Electron concentration Hole concentration

Log1

0(ρ

c[Ω

cm2]

)10

Log10(n [/cm3]) Log10(p [/cm3])Lo

g10(

ρc

[Ωcm

2])

Comparison with before dataComparison with before data

Page 12: Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

1. High Ron=Contact +Sheet +Channel

Contact resistanceM/S interface controltechniqueSheet resistanceN-type I/I technique

Channel ResistanceMOS interface control technique

SiO2

Gate electrodeSource Source

ドレインDrain

Sheet resistanceP-type I/I technique

2. Oxide reliability

Current

Problems ofProblems of SiC SiC MOSFETsMOSFETs

Oxide reliability

Page 13: Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

Reason of high sheet resistanceReason of high sheet resistance

Very High temperature >1500and long annealing is necessary for impurity activation.

Impurities disappear with Si from SiC surface

Very high sheet resistance

Page 14: Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

TMP

DRY PUMP

Ar gasExhaust

Heat chamber

Infrared lamp

Spheroid mirror

Quartz tube Sample

SiC sub.

Concept of equipment写真2

Super fast and highSuper fast and high--temperature temperature activation annealing equipmentactivation annealing equipment

1700

30min.

SiC surface

1700

1min.Rs=38Ω/

Page 15: Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

1. High Ron=Contact +Sheet +Channel

Contact resistanceM/S interface controltechniqueSheet resistanceN-type I/I technique

Channel ResistanceMOS interface control technique

SiO2

Gate electrodeSource Source

ドレインDrain

Sheet resistanceP-type I/I technique

2. Oxide reliability

Current

Problems ofProblems of SiCSiC MOSFETsMOSFETs

Oxide reliability

Page 16: Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

Dch

SiO2

Buried channel region

n+ n+n-layer

Our results

SiO2Source

n+ n+

Gate electrode

P-tye SiC sub.

Drain

SiO2/SiC interface

Many SiO2/SiCInterface defects

Reason of high channel resistanceReason of high channel resistance

P-tye SiC sub.

SourceGate electrode

Drain

MOS interface controlLarge amount of interface defects

Low channel mobility

High channel resistance

1. Dry oxidation+wet re-oxidation

2. Buried channel structure

μFE > 200cm2/Vs is achieved.

Page 17: Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

1. High Ron=Contact +Sheet +Channel

Contact resistanceM/S interface controltechniqueSheet resistanceN-type I/I technique

Channel ResistanceMOS interface control technique

SiO2

Gate electrodeSource Source

ドレインDrain

Sheet resistanceP-type I/I technique

2. Oxide reliability

CurrentOxide reliability

Problems ofProblems of SiCSiC MOSFETsMOSFETs

Page 18: Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

Problem of Oxide reliabilityProblem of Oxide reliability1. Energy barrier height is small.

3. Working temperature of SiC is expected to be higher than that of Si.

2. Carbon reminds in SiO2 film.

φb SiO2(9eV)

SiElectron injection into SiCoxide is easier than that of Si.

Residual carbon causes large leak current.

Circumstance of SiC oxide is harsh.

φbSiO2(9eV)

SiC

Page 19: Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

Current VS. Gate voltageCurrent VS. Gate voltage

10-2310-22

10-2110-2010-19

10-1810-17

1 1.1 1.2 1.3 1.4 1.5

J/E2(A/V2 )

1/E(×10 -9,m/V)

Φeff=2.86eVm ox/m=0.42

10-1310-1110-910-710-510-310-1101

0 2 4 6 8 10 12 14

J(A/cm2 )

E(MV/cm)

9.5MV/cm(This is same as Si MOS)

R.T.

Long time reliability at high temperature is important. → Data is insufficient.

Page 20: Development ofSiCPower MOSFETs with Low On- resistanceconference.kek.jp/RPIA2002/talks/fukuda.pdf · SiC device Projected SiC device Channel Electrode Resistance Ion Implantation

SummarySummary1. 1. SiCSiC JFETJFETRon=70mΩcm2、Vbd=2000VNormally-on、Cascode arrangement is necessary. → MOSFET is ideal device.2. 2. SiCSiC MOSFETMOSFET(1) Contact and Sheet Resistance is sufficient low.(1) Contact and Sheet Resistance is sufficient low.(2) MOS interface control technique(2) MOS interface control technique・μFE of 216cm2/Vs was achieved.・Lateral resurf MOSFETRon=51mΩcm2、Vbd=630VDynamics characteristics: rise time=20ns, fall time=15ns・DIMOSFETRon might decrease below 10mΩcm2, I am investigating now it.・ Oxide reliability at high temperature is left-behind. I am investigating now it,too.