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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS Due 12:15 PM Friday, December 12, 2014 Introduction and Background Signal processing systems, in particular communications systems, need to generate signals in addition to processing them. Text Chapter 5, entitled Signal Generation, drills down on this important topic. Signal generation requirements might be for sinusoids, pulse type signals, pseudo-random data, or noise waveforms, to name a few. In this lab the focus will be on the gen- eration of sinusoidal signals using what is known as direct digital synthesis (DDS) [1]–[3]. A application case study is described in Part II, which is a communications receiver for frequency modulation (FM). The FM receiver implements complex frequency translation of the input signal in order for demodulation to be performed at complex baseband. Part I: Direct Digital Synthesis The text describes two means of sinusoidal signal generation: (1) direct digital synthesizer (DDS) and (2) the digital resonator. The digital resonator uses an IIR filter with poles located on the unit circle that is excited by impulse to start the oscillation. The focus here is the DDS technique, as it is quite popular in communications transmitter and receivers. The Voltage Controlled Oscillator as Motivation The DDS is motivated by the voltage controlled oscillator (VCO), which is used as sinusoidal sig- nal generator in analog electronics [1]. A VCO has output frequency, , that is proportional to the input control voltage, plus the quiescent frequency .Working from the VCO block dia- gram of Figure 1, you have (1) with VCO gain constant having units of Hz/v.The total phase of the VCO output, , is related to the instantaneous frequency of the VCO as f i t () et () f 0 φ t () 2 π K v e λ ( d t = et () xt () A 2 π f 0 t φ t () + [ ] cos = θ t () VCO Figure 1: VCO high level block diagram. K v θ t ()

ECE 4680 DSP Laboratory 6: Signal Generation Using DDS€¦ ·  · 2014-09-14ECE 4680 DSP Laboratory 6: Signal Generation Using DDS Due 12:15 PM Friday, December 12, 2014 Introduction

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Page 1: ECE 4680 DSP Laboratory 6: Signal Generation Using DDS€¦ ·  · 2014-09-14ECE 4680 DSP Laboratory 6: Signal Generation Using DDS Due 12:15 PM Friday, December 12, 2014 Introduction

ECE 4680 DSP Laboratory 6:Signal Generation Using DDS

Due 12:15 PM Friday, December 12, 2014

Introduction and BackgroundSignal processing systems, in particular communications systems, need to generate signals inaddition to processing them. Text Chapter 5, entitled Signal Generation, drills down on thisimportant topic. Signal generation requirements might be for sinusoids, pulse type signals,pseudo-random data, or noise waveforms, to name a few. In this lab the focus will be on the gen-eration of sinusoidal signals using what is known as direct digital synthesis (DDS) [1]–[3]. Aapplication case study is described in Part II, which is a communications receiver for frequencymodulation (FM). The FM receiver implements complex frequency translation of the input signalin order for demodulation to be performed at complex baseband.

Part I: Direct Digital SynthesisThe text describes two means of sinusoidal signal generation: (1) direct digital synthesizer (DDS)and (2) the digital resonator. The digital resonator uses an IIR filter with poles located on the unitcircle that is excited by impulse to start the oscillation. The focus here is the DDS technique, as itis quite popular in communications transmitter and receivers.

The Voltage Controlled Oscillator as MotivationThe DDS is motivated by the voltage controlled oscillator (VCO), which is used as sinusoidal sig-nal generator in analog electronics [1]. A VCO has output frequency, , that is proportional tothe input control voltage, plus the quiescent frequency .Working from the VCO block dia-gram of Figure 1, you have

(1)

with VCO gain constant having units of Hz/v.The total phase of the VCO output, , isrelated to the instantaneous frequency of the VCO as

fi t( )e t( ) f0

φ t( ) 2πKv e λ( ) λd∞–

t

=

e t( ) x t( ) A 2πf0t φ t( )+[ ]cos=

θ t( )

VCO

Figure 1: VCO high level block diagram.

Kv θ t( )

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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS

(2)

where is the VCO quiescent frequency. From the above equations you can now draw the behav-ioral level block diagram of Figure 2.

Note when the instantaneous frequency becomes Hz.

Converting the VCO Model to the Discrete-Time DomainIn the discrete-time domain consider a sampling rate of , with being the samplingperiod or spacing. You have

, (3)

where the discrete-time phase is .The integrator is replaced by an accumulatorwhen you consider approximating the integral via rectangular areas. This is shown in Figure 3.

With the integration above understanding you can write

(4)

where rad/sample. The recursive form for in the last line of (4) motivates thediscrete-time form of the VCO shown in Figure 4.

fi t( ) 12π------ td

d= θ t( ) f0 Kve t( )+=

f0

Figure 2: VCO behavioral level block diagram.

2πKv ( )cos1s---

e t( ) x t( )

bias term 2πf0{

integrator

θ t( )

e t( ) 0= fi t( ) f0=

fs 1 T⁄= T

x n[ ] x nT( ) 2πf0nT φ nT( )+[ ]cos= =

φ n[ ] φ nT( )=

tn 2–( )T n 1–( )T nT

a n 1–( )T( )a t( )

1s---

a t( ) b t( )

b nT( ) T a kT( )k ∞–=

n 1–

=

Figure 3: Discrete-time integration approximation using the left endpoint for a.

φ n[ ] φ nT( ) 2πKvT e nT( )k ∞–=

n 1–

= =

2πKvT e n[ ]k ∞–=

n 1–

kve n 1–[ ] φ n 1–[ ]+==

kv 2πKvT= φ n[ ]

Part I: Direct Digital Synthesis 2

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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS

As a fixed frequency generator let and set or to the desired quiescentfrequency . This behavior is similar to the analog VCO. Note the discrete-time VCOis sometimes referred to as a numerically controlled oscillator (NCO), but more typically is theidealized mathematical form of the DDS. The output equation for the NCO/DDS when is

(5)

where you can also write that

(6)

C-Code Implementation Using FloatsOn the OMAP-L138 a near ideal DDS implementation is possible since float-point arithmetic isavailable and the math.h library can be used to for on-the-fly calculation of sine and cosineusing sinf() and cosf(). The code snippets below produce an example of how this can bedone:

#include <math.h> // added for trig function support

// DDS variables

#define two_pi 6.283185307179586

float f0 = 1000; // desired DDS quiescent frequency

float theta = 0;

float w0 = 0.130899693899575; //2*pi*1000/48000, use GEL to compute more vals

...

interrupt void Codec_ISR()

{

...

// DDS

codecOutLeft = 32000*cosf(theta);

theta += w0;

if (theta >= two_pi) theta -= two_pi; // wrap accumulator output

/////////////////////////////////////////////////

kv ( )cosz 1–e n[ ] x n[ ]

2πf0T

θ n[ ]

ω̂0 2πf0 fs⁄= phase accumulatorbiasterm

ω̂0 n φ n[ ]+⋅

Figure 4: Discrete-time VCO block diagram.

Can make outputa mod(2π) valuedue to cos( )

e n[ ] 0= f0 ωˆ 0 2πf0 fs⁄=0 f0 fs 2⁄< <

e n[ ] 0=

x n[ ] 2πf0 fs⁄ n⋅( )cos ω̂0n( )cos= =

θ n[ ] ω̂0n=

θ n 1+[ ] ω̂0 n 1+( ) ω̂0n ω̂0+ θ n[ ] ω̂0+= = =

Part I: Direct Digital Synthesis 3

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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS

...

}

From the above code snippet you see that the DDS quiescent frequency is determined by choosing

(7)

Practical Implementation ConsiderationsMost DDS implementations, in particular ASIC and FPGA forms, utilize fixed-point arithmetic.Finite precision impacts include

• Bit width of the accumulator; controls the ultimate frequency precision or smallest fre-quency step size via Hz, where is the sampling rate and is the accumu-lator bit width

• The size of the sine/cosine look-up-table (LUT); the bit width here is typically reduced fromthe accumulator bit width, that is , this the table contains at most entries

• The storage precision or bit width of the sine/cosine values:

A modified DDS block diagram, that includes finite precision attributes is shown in Figure 5. For

an accumulator input step size (an integer value), the DDS output frequency is

Hz (8)

or from a design standpoint

. (9)

Note in [3] and elsewhere is referred to as the DDS clock frequency, .

A MATLAB simulation of this system is the following:

function [x,a_out,n] = DDS(f0,fs,N_samps,Bcos,Bacc,Bw)

% [x,a_out,n] = DDS(f0,fs,N_samps,Bcos,Bacc,Bw)

% //////////////// Inputs ////////////////////

ω̂0 2πf0fs----⋅ 0 f0 fs 2⁄< <,=

fΔ fs 2Bacc⁄= fs Bacc

Bw Bacc< 2Bw

Bcos

z 1– Q ( ) sin/cosLUT

Bacc Bw Bcos

Bw Bacc<

Bacc bit phaseaccumulator

Figure 5: Finite precision DDS block diagram.

Input OutputNΔ

f0fs

2Bacc

---------- NΔ⋅=

NΔf0 2

Bacc⋅fs

------------------=

fs fclk

Part I: Direct Digital Synthesis 4

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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS

% f0 = desired output frquency

% fs = sampling frequency

% N_samps = number of samples to simulate

% Bcos = bit width of cos/sin values

% Bacc = bit width of the accumulator

% Bw = bit width of the LUT address

% //////////////// Outputs ///////////////////

% x = output signal

% a_out = accumulator normalized to a [0,1) float value

% n = time index

%

% Mark Wickert November 2013

n = [0:N_samps-1];

x = zeros(1,N_samps);

a_out = zeros(1,N_samps);

a = 0;

w = 0;

theta = 0;

for k=1:N_samps

%x(k) = cos(2*pi*a);

x(k) = simpleQuant(cos(2*pi*w/2^Bw),Bcos,1,'none');

a = a + round(f0/fs*2^Bacc);

if a >= 2^Bacc

a = a - 2^Bacc;

end

w = round(a/2^(Bacc-Bw));

a_out(k) = w/2^Bw;

end

To see the DDS simulation in action suppose kHz and consider 32 bits (very large) for allof the bit widths and compare that to the case and :

>> [x,a_out,n] = DDS(14,48,2^16,32,32,32);

>> simpleSA(x,2^14,48,-120,5,1);

>> [x,a_out,n] = DDS(14,48,2^16,14,32,32);

>> simpleSA(x,2^14,48,-120,5,1);

>> plot(n(1:50),a_out(1:50))

>> hold

Current plot held

>> plot(n(1:50),a_out(1:50),'r.')

The idealized result (32 bits everywhere) is shown in Figure 6 and the reduced bit width resultsare shown in Figure 7. As the bit width is reduced spurious outputs (spurs) start to appear. This isa result of the finite precision arithmetic involved in the design.

fs 48=Bacc 32 Bw, 12= = Bcos 14=

Part I: Direct Digital Synthesis 5

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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS

Further discussion of DDS spurs can be found in the appendix of this document.

0 5 10 15 20−120

−100

−80

−60

−40

−20

0

Nor

mal

ized

Pow

er S

pect

rum

in d

B

Frequency (kHz)

Figure 6: DDS output at 14 kHz for kHz and 32-bits in three loca-tions.

fs 48=

0 5 10 15 20−120

−100

−80

−60

−40

−20

0

Nor

mal

ized

Pow

er S

pect

rum

in d

B

Frequency (kHz)

Figure 7: DDS output at14 kHz for kHz, , and .fs 48= Bacc 32 Bw, 12= = Bcos 14=

spurious outputs

spurious outputs

Part I: Direct Digital Synthesis 6

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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS

The 32-bit accumulator output for kHz and kHz is shown in Figure 8.

What to Expect in Your OMAP-L138 ImplementationWhen you implement the DDS using floats on the OMAP-L138 you will obtain results similar to

f0 14= fs 48=

Figure 8: DDS accumulator output for kHz for kHz,, and .

f0 14= fs 48=Bacc 32 Bw, 12= = Bcos 14=

0 5 10 15 20 25 30 35 40 45 500

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

Sample Index n

Nor

mal

ized

Acc

umul

ator

Out

put

Part I: Direct Digital Synthesis 7

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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS

those shown in.

Part II: FM Communications ReceiverTo put the DDS of Part I to good use, you now explore a communications receiver utilizing com-plex frequency translation. The sine and cosine signals of a DDS form a complex sinusoid that isused to complex frequency translate the input/received signal from 30 kHz to baseband ( ).Demodulation is then performed on the now complex signal to recover the message signal.

Receiving System DetailsThe signal of interest is a frequency modulated (FM) carrier waveform given by

Figure 9: DDS output at 1 kHz from the OMAP-L138 with kHz usingreal-time floats.

fs 48=

Exponential averaging revealsspurs spaced every 1 kHz

About 88 dBto the noisefloor

About 78 dBspurious-freedynamic range(SFDR)

f 0=

Part II: FM Communications Receiver 8

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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS

. (10)

You study this waveform in detail in ECE 4625/5620, Communications Systems I. The signal car-rier of center frequency is Hz. The information or message carried by the signal is . Themessage signal can be analog voice or music, or a digitally encoded information. The approximatefrequency spectrum is shown in Figure 10. Mathematically the spectrum of takes the form

(11)

where is the complex baseband spectrum corresponding to . Note is reallyjust

. (12)

To get your hands on all you need to do is complex frequency translate (10) either to heleft or right by Hz and lowpass filter to one half the FM RF bandwidth,

. (13)

I will later chose to make the translation frequency negative to move the spectrum to the left. If indoubt, recall from Fourier transform theory that

(14)

where . The second step is to demodulate the message from . Incommunication systems you learn that a frequency discriminator of some sort is required. Here Iwill use a DSP implementation fits well with the overall receiver architecture.

DSP Receiver ImplementationA DSP based receiver utilizing the capabilities of the Zoom OMAP-L138 board is shown in Fig-

xc t( ) Ac 2πfct 2πfd m λ( ) λd

t

+cos=

fc m t( )

ffcf– c 0

BFM controlledby m(t)

Figure 10: Spectrum of FM carrier centered at Hz.fc

xc t( )

Xc f( ) 12--- XBB f fc–( ) XBB f fc+( )+[ ]=

XBB f( ) xc t( ) xBB t( )

xBB t( ) Ac 2πfd m λ( ) λd

t

exp=

xBB t( )fc BFM

xBB t( ) LP xc t( ) ej2πfct±

=

FT x t( )ej2πf0t{ } X f f0–( )=

X f( ) FT x t( ){ }= m t( ) xBB t( )

Part II: FM Communications Receiver 9

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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS

ure 11. The main signal flow passes from put to output using the left audio channel. The samplingrate is set to 96 ksps, which is the fastest rate supported by the audio codec.

Since the complex frequency translation is performed on the sampled input signal, , thereare a some differences due to spectral images. Consider Figure 12 to help visualize how samplingfollowed by complex frequency translation and a lowpass filter achieves the intended result.

Note that the spectrum of a complex signal is not symmetrical (in magnitude) about . Com-munications applications of real-time DSP typically involve complex signals.

Complex Baseband Discriminator

The complex baseband signal for the case of an FM input signal, is of the form

. (15)

Note . The frequency discriminator seeks to find the derivative ofthe phase . In the continuous-time domain the derivative of the inverse tangent function is

ADCIIRLPF

N = 4DAC

DAC

ComplexBaseband

ej2π fc fs⁄( )n– test point

1 2 11

1

21

1

2= real

= complex

Figure 11: Zoom (also LCDK) OMAP-L138 FM receiver block diagram.

fs 96 kHz=

fs 96 kHz=

(LEFT) (LEFT)

(RIGHT)

options

choose re{}or im{}

xc t( )xc n[ ] x n[ ] y n[ ] z n[ ]

z t( )

e j2π 30 96⁄( )n–=

Discrimin.

xc n[ ]

f (kHz)0

fc 30 kHz=fs 96 kHz=

48-48-96 9630 66-30-66

... ...

0 48-48-96 9636 66-30-60

... ...

move left30 kHz

ideallowpass

Spectrum Before

Spectrum After

Principle alias band

Figure 12: The spectrum (a) following sampling and (b) following fre-quency translation when kHz and kHz (shift left).

xc t( )fs 96= fc 30=

f (kHz)

Important imagefor the LPF tosuppress

Xc ej2πf fs⁄

( )

X ej 2πf( ) fs⁄

( )

(a)

(b)

f 0=

y n[ ]

y n[ ] Acejφ n[ ] Ac φ n[ ]( )cos j φ n[ ]( )sin+{ } yI n[ ] jyQ n[ ]+= = =

φ n[ ] tan 1– xQ n[ ] xI n[ ]⁄( )=φ n[ ]

Part II: FM Communications Receiver 10

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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS

. (16)

A discrete-time approximation to the above derivative is

. (17)

Here the denominator of (17) can be omitted since the magnitude squared of the FM signal is aconstant.

MATLAB Simulation

To verify the receiver design before writing and C-code, I construct a MATLAB simulation anddrive the input with a real FM signal. The message signal will be a 1 kHz sinusoid deviating the30 kHz carrier by about 1.5 kHz peak. To generate an FM signal you can use a modified versionof the DDS m-code, FM_gen.m:

function [x,a_out] = FM_gen(e,f0,fs)

% [x,a_out] = FM_gen(e,f0,fs)

%

% Mark Wickert November 2013

x = zeros(size(e));

a_out = zeros(size(e));

a = 0;

w = 0;

theta = 0;

for k=1:length(e)

x(k) = cos(2*pi*a);

a = a + f0/fs + e(k)/fs;

a = mod(a,1);

a_out(k) = a;end

The complex baseband discriminator is implemented in the function discrim.m:

function disdata = discrim(x)

% function disdata = discrimf(x)

% x is the received signal in complex baseband form

% Mark Wickert

X=real(x); % X is the real part of the received signal

Y=imag(x); % Y is the imaginary part of the received signal

N=length(x);% N is the length of X and Y

b=[1 -1]; % filter coefficients for discrete derivative

a=[1 0];

z t( ) dφ t( )dt-------------

yI t( )yQ' t( ) yQ t( )yI' t( )–

yI2 t( ) yQ

2 t( )+---------------------------------------------------------= =

z n[ ]yI n[ ] yQ n[ ] yQ n 1–[ ]–( ) yQ n[ ] yI n[ ] yI n 1–[ ]–( )⋅–⋅

yI2 n[ ] yQ

2 n[ ]+---------------------------------------------------------------------------------------------------------------------------------------=

Part II: FM Communications Receiver 11

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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS

derY=filter(b,a,Y); % derivative of Y,

derX=filter(b,a,X); % derivative of X,

disdata=(X.*derY-Y.*derX)./(X.^2+Y.^2);

The function DDS.m is used to generate a complex sinusoid for frequency translation and thefunction butter() us used to generate the lowpass filter coefficients. The complete simulationis as follows:

>> [x,a_out,n] = DDS(30,96,10000,32,32,32); % Use a_out to form both cos & sin

>> cpx_car = cos(2*pi*a_out) - j*sin(2*pi*a_out); % form exp[-j*2*pi*30/96*n]

>> e = 2000*cos(2*pi*1000/96000*n); % The 1 KHz message signal, 2 kHz peak dev

>> xc = FM_gen(e,30000,96000); % The 30 kHz FM carrier

>> x = xc.*cpx_car; % The complex frequency translated signal

>> [b,a] = butter(4,2*10/96); % The 4th-order lowpass filter with fc = 10 kHz

>> y = filter(b,a,x); % The filtered complex signal, also complex

>> z = discrim(y); % The discriminator output

The input spectrum, the frequency translated spectrum, and the filtered spectrum are shown assubplots in Figure 13.

0 5 10 15 20 25 30 35 40 45−40

−20

0

20

PS

D (

dB)

Frequency (Hz)

−40 −30 −20 −10 0 10 20 30 40−40

−20

0

20

PS

D (

dB)

Frequency (Hz)

−40 −30 −20 −10 0 10 20 30 40−40

−20

0

20

PS

D (

dB)

Frequency (Hz)

Sxc f( ){ }dB

Sx f( ){ }dB

Sy f( ){ }dB

(a)

(b)

(c)

Figure 13: The spectra at (a) the input, (b) following complex frequency transla-tions, and (c) after the lowpass filter, in the MATLAB simulation of the FMreceiver.

imagespectrum

desiredspectrum

receivedsignal

peak dev.of 2 kHz

Part II: FM Communications Receiver 12

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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS

The final discriminator output signal is given in Figure 13.

All is well, so now the system can be implemented on the Zoom OMAP-L138 with confidence.

OMAP-L138 Sample Outputs

A complete implementation on the OMAP-L138 is tested using the Analog Discovery for the FMsignal source and the scope and spectrum analysis capabilities. An FM signal with a sinusoidalmessage at 1 kHz and 30 kHz carrier is configured as shown in Figure 15.

z n[ ]

0 1 2 3 4 5 6−0.15

−0.1

−0.05

0

0.05

0.1

0.15

0.2

Time (ms)

Dis

crim

inat

or O

utpu

t Am

plitu

de

The 1kHz messagesinusoid

Figure 14: The 1 kHz message signal recovered at the output of the discrimina-tor in the MATLAB simulation.

Filtertransient

Part II: FM Communications Receiver 13

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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS

The signal captured at the output of the complex baseband discriminator is shown in Figure 16.The spectrum is also shown so that you can see that the 4th-order lowpass filter has not com-pletely removed the image signal at 36 kHz. The image signal in fact manages to make its waythrough the discriminator.

Figure 15: Setting up the function generator in Analog Explorer to produce anFM carrier at 30 kHz with a 1 kHz sinusoidal message at peak deviation of 0.05 x30 kHz = 1.5 kHz.

Part II: FM Communications Receiver 14

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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS

ExpectationsWhen completed, submit a lab report which documents code you have written and a summary

of your results. Screen shots from the scope and any other instruments and software tools shouldbe included as well. I expect lab demos of certain experiments to confirm that you are obtainingthe expected results and knowledge of the tools and instruments.

The ZIP package Lab6.zip, explained in the appendix, contains m-code simulation func-tions and a CCS project entitled Zoom_DDS.

Problems1. Implement the DDS code described at the bottom of p. 3 on the OMAP-L138. Choose the

sampling frequency to be 48 kHz. Modify this code so that you can control the output fre-quency of the sinusoids (cos/sin) via a GEL slider to step from 1 Hz to 20 kHz in 1 Hz steps.The GEL file can implement float calculations, so you can have the slider select the desiredsinusoid frequency in Hz and have the GEL convert the value to a float .

1 kHzmessage

36 kHzleakage

about 55 dB down

Recovered1 kHzsinusoid from

Figure 16: OMAP-L138 output for a 1 kHz sinusoidal message at 1.5 kHz peakfrequency deviation and kHz.fs 96=

30 kHz FMcarrier

message harmonics (2 & 3 kHz)

ω̂0 2πf0 fs⁄=

Expectations 15

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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS

I will ask you to demo this via the spectrum analyzer (Agilent 4395A in spectrum analyzermode). Note that sinf()/cosf() is used instead of sin()/cos(), what is the differ-ence in the context of ANSI C?

2. Experimentally find the ISR service time of the simple DDS of Problem 1 using the digital I/O technique first described in Lab 4. Initially assume no optimization then try -o3 optimiza-tion and note the improvement.

3. In Problem 1 the basic DDS calculation is of the form

ADC_output = (short) 32000*cosf(theta);

An efficient DDS uses a LUT in place of this on-the-fly cosine calculation. In this problem,rather than implementing an actual LUT, you will emulate one by doing some fixed-pointconversions in the argument of cosf(). To start with note that the 32000 scales thecosf() value to lie near the max amplitude range of a short signed integer (recall [-32768, 32767]). The only fixed-point quantization that is taking place presently is castingthe cosine values from float to short as they are output to the audio codec (specifically theDAC).

To emulate the LUT consider a rework of the original code to set up a float accumulator run-ning from [0, 1), but quantized in the argument of cosf(). The code below increments theaccumulator a by (in code f0_fs), for . The argumentof cosf() is , where is a W bit quantizer implemented as

. (18)

Note Short[ ] represents casting a float value to a Short integer. The returned float value of(18) is again float because is represented as a float constant. The returned value is how-ever quantized. The modified DDS c-code is given below:

...// DDS variables#define two_pi 6.283185307179586#define W 16float a = 0;float f0_fs = 0.020833333333333; // f0/fs = 1000/48000...

interrupt void Codec_ISR(){

/* add any local variables here */WriteDigitalOutputs(1); // Write to GPIO J15, pin 6; begin ISR timing pulsefloat codecInLeft, codecInRight, codecOutLeft, codecOutRight;float a_scale_p = pow(2,W); // emulate a table size of 2^W entriesfloat a_scale_m = pow(2,-W); // using these scaling constantsshort a_short;

if(CheckForOverrun())// overrun error occurred (i.e. halted DSP)return; // so serial port is reset to recover

0 f0 fs⁄ 1< < f0 fs⁄ 1000 48000⁄=2π QW f0 fs⁄( )⋅ QW ( )

QW x( ) Short x 2W⋅[ ] 2 W–⋅=

2 W–

Problems 16

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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS

CodecDataIn.UINT = ReadCodecData();// get input data samples

/* add your code starting here */ codecInLeft = CodecDataIn.Channel[ LEFT]; codecInRight = CodecDataIn.Channel[ RIGHT]; codecOutRight = codecInRight; // This input channel will not be used

///////////////////////////////////////////////// // DDS a_short = (short)(a*a_scale_p+ 0.5); codecOutLeft = 32000*cosf(two_pi*a_short*a_scale_m); a += f0_fs; if (a >= 1) a -= 1.0; /////////////////////////////////////////////////

CodecDataOut.Channel[ LEFT] = (short) codecOutLeft;CodecDataOut.Channel[RIGHT] = (short) codecOutRight;/* end your code here */

WriteCodecData(CodecDataOut.UINT);// send output data to portWriteDigitalOutputs(0); // Write to GPIO J15, pin 6; end ISR timing pulse

}

a) Using the spectrum analyzer mode of the Agilent 4395A, characterize the spectrumquality of the 1 kHz output signal for W=16. The quantity of interest is the spurious freedynamic range (SFDR) as shown in Figure 9. The SFDR measures the maximumdynamic range between the signal of interest and any adjacent spurs. The ISRs codeDDS_ISRs_p3.c has the frequency set to 1 kHz. Keep that setting for all measure-ments.

b) Repeat part (a) for W=12.

4. In this problem you will explore the FM receiver design of Part II. As an FM signal sourceyou will use the internal FM capability of the Agilent 33250 function generator found onyour lab bench. You lab instructor will you with the set-up of the generator.

a) Write C code to implement the FM receiver described in Figure 11. As a starting pointfind the file FM_Demod_ISRs.c as the starting point.

b) Configure the Agilent 33250 to produce a sinusoidal FM signal having kHz, amodulation frequency of 1 kHz, and a peak frequency deviation in the range of 1 to 2kHz.

c) Experiment with mistuning the frequency of the DDS relative to the known FM signalcarrier at 30 kHz. How far above and below 30 kHz can you tune the DDS withoutresulting in a heavily distorted demodulated 1 kHz sinusoid?

fc 30=

Problems 17

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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS

References[1] Michael Rice, Digital Communications: A Discrete-Time Approach, Prentice Hall, New Jer-

sey, 2009.

[2] Analog Devices MT-85 Tutorial, Fundamentals of Direct Digital Synthesis (DDS), 2009,http://www.analog.com/static/imported-files/tutorials/MT-

085.pdf.

[3] Xilinx LogiCore, DS246 Product Specification v5.0, April 28, 2005. http://

www.xilinx.com/support/documentation/ip_documentation/dds.pdf.

Appendix

Dealing with SpursSpurs are a known fact of DDS implementations. Design techniques to mitigate spurs aredescribed in [1],[2], and [3]. The root cause of spurs is the fact that the quantizer introducesphase error

. (19)

The accumulator output driving the LUTs is of the form

. (20)

In the generation of a complex sinusoid (sin and cos), i.e., , youcan write

(21)

assuming the error is small. The error phase is also a periodic ramp signal so it effectively modu-lates via the term . This action produces sidebands at frequency offsets fromthe fundamental frequency (4 kHz in the case of Figure 7).

One mitigation approach is to inject a small random dithering signal at the input to the quantizeras shown in Figure 17. The idea is that the dithering signal disrupts the periodicity and replaces it

Q ( )

θ n[ ]δ θ̂ n[ ] θ n[ ]–=

θ̂ n[ ] θ n[ ] θ n[ ]δ+=

ejθˆ n[ ] θ̂ n[ ]( )cos j θ̂ n[ ]( )sin+=

ejθˆ n[ ] ejθ n[ ] ej θ n[ ]δ⋅ ejθ n[ ] θ n[ ]δ( )cos j θ n[ ]δ( )sin+{ }= =

ejθ n[ ] 1 j θ n[ ]δ+{ }⋅=

θ n[ ] j θ n[ ]ejθ n[ ]δ

References 18

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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS

with a dominant random phase error [1]. The corresponding error spectrum is transformed from

spectral lines to a flat noise-like spectrum across the entire spectrum. The spectrum now has anoise floor, but the spurs are gone and/or reduced.

A MATLAB model that includes dithering is

function [x,a_out,n] = DDS_dither(f0,fs,N_samps,Bcos,Bacc,Bw)

% [x,a_out,n] = DDS_dither(f0,fs,N_samps,Bcos,Bacc,Bw)

%

% Mark Wickert November 2013

n = [0:N_samps-1];

x = zeros(1,N_samps);

a_out = zeros(1,N_samps);

a = 0;

w = 0;

theta = 0;

for k=1:N_samps

%x(k) = cos(2*pi*a);

x(k) = simpleQuant(cos(2*pi*w/2^Bw),Bcos,1,'none');

a = a + round(f0/fs*2^Bacc);

if a >= 2^Bacc

a = a - 2^Bacc;

end

a = a + randn(1,1)*2^(Bacc - Bw - 3); % Dithering added here

w = round(a/2^(Bacc-Bw));

a_out(k) = w/2^Bw;

end

z 1– Q ( ) sin/cosLUT

Bacc Bw Bcos

Bw Bacc<

Bacc bit phaseaccumulator

Figure 17: Finite precision DDS with dithering to mitigate spurs.

Input OutputNΔ

Bacc

dithersignald n[ ]

pseudo-random sequencetoggling one or more LSBs

θ n[ ] θ̂ n[ ]

A MATLAB model that includes dithering is 19

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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS

Reworking the results of Figure 6, you now have the results shown in Figure 18.

LAB 6 ZIP ContentsThe file Lab6.zip contins MATLAB simulation code and the CCS project Zoom_DDS. The sim-ulation code is discussed earlier in this lab document. In the CCS project shown in Figure 19 Imake use of the CCS feature exclude from build to effectively turn on and off ISR files.

0 5 10 15 20−120

−100

−80

−60

−40

−20

0

Nor

mal

ized

Pow

er S

pect

rum

in d

B

Frequency (kHz)

Figure 18: DDS output at 14 kHz for kHz, , and with (red) and without (blue) dithering.

fs 48= Bacc 32 Bw, 12= =Bcos 14=

Noise floor Phase noise addedaround the carrier

nodither

Figure 19: Contentsof CCS project Zoom_DDS.

Presently excludedfrom build

Active DDS ISR thatis incomplete for Problem 1

ISR Omitted from ZIP

Complete ISR for Problem 3

ISR Omitted from ZIP

Incomplete ISR for Problem 4

Use the CCS exclude from buildfeature to toggle ISRs files on andoff in the project. Use DSP_Config.hto change the sampling rate.

Gel file for DDSfrequency tuningat fs = 48 and 98 kHz

Use this file to change between48 and 96 kHz sampling rates

A MATLAB model that includes dithering is 20