ece496 lecture1 20199 merge · 5 R. Gillett, P.Eng. FEC (2019) ECE496 The Design Process September 2003 Teamwork in Your Project +-U1 5 6 7 C2 100 n TL082 4 R9 10k R8 51k R1 0 330

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ECE496 Design Project Opening Lecture

Thursday, Sept. 5, 2019

Khoman Phang and Ross Gillett

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Outline

Tonight n  An introduction to "Real-World Engineering" (Gillett) n  Course Deliverables and Resources (Phang) n  Team forming session for students still looking for a

project (after lecture)

Next week Thursday, Sept. 12th Lecture 2: Project Proposal

(Tallman, Gillett & Phang)

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Introductions - ECE496 Administrators

1. Hamid Timorabadi

2. Hans Kunov 3. Nick Burgwin 4. Phil Anderson

5. Inci McGreal

6. John Taglione 7. Ross Gillett 8. Milan Graovac

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Introductions - ECE496 Team

Khoman Phang Course coordinator

Karen Irving Registration

Dr. Ken Tallman Engineering Communication Program (ECP)

Mike Mehramiz (Design Centre)

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R. Gillett, P.Eng. FEC (2019) ECE496 The Design Process September 2003

ECE496:

An Introduction to "Real World Engineering"

Ross Gillett, M.Eng, P.Eng, FEC 5 September 2019

R. Gillett, P.Eng. FEC (2019)

ECE496 The Design Process September 2003

What is Engineering?

•  Science/Math ("knowledge"): –  Matrix mathematics –  Electromagnetic Forces –  Material properties –  Circuit theory, etc

•  Engineering ("creation using knowledge"): –  The Canadarm2


What is Engineering? (cont)

•  Engineers (usually) produce something, whereas Scientists produce knowledge

•  The something performs a function •  Often a complex function, many interactions •  Usually crucial for human safety and/or return on

a large investment •  “Failure is not an option” •  How do we ensure success and safety?

•  More on this later ……..


ECE 496 is important for your career!!!

ECE496 = "Real World" engineering

–  Directing your skills toward achieving a goal: •  Teamwork •  Project planning, tracking •  Technical and business communication •  Risk management •  System design (to a limited extent) •  Detailed design

ECE496 - taking it somewhere

Technical knowledge/analysis (most of undergrad)

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Teamwork

Orbital Express Satellite Servicing Demonstration Mission,

Launched February 2007

Why was teamwork essential? - Not enough hours in one lifetime - Teamwork = parallel design activities

Canada's MOST Microsatellite Canada's Canadarm2

The Apollo Missions

Most (all) great "engineering feats" were accomplished by large teams of people


Teamwork Example: My Last Project

NEOSSat: 75 kg Microsatellite to launch in 2010 80 kg Microsatellite to launch in 2011

Team: More than 20 people over 3.5 years 5+ years (i.e. approximately 60 100 person-years)

2012 (maybe 2013)


NEOSSat: 74.94 kg Microsatellite, launched 25 February 2013

Team: More than 20 people over 6.5 years (i.e. more than 160 person-years)

Take-Away Message: Projects and Timelines will change

Teamwork Example: My Current Project

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The Completed NEOSSat Spacecraft

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In India before launch


Launch – 25 February 2013


Some NEOSSat Test Images

“First light” Image

Asteroid 2012 TC4

Various well-known astronomical targets


Recent NEOSSat Image


NEOSSat took an image of the RadarSat Satellites just after their launch in June 2019

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Teamwork in Your Project

+

-U1

5

6

7

C2100

n

TL082

4

R910k

R851k

R10

330k

+12V

+12V

RCS10CTransmitter

+12V

GND

5

1

6

Circular PlasticConnector

+12V

R12

10k

R11

510

+

-U1

3

2

1TL082

+15V

8

4

R522k

R451k

R3330

k

+15V

+12V

R710k

R6510

R24k7

IRFZ30

IRFZ30

+12V

7812 C110u25V

+

R1100

k

R13

82k

9

GRN

BLU

BLK

RED

+15V

AUX Input(Grip Enable)

ESTOP

AntennaOutput

Q1

Q2

D1

D2 DIP Switch Settings:3,7 Closed

Others open

D3

RP1

330k

+12V

D4

RP2

1M0

+12V

1N4007

1N4007 C3100

n

- Voltage regulator toaccept 15 Vdc system

voltage

- Comparators withhysteresis needed

- Correct input levelsto RF unit

- Correct connectorpinouts to Unit that I also

built

"Simple_design_by_one_individual"

B0

Transmitter Chip Set

TransmitDelay

Counter(Tx_Delay_Ctr)

TransmitBlock IDCounter

(Tx_Block_ID_Ctr)4-Bit Magnitude

Comparator

TransmitController

Transmit Block Selector

Transmitter Multiplexer

32 + Strobe

32 + Strobe

3

32

32

4

Next_Block

Clear/Disable

5_Blocks

All_Sent

A0

A2

A1

STRBI

RDYI

Clear_Disable

A3

Echo Data (From ReceiverSection)

OTX

'1' '0'

B1 B3

B2

8D0 . .D7D8 . .D39

To/From

Receiver

SectionControl Word Output Enable

ControlWord

3 Rx_Ok , Tx_Enable ,Node_Addressed

Tx_Completed

(2 Additional Strobes for Growth)

ESTOP Out

('A=B')

Phase Lock Loop

Pentium III with Parallel IO card

- Interface Voltage levels- Software Design- CommunicationHandshaking

- Centre Frequency- Tracking Range- Locking Range- Jitter

- Digital Logic / VHDL- Hardware Interface Voltage levels- Firmware/Software Interface Design- Communication Handshaking

Complex Design by Multiple Individuals (like your project!) - Requires a team to complete the job within the “skule” year


Teamwork Requires Communication and Organization

•  All team members work toward the same goal

•  Each member working on separate portions –  In parallel – No duplication of effort

•  Integrated portions will work together correctly – Correct interfaces, functions, and performance


Technical/Business Communication

•  Engineers and engineering companies:

– Create proposals and project summaries – Produce and capture technical designs – Conduct design reviews – Report progress to customers (“Progress reports”) – Present project overviews to clients, conferences

and their management •  Seminars and/or Conference posters

– Give project demonstrations i.e. All of the activities in ECE496 R. Gillett, P.Eng. FEC (2019)


Suppose a team of sculptors work together on a sculpture, each doing a separate part ....

Effective teamwork follows a Design Process

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Effective teamwork follows a Design Process

No Design Process (Ineffective Teamwork)

Effective Teamwork (each sculptor knew how his work needs to fit into the full 'system')

- Same eyes- Same nose- Same mouth- Same ear

Both images have:

So, which team hadbetter sculptors?


System Design Process: “Getting the team to design one solution”

•  A process for developing team-based design Goal → ”Use Cases” → System Requirements → Component Requirements → Detailed Design → Verification (showing you met requirements)

•  The "Goal" is the top level (single sentence) •  The most famous "Goal" statement in history:

- U.S. President J.F. Kennedy, 25 May 1961 -

"... I believe that this nation should commit itself to achieving the goal, before this decade is out, of landing a man on the Moon and returning him safely to the earth".


System Engineering

Goal(or Mission)

- Top level requirements(function andperformance)

- Major modules of system architecture defined- "2nd Tier" requirements generated

- Major modules of subsystem's system, defined within each module- "3rd Tier" requirements generated

The larger and more complex the system, the more 'levels' to define it


System Design Process

Requirements Definition and Design:Going "down" the pyramid- Analyzing the important parameters of the selected approach- Defining architectural building blocks for each level ("design")- Defining/calculating verifiable requirements by modeling theperformance needed to meet higher level needs- Repeat for the next level down

Goal(or Mission)




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System Design Process

Assembly, Integration and Test:Going "up" the pyramid- Verifying that each completed sub-element will function/performas required to meet the needs of the higher level element fromwhich it was derived (Requirements verified by Test, Review ofDesign, Inspection, et cetera)- Integrate the sub-elements and verify requirements at the nextlevel up

Goal(or Mission)





Project Example using Requirement-Driven Design

Goal: Use “wall-plug” electrical power to amplify the specified input signal to drive 50Watts rms into a 8-ohm speaker

Input Signal Specification: Approx 80-150 mVrms signal, 40-10,000 Hz, 10kOhm output impedance

“Black Box” [i.e. We must ignore implementation when defining requirements]


Requirements permit a team to design "in parallel“ (Note that the “design” begins with decomposition of requirements)

Pre-Amplifier Stage Requirements: - Input Z: >10kohm - Output Z: < 100 ohm - Gain: 0 to +20 V/V log control -  Output DC Offset: < 1 mV - Frequency Response: -3db at 18kHz, single pole - User Tone Controls: Treble: ±10db notch at 8kHz Mid: ±10db notch at 1kHz Bass: ±10db notch at 150Hz - Power: ± 12 Vdc, < 200 mA

Gain Stage: Requirements: - Input Z: >1kohm - Output Z: < 20 ohm -  Output DC voltage: < 1 mV - Gain: 15 V/V - Clipping at ± 8 Volts - Frequency Response: -3db at 20kHz - Power: ± 12 Vdc, < 500 mA

Output Driver Stage: Requirements: - Input impedance: >1kohm - Gain: 2 V/V - Output type: Class A-B with bias trim ** - Output power: 50 Watts into 8 ohm load - Power Supply: 110 Vac, 60 Hz input, ± 12 Vdc, 700 mA to other circuitry

Requirement-Driven Design

** Not really a pure requirement, because it dictates implementation, but oh well …

Input signal from Electric Guitar: 80 mV rms James Susan David


Example: Final Design

James' circuit Susan's circuit David's circuit

8-ohmspeaker

SignalInput

Power Input(120VAC,

60Hz)

David's circuit 2:1

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Alternate “Final Design” (by another team - totally different)

Lisa's circuit* Anne's circuit* * Subsystem requirements would show different decomposition from those shown earlier

8-ohmspeaker

SignalInput

PowerInput

(120VAC,60Hz)

Steven’s circuit* 1:4


Architecture Trade-off

- Both designs satisfy the Goal and Requirements - Both designs are totally different - Both designs use very different technologies

i.e. Solid-State* Amplifier

i.e. Vacuum Tube Amplifier

(* Ancient terminology meaning “it uses transistors, not vacuum tubes”)


Next Time I See You …

•  Project Planning •  Use of Requirements

– For project success – For your own protection

•  Requirement Verification •  Risks and Risk Mitigation

This is your project, your journey…

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Design Fair (3 nights & final showcase) http://youtu.be/187q3KWycsIasdfcsI

ECE496 Roadmap, Milestones & Deliverables

Sept Nov Jan Dec Mar Feb Apr Oct 2019 2020

Proposal (draft A)

Proposal review meetings

Individual Progress Report

Final Report

Oral Presentations (in tutorials)

Proposal (final version)

Design Fair

Feb

Registration & background research

Design Goal

System Requirements & Design

Design & Test Modules

System Integration & Testing

Proposal (draft B)

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ECE496 Deliverable Weighting

Start Decide What you must Do Do It End

Proj

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Prop

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Rev

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Prog

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fall spring

15% 8% 17%

55%

5% 17%

Dec

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Begin with a good plan …

n  Maps n  Equipment n  Study

terrain n  Avoid

pitfalls

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… to guide the rest of your journey

n  Design n  Implementation n  Testing n  Presentations n  Teamwork

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Support Resources

n  Your administrator n  Your supervisor n  Funding support n  The community

–  Friends of Design (more next week)

Your Supervisor and Administrator

Supervisor Administrator

Students

•  Marking consistency •  Engineering design & project planning •  Effective technical communication

• The ‘expert client’ • Defining the problem •  Getting the technical details ‘right’

ECE496 website (public)

ECE496 website: https://ece496.ece.toronto.edu/ece496.1920 –  Students –  Document Guidelines:

•  Common Guidelines •  Project Proposal Guidelines

–  Schedule (Important dates & deadlines) –  Login[UTORid]

•  Same as project registration system •  For online report submissions, viewing evaluations

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ECE496 website (Internal)

•  UTORid login

Online system for Project registration è

Viewing evaluations è (supervisor and administrator) evaluations Uploading reports è

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Project Funding

Students -> Design Information -> Budget Funding (ECE496 website)

n  Students contribute up to $100 each n  Other sources of funding and resources include:

–  The ECE Department Design Project Fund ($5k total). Students apply for this funding around the time of the Design Review.

–  Funding from CNIB for projects for the visually disabled (up to $300/project)

–  Supervisors may contribute out of their own funds, particularly where the student projects will aid their research.

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Awards / Programs

Students -> Design Information -> Awards (ECE496 website)

n  Gordon Slemon Design Award ($1000) n  CNIB Hochhausen Prize ($1500) n  Centennial Thesis Awards (2) n  Certificates of Recognition/Invitation to Final Showcase n  Other external awards: Dyson, Minerva, etc. Many students get jobs

based on their project!

Project “Adjustments”

n Don’t be afraid to adjust the scope of your project or make major changes (with the blessing of your supervisor) – Many projects are too difficult, many are not

“open-ended” enough or don’t have enough “meat”

n These adjustments are best done now. No major penalty for changes made with good reason even later on

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No supervisor yet ??

Please stay after the lecture for the team forming session

Projects-> Finding Team/Project (on ECE496 website)

Documents

ece496 lecture1 20199 merge · 5 R. Gillett, P.Eng. FEC (2019) ECE496 The Design Process September 2003 Teamwork in Your Project +-U1 5 6 7 C2 100 n TL082 4 R9 10k R8 51k R1 0 330