ECE/CS 352 Digital System Fundamentals © T. Kaminski & C. Kime 1

ECE/CS 352 Digital Systems Fundamentals

Spring 2001

Chapter 4 – Part 3

Tom Kaminski& Charles R. Kime

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 2

Overview of Chapter 4• Types of Sequential Circuits

• Storage Elements– Latches

– Flip-Flops

• Sequential Circuit Analysis– State Tables

– State Diagrams

• Sequential Circuit Design– Specification

– Assignment of State Codes

– Implementation

– HDL Representation

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 3

Sequential Circuit Analysis

General Model:

The current State at time (t) is stored in an array of flip-flops.

The Next State at time (t+1) is a Boolean function of current state and inputs. The Outputs at time (t) are a Boolean function of current state (t) and (sometimes) current inputs (t).

Combina-tionalLogicStorage

Elements

Inputs

StateNextState

Outputs

CLK

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 4

Example (from Fig. 4-18)

C

D Q

Q'

C

D Q

Q'

y

xA

A'

B

CP

Input: x(t)

Output: y(t)

State: A(t), B(t)

What is the Output Boolean Function?

What is the Next State Boolean Function?

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 5

Example (Fig. 4-18) (Continued)

C

D Q

Q'

C

D Q

Q'

y

xA

A'

B

CP

Next State

Output

Boolean Equations for the functions:

y(t) = x'(t)(B(t) + A(t))

A(t+1) = A(t)x(t) + B(t)x(t)

B(t+1) = A'(t)x(t)

Where are A(t+1) and B(t+1) ?

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 6

Example (Fig. 4-18) (Continued)• Where in time are inputs, outputs and

states defined?

00

0

0

1

1

1

0

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 7

Example (Fig. 4-18) (Continued)• Where in time are inputs, outputs and

states defined?

00

0

0

1

1

1

0

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 8

State Table Characteristics

The State table is a multiple variable function table which shows the following four sections:

Present State -- the values of the state variables for each allowed state.

Input -- the input variable combinations allowed.

Next-state -- the values of the state variables at time (t+1) reached from the present state with the indicated input.

Output -- the value of the output variables as a function of the present state and (sometimes) indicated input.

From the viewpoint of a function table the function inputs are: Input, Present State

and the function outputs are: Output, Next State

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 9

Example: State Table (Fig. 4-18)

Present State Input Next State Output A(t) B(t) x(t) A(t+1) B(t+1) y(t)

0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 1 0 1 1 1 1 0 1 0 0 0 0 1 1 0 1 1 0 0 1 1 0 0 0 1 1 1 1 1 0 0

y(t) = x'(t)(B(t) + A(t))

A(t+1) = A(t)x(t) + B(t)x(t)

B(t+1) = A'(t)x(t)

The STATE TABLE can be filled in using the next state and output equations.

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 10

Alternate State Table Format

Present State

Next State x(t)=0 x(t)=1

Output x(t)=0 x(t)=1

A(t) B(t) A(t+1)B(t+1) A(t+1)B(t+1) y(t) y(t) 0 0 0 0 0 1 0 0 0 1 0 0 1 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 0 1 0

y(t) = x'(t)(B(t) + A(t))

A(t+1) = A(t)x(t) + B(t)x(t)

B(t+1) = A'(t)x(t)

An alternate format just shows the next state and output as a function of the current state, but broken out by input.

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 11

State Table CharacteristicsNote: The Boolean state variables consist of a vector of N

bits.

NOT ALL 2N STATES need to be defined!

Similarly: The Inputs and Outputs may have fewer codes than the defined inputs.

Initializing the state variables may be required to set the state vector into a legitimate, initial state.

Example: A system with 10 states requires a minimum of 4 bits (3 bits gives only 8 symbols). BCD coded inputs can have 16 combinations, only 10 of which have meaning.

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 12

State Diagrams

It is sometimes useful to represent the state table in graphic form. To do so, by convention we:

1. Represent each state by a circle with the state name in it, and

2. Represent each state transition with a directed arc from the Present State to the Next State, and

3. Label each directed arc with the Input value which causes the state transition, and

4. Label each directed arc with the Output generated.

The labels on the directed arcs have the format: {Input/Output}.

If the output is only a function of the Present State, we can label the state with the output in this format: {State/Output}.

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 13

State Diagram (Example)

A B0 0

0 1 1 1

1 0

x=0/y=1 x=1/y=0

x=1/y=0

x=1/y=0

x=0/y=1

x=0/y=1

x=1/y=0

x=0/y=0

This can get confusing as the sequential circuit grows in size.

For small sequential circuits, it is usually easier to understand than the state table.

Try Drawing These: Count mod 4 Toggle FF

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 14

Flip-Flop Input FunctionsThe D-Flip-Flop was a easy case to analyze since it only has one

input. Other FFs such as the JK and SR have two inputs

Convention:

First Letters designate the FF input function.

Second Letters (or subscript) designate the state variable.

JK-FF Example with Two FF's:

JA = B KA = B'x' JB = x' KB = Ax' + A'x Example 4-18 (Two D-FF Example):

DA = Ax + Bx DB = A'x y = (A + B)x'

Notice "DA" is not "DA". Notice that "y" is an output variable

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 15

Analysis with Other Flip-Flops

With a D Flip-Flop: Next state is obtained directly from the flip-flop input

equations.

With a JK, T or SR Flip-Flop:

1. Obtain the binary values of each flip-flop input equation in terms of present state and input variables.

2. Use the corrresponding flip-flop characteristic table from Table 4-1 to determine the next state.

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 16

Characteristic Tables (Review 4-1)

J K Q(t+1) Comment

0 0 Q(t) No change

0 1 0 Clear Q

1 0 1 Set Q

1 1 Q'(t) Complement Q

S R Q(t+1) Comment

0 0 Q(t) No change

0 1 0 Clear Q

1 0 1 Set Q

1 1 ? Indeterminate

T Q(t+1) Comment

0 Q(t) No change

1 Q'(t) Complement Q

D Q(t+1) Comment

0 0 Clear Q

1 1 Set Q

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 17

JK Flip-Flop Circuit Analysis

C

J Q

Q'K

x A

B

CP C

J Q

Q'K

J A

KA

J B

KB

First Step:

Write the Boolean expression for each Flip-Flop input.

For Flip-Flop "A"

JA = Bx' KA = B

For Flip-Flop "B"

JB = x' KB = Ax

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 18

JK Flip-Flop Analysis (Cont.)

Now using the diagram, or equations, fill in the Flip-Flop inputs.

Present State

Input Next State

Flip-Flop Inputs

A B x A B JA KA JB KB 0 0 0 0 0 1 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

JA = Bx' KA = BJB = x' KB = Ax

C

J Q

Q'K

x A

B

CP C

J Q

Q'K

J A

KA

J B

KB

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 19

JK Flip-Flop, Next State

PresentState

Input NextState

Flip-FlopInputs

A B x A B JA KA JB KB0 0 0 0 1 0 0 1 00 0 1 0 0 0 10 1 0 1 1 1 00 1 1 0 1 0 11 0 0 0 0 1 11 0 1 0 0 0 01 1 0 1 1 1 11 1 1 0 1 0 0

J K Q(t+1) Comment

0 0 Q(t) No change

0 1 0 Clear Q

1 0 1 Set Q

1 1 Q'(t) Comp. Q

Now using JK Characteristic Equations, the current state from the table, and the J and K inputs, fill in the Next State for each flip flop. QA(t) = 0; JA =0; KA = 0; Implies QA(t+1) = 0 (No Change).

QB(t) = 0; JB =1; KB = 0; Implies QB(t+1) = 1 (Set Q).

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 20

JK Flip-Flop, Next State

PresentState

Input NextState

Flip-FlopInputs

A B x A B JA KA JB KB0 0 0 0 1 0 0 1 00 0 1 0 0 0 0 0 10 1 0 1 1 1 1 1 00 1 1 0 0 0 1 0 11 0 0 1 1 0 0 1 11 0 1 1 0 0 0 0 01 1 0 0 0 1 1 1 11 1 1 0 1 0 1 0 0

J K Q(t+1) Comment

0 0 Q(t) No change

0 1 0 Clear Q

1 0 1 Set Q

1 1 Q' (t) Comp. Q

Fill in the rest of the table using the JK values and current state to predict the next state.

Question: What is the Output Function?

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 21

Review: Sequential Circuits

A Sequential Circuit has: Current State: The current state at time (t) is stored

in an array of flip-flops.

Inputs: The input at time (t) is externally applied to the sequential circuit.

Next State Function: The next state at time (t+1) is a Boolean function of current state and inputs.

Output Funtion: The output is a Boolean function of current state at time (t) and (sometimes) inputs.

State Tables or State Diagrams are used to concisely represent the Sequential Circuit behavior.

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 22

Moore and Mealy Models

Moore Model Named after E.F.

Moore. Outputs are a function

ONLY of states. Usually specified on the

states.

Mealy Model Named after G. Mealy Outputs are a function of

Inputs AND States. Usually specified on the

state transition arcs.

(Mealy): Maps (Inputs X State) to Output

(Moore): Maps States to Output

Sequential Logic, or Sequential Machines are also called Finite State Automata. Two formal models exist:

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 23

Moore and Mealy Example

0 1

x=1/y=1

x=1/y=0

x=0/y=0

x=0/y=0

State Diagram: (Mealy Model)

Maps: (Inputs X State) to Output

State Diagram: (Moore Model)

Maps: States to Output

1/0 2/1

x=1x=1

x=0

x=0

x=1

x=0

0/0

ECE/CS 352 Digital System Fundamentals Chapter 4 Page 24

Moore and Mealy Example Tables

Present State

Next State x=0 x=1

Output x=0 x=1

0 0 1 0 0 1 0 1 0 1

Present State

Next State x=0 x=1

Output

0 0 1 0 1 0 2 0 2 0 2 1

State Table: (Mealy Model)

Maps: (Inputs X State) to Output

State Diagram: (Moore Model)

Maps: States to Output