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LABORATORY MANUAL ELECTRONICS LABORATORY I
EE 317
© DR S. SOCLOF August 17, 2006
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
CALIFORNIA STATE UNIVERSITY, LOS ANGELES
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CONTENTS
USEFUL KEYBOARD SHORTCUTS FOR MICRO-CAP 2
1 RECTIFIERS 1.1 Half-Wave Rectifier 3 1.2 Half-Wave Rectifier With R-C Filter 5
2 BJT VOLTAGE TRANSFER CURVES 2.1 Vo versus VIN Voltage Transfer Curve 7 2.2 Vo versus VBE Voltage Transfer Curve 11 2.3 Saturation Voltage versus Vcc 12
3 COMMON-EMITTER AMPLIFIER 3.1 Voltage Gain 13 3.2 Effect of Input Signal Level on Output Voltage 15 3.3 Effect of Load Resistance, RL, on Voltage Gain 16 3.4 Effect of Source Resistance, RS, on Voltage Gain 17 3.5 Frequency Response 18
4 THE BJT AS A SWITCH 4.1 Time Domain Response – Effect of Load Resistance. 19 4.2 Time Domain Response: Effect of Load Capacitance 20 4.3 Time Domain Response: Effect of Input Drive 21 4.4 Time Domain Response: Effect of Input Reverse Drive 22
5 JUNCTION FIELD-EFFECT TRANSISTORS 1 MEASUREMENT OF JFET PARAMETERS 5.1.1 Measurement of JFET IDSS 23 5.1.2 Measurement of the Pinch-Off Voltage ( VP ) 24
2 JFET BIASING 5.2.1 Source Biasing Resistor, RS 27 5.2.2 Drain Load Resistor, RD 29
3 COMMON-SOURCE AMPLIFIER 5.3.1 Voltage Gain 31 5.3.2 Effect of Input Signal Level on the Output Voltage 32 5.3.3 Effect of Source Bypass Capacitor on the Voltage Gain 33 5.3.4 Effect of Signal Source Resistance on the Voltage Gain 35
6 MOS FIELD-EFFECT TRANSISTORS 1 MOSFET CHARACTERISTICS 6.1.1 MOSFET Transfer Curve 37 6.1.2 VDS versus VGS, and Voltage Gain 41 6.1.3 Dynamic Drain-to-Source Resistance 43
2 MOSFET COMMON-SOURCE AMPLIFIER 6.2.1 Biasing 45 6.2.2 Common-Source Amplifier 47 6.2.3 Voltage Gain 49 6.2.4 Effect of Input Signal Level 50 6.2.5 Voltage Gain – Effect of Signal Source Resistance 51
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USEFUL KEYBOARD SHORTCUTS FOR MICRO-CAP . ANALYSIS ALT + 1 : Transient Analysis ALT + 2 : A-C Analysis (Frequency Response) ALT + 3 : D-C Analysis ALT + 4 : Dynamic D-C Analysis F3: Schematic Window F9: Analysis Limits F2: Run Analysis F8: Cursor Mode in Analysis Window Ctrl + E: Select Mode Ctrl + T: Text Mode Ctrl + W: Straight Wire Mode
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HALF-WAVE RECTIFIER EXPERIMENT 1.1 1. Set up this half-wave rectifier circuit.
Run the simulation using these Transient Analysis Limits and obtain this graph.
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HALF-WAVE RECTIFIER EXPERIMENT 1.1 Compare the curves on the oscilloscopes for the actual circuit with the results of the simulation. How does the peak value of the output voltage compare with the peak amplitude of the input voltage? Measure the D-C value of the output and compare it with the expected values of
VDC = (1/π ) VPEAK
2. Reduce the input voltage amplitude to 1V.
Run the simulation using these Transient Analysis Limits and obtain this graph.
Compare the curves on the oscilloscopes for the actual circuit with the results of the simulation. How does the peak value of the output voltage compare with the peak amplitude of the input voltage?
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HALF-WAVE RECTIFIER EXPERIMENT 1.2 Part 2: Half-Wave Rectifier with R-C Filter. Set up this half-wave rectifier circuit.
Run the simulation using these Transient Analysis Limits.
Activate the Stepping as shown here.
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HALF-WAVE RECTIFIER EXPERIMENT 1.2
Compare the curves on the oscilloscopes for the actual circuit with the results of the simulation.
Compare the R-C time constant τ = RL • CL with the period for the above curves.
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BJT VOLTAGE TRANSFER CURVES EXPERIMENT 2.1 Part 1: Vo versus VIN Voltage Transfer Curve
Obtain a graph of the VTC as shown below. For Vin use a Function Generator set to produce a triangular waveform going between 0 and +2V at 10 kHz.
This example is for the case of β = 100. What is the value of VCE(SAT) ?
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BJT VOLTAGE TRANSFER CURVES EXPERIMENT 2.1 Using a simulation program, produce a graph similar to that shown above. Transistor Q1 is a Generic model with these parameters:
Here are the Analysis Limits that I used in MicroCap for the above graph.
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BJT VOLTAGE TRANSFER CURVES EXPERIMENT 2.1 Here are curves for various values of the transistor current gain, β.
To generate these curves, the value of β is stepped from 50 to 200 in increments of 50, as shown here.
Change RBB to 100 KΩ. Obtain a Voltage Transfer Curve similar to the one shown below, which is for the case of β = 100. From the slope of the Voltage Transfer Curve, find the value of the current gain, β. Note that the slope of the Voltage Transfer Curve is
SLOPE = dVc/dVin = d(Ic • Rc) / d (IB • RB ) = (RC/RB) • dIC/dIB = β • (RC/RB)
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BJT VOLTAGE TRANSFER CURVES EXPERIMENT 2.1
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BJT VOLTAGE TRANSFER CURVES EXPERIMENT 2.2 Part 2: Vo versus VBE Voltage Transfer Curve Using this circuit obtain a graph of the VC versus VBE similar to that shown below.
Here are the Analysis Limits for above graph
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BJT VOLTAGE TRANSFER CURVES EXPERIMENT 2.3 Part 3: Saturation Voltage versus Vcc
Using this circuit, obtain a graph of the saturation voltage versus Vcc. For Vcc use a Function Generator.
Find the transistor Saturation Region resistance, RSAT for VCC = +10V. Here are the Analysis Limits used for the graph.
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COMMON EMITTER AMPLIFIER EXPERIMENT 3.1 Part 1: Voltage Gain Set up this circuit. Use the closest value resistors that you have available.
Check the D-C voltage levels. They should be close to these values obtained by using the Dynamic D-C Analysis.
Run the simulation using the Transient Analysis. You should obtain something similar to this.
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COMMON EMITTER AMPLIFIER EXPERIMENT 3.1
Here are the Transient Analysis Limits used to generate the above graph.
Compare results on the oscilloscope with this and find the voltage gain, AV.
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COMMON EMITTER AMPLIFIER EXPERIMENT 3.2 Part 2: Effect of Input Signal Level on Output Voltage Set up Stepping on the Transient Analysis Limits as shown here.
Run the analysis to obtain this.
Compare this with the actual results shown on the oscilloscope. At what input signal level does the waveform become substantially distorted. When the waveform is heavily distorted, compare the collector voltage levels with the expected values for cutoff and saturation.
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COMMON EMITTER AMPLIFIER EXPERIMENT 3.3 Part 3: Effect of Load Resistance, RL, on Voltage Gain Set up Stepping on the Transient Analysis Limits as shown here. Use a resistance substitution box for RL.
Run the analysis to obtain this graph.
Compare this with oscilloscope results.
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COMMON EMITTER AMPLIFIER EXPERIMENT 3.4 Part 4: Effect of Source Resistance, RS, on Voltage Gain Set up the circuit as shown here. Use a resistance substitution box for Rs.
Set up Stepping on the Transient Analysis Limits as shown here.
Run the analysis to obtain this.
Compare this with oscilloscope results.
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COMMON EMITTER AMPLIFIER EXPERIMENT 3.5 Part 5: Frequency Response
Run a frequency response analysis for the above circuit using these AC Analysis Limits:
You should obtain a graph like this.
Compare the gain at f=10 kHz, with that obtain with the actual circuit.
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BJT AS A SWITCH EMITTER AMPLIFIER EXPERIMENT 4.1 1. Time Domain Response – Effect of Load Resistance. Set up this circuit. Here are the Transient Analysis Limits and the resulting graph.
Observe the actual time-domain response on the oscilloscope and compare with the results of the simulation. Measure the HIGH-to-LOW propagation delay time, tPD(H-L) and the LOW-to-HIGH propagation delay time, tPD(L-H) . The propagation delay time is the time from the mid-point of the input transition to the mid-point of the output transition.
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BJT AS A SWITCH EMITTER AMPLIFIER EXPERIMENT 4.2 2. Time Domain Response: Effect of Load Capacitance. Set up this circuit. Use a capacitor substitution box for CL. Here are the Transient Analysis Limits and the resulting graph.
Observe the actual time-domain response on the oscilloscope and compare with the results of the simulation. Measure the HIGH-to-LOW propagation delay time, tPD(H-L) and the LOW-to-HIGH propagation delay time, tPD(L-H) .
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BJT AS A SWITCH EMITTER AMPLIFIER EXPERIMENT 4.3 3. Time Domain Response: Effect of Input Drive
Set up this circuit. Here are the Transient Analysis Limits and the resulting graph.
Observe the actual time-domain response on the oscilloscope and compare with the results of the simulation.
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BJT AS A SWITCH EMITTER AMPLIFIER EXPERIMENT 4.4 4. Time Domain Response: Effect of Input Reverse Drive
Set up this circuit. Here are the Transient Analysis Limits and the resulting graph.
Observe the actual time-domain response on the oscilloscope and compare with the results of the simulation. Adjust both the signal amplitude and D-C offset of the function generator.
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MEASUREMENT OF JFET PARAMETERS EXPERIMENT 5.1.1
Part 1 Measurement of JFET IDSS Set up this circuit in the simulation program and on the proto-board. Use the 2N5458 JFET (or whatever other JFET that is available).
Run a Dynamic D-C Analysis to find the node voltages as in this example.
Find the value of IDSS, which is the drain-to-source current, IDS, when VGS = 0. In this example
IDSS = (20V – 15.5V) / 1KΩ = 4.5V / 1 KΩ = 4.5 mA Make voltage measurements on the actual circuit. Calculate IDSS. Compare the value of IDSS with the manufacturer’s specifications.
2N5458
2N5458
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MEASUREMENT OF JFET PARAMETERS EXPERIMENT 5.1.2 Part 2 Measurement of the Pinch-Off Voltage ( VP ) Set up this circuit in the simulation program and on the proto-board.
For the Battery use these values. Set the SLIDER MAX to 5V.
Select Options/Preferences from the Menu bar and then choose Preferences from the drop-down list.
Activate (i.e. check) Show Slider.
2N5458
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MEASUREMENT OF JFET PARAMETERS EXPERIMENT 5.1.2
Run a DYNAMIC D-C analysis. With the VGG Slider all of the way down to make VGG = -5V you should get something like this.
In this case with VGS = VGG = -5V, the channel between drain and source is pinched off, so IDS = 0 and therefore VDS = VDD = 20V. Now select the battery, VGG by clicking on it. Use the down arrow key to move the slider up, making VGG smaller in magnitude. Decrease the magnitude of VGG until the voltage at the drain of the JFET first starts to drop below 20V, as shown in this example.
2N5458
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MEASUREMENT OF JFET PARAMETERS EXPERIMENT 5.1.2
Now the channel between drain and source is now no longer pinched off, and current starts to flow through the transistor. Now move the slider one step down to again produce a pinch-off condition as shown in this example.
We can now deduce that the pinch voltage, VP for this JFET is between –2.3V and –2.2V. Perform a similar measurement on the actual circuit by starting with VGG = 0, and gradually increasing it until the voltage at the JFET drain starts to decrease below VDD = +20V. Compare the measured value of VP with the manufacturer’s specifications.
2N5458
2N5458
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JFET BIASING EXPERIMENT 5.2.1 Part 1 Source Biasing Resistor, RS Set up this circuit in the simulation program and on the proto-board.
Make sure that Show Slider is enabled in Preferences.
Move the slider to make RS = 0, as shown here.
Activate the Dynamic D-C Analysis to get the voltage measurements.
2N5458
2N5458
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JFET BIASING EXPERIMENT 5.2.1
Using the up/down arrow keys, slowly increase the value of RS to make IDS = IDSS/2, which corresponds to an operating point in the middle of the Active Region. Since IDSS = 4.5 mA in this example, we need to get IDS = IDSS/2 = 2.25 mA. This corresponds to
VD = VDD – IDS • RD = 20V – 2.25 mA • 1 KΩ = 20V – 2.25V = 17.75V
That condition is shown here.
Thus, in this example, an RS = 340 Ω will result in IDS = IDSS/2 = 2.25 mA. Perform an equivalent operation on the actual circuit using the combination of a resistance substitution box and fixed resistors to determine the required value of RS.
2N5458
2N5458
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JFET BIASING EXPERIMENT 5.2.2 Part 2: Drain Load Resistor, RD Now we will determine the value of RD for to an operating point near the middle of the Active Region. For that we need to approximately one-half of VDD dropped across the JFET and approximately one-half of VDD across RD. For that we need to increase the value of RD as shown here where the range of RD has been increased to 5 KΩ.
We now obtain this.
Using the up/down arrow keys, slowly increase the value of RD to make VD = VDD/2 = 10V, which corresponds to an operating point in the middle of the Active Region. That situation is shown here.
2N5458
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JFET BIASING EXPERIMENT 5.2.2
This, for this example a value of RS = 340 W and RD = 4.4 KW will result in an operating point that is close to the middle of the Active Region. Perform an equivalent operation on the actual circuit using the combination of a resistance substitution box and fixed resistors to determine the required value of RD.
2N5458
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JFET COMMON-SOURCE AMPLIFIER EXPERIMENT 5.3.1 Part 1 Voltage Gain Set up this circuit in the simulation program and on the proto-board.
Use these Transient Analysis Limits.
Run the Analysis.
Test the circuit and observe the results on the oscilloscope. Compare the results as seen on the oscilloscope with the simulation. Compare the voltage gain of the actual circuit with that obtained from the simulation.
2N5458
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JFET COMMON-SOURCE AMPLIFIER EXPERIMENT 5.3.2 Part 2 Effect of Input Signal Level on the Output Voltage Set up this circuit in the simulation program and on the proto-board.
Use these Transient Analysis Limits.
Run the Analysis.
Test the circuit and observe the results on the oscilloscope. Compare the results as seen on the oscilloscope with the simulation. What causes the clipping on the positive going swing of the output voltage? What causes the clipping on the downward going swing of the output voltage?
2N5458
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JFET COMMON-SOURCE AMPLIFIER EXPERIMENT 5.3.3 Part 3 Effect of Source Bypass Capacitor on the Voltage Gain Set up this circuit in the simulation program and on the proto-board.
Use these A-C Analysis Limits.
Here are the Stepping Settings.
Run the Analysis.
2N5458
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JFET COMMON-SOURCE AMPLIFIER EXPERIMENT 5.3.3
Measure the gain of the circuit at 10 kHz and at 100 Hz for the three values of Cs as shown above. Compare the results from the actual circuit with the simulation.
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JFET COMMON-SOURCE AMPLIFIER EXPERIMENT 5.3.4 Part 4 Effect of Signal Source Resistance on the Voltage Gain Set up this circuit in the simulation program and on the proto-board.
Use these A-C Analysis Limits.
2N5458
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JFET COMMON-SOURCE AMPLIFIER EXPERIMENT 5.3.4 Here are the Stepping Settings.
Run the Analysis.
Test the circuit. Compare the voltage gain at 1 KHz, 10 kHz, and 100 kHz for the case of R1 = 0 and R1 = 10 MΩ with the results of the simulation.
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MOSFET CHARACTERISTICS EXPERIMENT 6.1.1 Part 1: MOSFET Transfer Curve Set up this circuit in the simulation program and on the proto-board.
Specify a 2N2700 MOSFET as the model in the Value box.
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MOSFET CHARACTERISTICS EXPERIMENT 6.1.1 Insert these model parameters.
Use these D-C Analysis Limits.
Run the Analysis.
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MOSFET CHARACTERISTICS EXPERIMENT 6.1.1
From the actual circuit take current and voltage measurements to draw a curve of ID versus VGS. Compare the results with the simulation. Add a second plot to the D-C Analysis Limits.
Here is an expanded view of the equation for the second plot.
Run the Analysis.
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MOSFET CHARACTERISTICS EXPERIMENT 6.1.1
Test the circuit and observe the results on the oscilloscope. Compare the results as seen on the oscilloscope with the simulation.
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MOSFET CHARACTERISTICS EXPERIMENT 6.1.2
Part 2 Voltage Transfer Curve, VDS versus VGS, and Voltage Gain Set up this circuit in the simulation program and on the proto-board.
Use these D-C Analysis Limits.
Here are the Stepping Settings.
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MOSFET CHARACTERISTICS EXPERIMENT 6.1.1 Run the Analysis.
Test the circuit and observe the results on the oscilloscope. Compare the results as seen on the oscilloscope with the simulation. Set RD to 500 Ω, and deactivate the Stepping. Then run the Analysis. Activate the measurement cursor (F8). Set the left cursor at about 14V, and then right cursor to around 6V as shown here.
The A-C small-signal voltage gain, AV for a D-C operating point (Q-point) at around VD = 10V is the slope of the curve. In this example AV = -30.85. Observe the results on the oscilloscope, and compare the results as seen on the oscilloscope with the simulation.
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MOSFET CHARACTERISTICS EXPERIMENT 6.1.3 Part 3 Dynamic Drain-to-Source Resistance Set up this circuit in the simulation program and on the proto-board.
Use these D-C Analysis Limits.
Run the Analysis.
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MOSFET CHARACTERISTICS EXPERIMENT 6.1.3
Test the circuit and observe the results on the oscilloscope. Compare the results as seen on the oscilloscope with the simulation. Calculate the Dynamic Drain-to-Source Resistance using the voltage division relationship:
VD = VDS • rds / ( rds + RD ) Do this for VGS = 4V, 5V and 10V, and compare the results obtained from the oscilloscope with the simulation.
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MOSFET COMMON-SOURCE AMPLIFIER EXPERIMENT 6.2.1 Part 1 Biasing Set up this circuit in the simulation program and on the proto-board.
Under Preferences/Common Options enable Show Slider.
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MOSFET COMMON-SOURCE AMPLIFIER EXPERIMENT 6.2.1 The circuit should now look like this.
Activate the Dynamic D-C Analysis. Select RS and move the slider using the mouse, or the up/down arrow keys, to obtain a voltage at the drain of the MOSFET of close to VD = 10V. That situation is shown here.
Vary RS in the actual circuit to obtain a voltage at the drain of the MOSFET of close to VD = 10V. Compare the value of RS with the simulation.
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MOSFET COMMON-SOURCE AMPLIFIER EXPERIMENT 6.2.2 Part 2 Common-Source Amplifier Set up this circuit in the simulation program and on the proto-board.
Use these A-C Analysis Limits.
Run the Analysis.
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MOSFET COMMON-SOURCE AMPLIFIER EXPERIMENT 6.2.2
Compare the gain, AV in the middle-frequency region with that obtained previously from the voltage transfer curve. Now use these Transient Analysis Limits.
Run the Analysis. Test the circuit and observe the results on the oscilloscope. Compare the results as seen on the oscilloscope with the simulation.
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MOSFET COMMON-SOURCE AMPLIFIER EXPERIMENT 6.2.3 Part 3 Voltage Gain Set up this circuit in the simulation program and on the proto-board. Use these Transient A-C D-C Analysis Limits. Here are the Stepping Settings. Run the Analysis.
Test the circuit and observe the results on the oscilloscope. Compare the results as seen on the oscilloscope with the simulation. Compare the voltage gain, AV obtained from the simulation with that obtained from the actual circuit.
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MOSFET COMMON-SOURCE AMPLIFIER EXPERIMENT 6.2.4 Part 4 Effect of Input Signal Level Now use these Transient Analysis Limits.
Here are the Stepping Settings.
Run the Analysis.
Test the circuit and observe the results on the oscilloscope for signal amplitudes of 100 mV, 200 mV, 400 mV and 800 mV. Compare the results as seen on the oscilloscope with the simulation. How do the clipping levels compare with the expected values?
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MOSFET COMMON-SOURCE AMPLIFIER EXPERIMENT 6.2.5 Part 5 Voltage Gain – Effect of Signal Source Resistance Set up this circuit in the simulation program and on the proto-board.
Use these A-C Analysis Limits.
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MOSFET COMMON-SOURCE AMPLIFIER EXPERIMENT 6.2.5 Here are the Stepping Settings.
Run the Analysis.
For the actual circuit, set the input signal amplitude to 100 mV. For each of the values of the signal source resistance, RO, find the maximum gain, and the frequency at which the gain is down by a factor of the square root of 2 to 0.7071 • AV(MAX). Compare these results with the simulation.
