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ELG4157: Digital Control Systems
Discrete Equivalents
Z-Transform
Stability Criteria
Steady State Error
Design of Digital Control Systems
1
Advantages and Disadvantages
• Improved sensitivity.
• Use digital components.
• Control algorithms easily
modified.
• Many systems inherently
are digital.
• Develop complex math
algorithms.
• Lose information during
conversions due to
technical problems.
• Most signals continuous
in nature.
Digitization
• The difference between the continuous and digital systems is that
the digital system operates on samples of the sensed plant rather
than the continuous signal and that the control provided by the
digital controller D(s) must be generated by algebraic equations.
• In this regard, we will consider the action of the analog-to-digital
(A/D) converter on the signal. This device samples a physical signal,
mostly voltage, and convert it to binary number that usually consists
of 10 to 16 bits.
• Conversion from the analog signal y(t) to the samples y(kt), occurs
repeatedly at instants of time T seconds apart.
• A system having both discrete and continuous signals is called
sampled data system.
• The sample rate required depends on the closed-loop bandwidth of
the system. Generally, sample rates should be about 20 times the
bandwidth or faster in order to assure that the digital controller will
match the performance of the continuous controller.
3
4
Digital Control System
ADC Micro
Processor DAC
Correction
Element Process
Clock
Measurement
+
-
A D D A
A: Analog
D: Digital
5
Continuous Controller and Digital Control
Gc(s) Plant R(t) y(t)
Continuous Controller
+
-
A/D Digital
Controller
D/A and
Hold Plant
D/A
+ -
r(t)
Digital Controller
y(t) r(kT) p(t)
m(t) m(kT)
6
Applications of Automatic Computer
Controlled Systems
• Most control systems today use digital computers
(usually microprocessors) to implement the controllers).
Some applications are:
• Machine Tools
• Metal Working Processes
• Chemical Processes
• Aircraft Control
• Automobile Traffic Control
• Automobile Air-Fuel Ratio
• Digital Control Improves Sensitivity to Signal Noise.
7
Digital Control System • Analog electronics can integrate and differentiate signals. In order
for a digital computer to accomplish these tasks, the differential
equations describing compensation must be approximated by
reducing them to algebraic equations involving addition, division,
and multiplication.
• A digital computer may serve as a compensator or controller in a
feedback control system. Since the computer receives data only at
specific intervals, it is necessary to develop a method for describing
and analyzing the performance of computer control systems.
• The computer system uses data sampled at prescribed intervals,
resulting in a series of signals. These time series, called sampled
data, can be transformed to the s-domain, and then to the z-domain
by the relation z = ezt.
• Assume that all numbers that enter or leave the computer has the
same fixed period T, called the sampling period.
• A sampler is basically a switch that closes every T seconds for one
instant of time.
8
r(t) r*(t)
Continuous Sampled
Sampler
r(T)
r(2T)
r(3T)
r(kT)
r(4T)
0 T 2T 3T
T 2T 3T
4T
4T
Zero-order
Hold
Go(s)
P(t)
s
ee
sssG
sTsT
111
)(0
D/A A/D Computer Process
Measure
r(t) c(t) e(t)
－
e*(t) u*(t) u(t)
Sampling analysis
Expression of the sampling signal
Modeling of Digital Computer
)()()()()()()(*
00
kTtkTxkTttxttxtx
kk
T
10
Analog to Digital Conversion: Sampling
An input signal is converted from continuous-varying
physical value (e.g. pressure in air, or frequency or
wavelength of light), by some electro-mechanical device
into a continuously varying electrical signal. This signal has
a range of amplitude, and a range of frequencies that can
present. This continuously varying electrical signal may
then be converted to a sequence of digital values, called
samples, by some analog to digital conversion circuit.
• There are two factors which determine the accuracy with which the
digital sequence of values captures the original continuous signal: the
maximum rate at which we sample, and the number of bits used in
each sample. This latter value is known as the quantization level
11
Zero-Order Hold
• The Zero-Order Hold block samples and holds its input for the specified sample period.
• The block accepts one input and generates one output, both of which can be scalar or vector. If the input is a vector, all elements of the vector are held for the same sample period.
• This device provides a mechanism for discretizing one or more signals in time, or resampling the signal at a different rate.
• The sample rate of the Zero-Order Hold must be set to that of the slower block. For slow-to-fast transitions, use the unit delay block.
12
The z-Transform The z-Transform is used to take discrete time domain signals into a complex-
variable frequency domain. It plays a similar role to the one the Laplace
transform does in the continuous time domain. The z-transform opens up new
ways of solving problems and designing discrete domain applications. The z-
transform converts a discrete time domain signal, which is a sequence of real
numbers, into a complex frequency domain representation.
0
0
0
0
)()()}({
1)(
)()}(*{)}({
)()}(*{
have wes, transformLaplace the Using0, signal aFor
)( )()(*
k
k
k
k
sT
k
ksT
k
zkTfzFtfZ
z
zzU
zkTrtrZtrZ
ez
ekTrtr
t
kTtkTrtr
13
Transfer Function of Open-Loop System
Zero-order
Hold Go(s) Process
r(t) T=1 r*(t)
3678.03678.1
2644.03678.0)(
)1
111(1)( :fraction partial into Expanding
)1(
1)()()(
)(*
)(
)1(
1)( ;
)1()(
2
2
2
zz
zzG
sssesG
ss
esGsGsG
sR
sY
sssG
s
esG
st
st
po
p
st
o
14
n
iTa
i
n
n
n
iez
zKzXThen
as
K
as
K
as
K
asasas
A(s)X(s)If
1
2
2
1
1
21
)( :
)())(( :
Example: TT ez
z
ez
z
z
z
sssZ
sss
sZ
2
515
1
10
2
5
1
1510
)2)(1(
)4(5
Z-Transform
Z-transform method: Partial-fraction expansion approaches
Inverse Z-transform method: Partial-fraction expansion approaches
n
i
kTai
TaTaTaTaTa
i
n
eKkTXthen
es
zK
ez
zK
esezez
A(z)X(z)If
1
21
)( :
)())(( :
2121
Example: kT
TT
T
eez
z
z
zZ
ezz
ezZkTx 2
2
1
2
21 1
1))(1(
)1()(
16
Closed-Loop Feedback Sampled-Data Systems
G(z) r(t) R(z) E(z) Y(z)
Y(z)
)()(1
)()(
)(1
)()(
)(
)(
zDzG
zDzG
zG
zGzT
zR
zY
G(z) R(z) E(z) Y(z)
Y(z)
D(z)
17
Now Let us Continue with the Closed-Loop System for the
Same Problem
54321
23
2
2
2
147.14.14.13678.0)(
6322.06322.12
2644.03678.0
)6322.0)(1(
)2644.03678.0()(
1)( :input stepunit aan Assume
6322.0
2644.03678.0
)(1
)(
)(
)(
zzzzzzY
zzz
zz
zzz
zzzY
z
zzR
zz
z
zG
zG
zR
zY
Stability • The difference between the stability of the continuous
system and digital system is the effect of sampling rate
on the transient response.
• Changes in sampling rate not only change the nature of
the response from overdamped to underdamped, but
also can turn the system to an unstable.
• Stability of a digital system can be discussed from two
perspectives:
• z-plane
• s-plane
18
19
Stability Analysis in the z-Plane
A linear continuous feedback control system is stable if all poles of the
closed-loop transfer function T(s) lie in the left half of the s-plane.
In the left-hand s-plane, 0; therefore, the related magnitude of z
varies between 0 and 1. Accordingly the imaginary axis of the s-plane
corresponds to the unit circle in the z-plane, and the inside of the unit
circle corresponds to the left half of the s-plane.
A sampled system is stable if all the poles of the closed-loop transfer
function T(z) lie within the unit circle of the z-plane.
Tz
ez
eez
T
TjsT
)(
1
Re
Im z-plane
Stable zone
The graphic expression of the stability
condition for the sampling control systems
The stability criterion
In the characteristic equation 1+GH(z)=0, substitute z with
1
1
s
sz —— Bilinear transformation
We can analyze the stability of the sampling control systems the same as we did
in chapter 3 (Routh criterion in the s-plane) .
)( ) (
101 0
)1(
2
)1(
1
1
1
1
1
1
1
: , , :
2222
2222
22
z-planele of the unit circinside theethe s-planofft halffor the le
yxyx
yx
yj
yx
yx
jyx
jyx
jyx
jyx
z
zjs
thenjyxzjwsupposeProof
The Stability Analysis
Unstable zone
Critical stability
0368.0368.1
632.01)(1
2
zz
KzzG
Determine K for the stable system
Solution:
0)632.0736.2(264.16320 0368.0368.1
632.01
2
KsKs.
zz
Kz
K
KK.
nh criteriof the RoutIn terms o
632.0736.2
264.1
632.0736.26320
:
We have: 0 < K < 4.33
1
1
s
szMake
The Stability Analysis
22
Example: Stability of a closed-loop system
Gp(s)
r(t) Y(t) Go(s)
gain. of valuesallfor stable
is continuous thegain where increasedfor unstable is system sampledorder -Second
39.2 0 :for stable is system This
unstable)( )295.1115.1( )295.1115.1(012.3310.22
10 When circle,unit e within thlie roots thebecause stable is system The
0)6182.05.0)(6182.05.0(6322.02 ;1
0)1(2 :0G(z)][1
equation theof roots theare (z)function t transfer loop-losed theof poles The
)1(2
)(
3678.03678.12
)2644.03678.0()(;
)1()(
K
jzjzzz
K
jzjzzzK
KbKazazaz
azaz
bazK
zz
zKzG
ss
KspG
Example
23
The Steady State Error Analysis
)(1
)(
)(1
)()()()()()(
zG
zR
zG
zGzRzRzczRzE
G(s) r c
－
e
*
2
*
*
11
1
1
)(1
)()1(lim)()1(lim
a
v
p
zzss
K
T
K
T
K
zG
zRzzEze
)()1(lim ;)1(
)1()( )(
)()1(lim ;)1(
)( )(
)(lim ;1
)()(1)(
2
1
*
3
22
1
*
2
1
*
zGzKz
zzTzRttr
zGzKz
TzzRttr
zGKz
zzRttr
za
zv
zp
)()1(lim1
zEzez
ss
)5()( 1
ss
KsGsT
2) If r(t) = 1+t, determine ess=？
1) Determine K for the stable system.
Solution
5
2555)1(
)5()1(
)5(
1)(
2
2
s
K
s
K
s
K
Ze
ss
KZe
ss
K
s
eZzG
Ts
Ts
Ts
1)
)0067.0)(1(
2135.02067.2
5
25
1
5
)1(
5)1(
2
1
52
1
zz
zzK
ez
Kz
z
Kz
z
KTz
z
T
T
r －
G (s) c
Z.O.H e
Example
0)4202.2067.10()1.5739.993(0.9932 1
1
0)2135.00335.0()0335.52067.2()5(
0)0067.0)(1(
2135.02067.2
51)(1
:system theofequation sticcharecteri The
2
2
KwKws
sz
KzKz-K
zz
zzKzG
16.40 K
2)
KK
T
K
T
Ke
Kz
zzKzGzK
zz
zzKzGK
vp
ss
zzv
zzp
5
2.00
1
1
2.0)0067.0(
2135.02067.2
5lim)()1(lim
)0067.0)(1(
2135.02067.2
5lim)(lim
1T**
2
11
*
2
11
*
Steady State Error and System Type
1) For unity feedback in figure below,
2)
30
Design of Digital Control Systems
The Procedure:
• Start with continuous system.
• Add sampled-data system elements.
• Chose sample period, usually small but not too small.
Use sampling period T = 1 / 10 fB, where fB = B / 2 and
B is the bandwidth of the closed-loop system.
– Practical limit for sampling frequency: 20 ˂ s / B ˃40
• Digitize control law.
• Check performance using discrete model or SIMULINK.
31
32
Start with a Continuous Design
D(s) may be given as an existing design or by using root
locus or bode design.
G(z) r(t) R(z)
E(z)
Y(z)
Y(z)
D(z)
33
Add Samples Necessary for Digital Control
• Transform D(s) to D(z): We will obtain a discrete system with a similar behavior to the continuous one.
• Include D/A converter, usually a zero-order-device.
• Include A/D converter modeled as an ideal sampler.
• And an antialiasing filter, a low pass filter, unity gain filter with a sharp cutoff frequency.
• Chose a sample frequency based on the closed-loop bandwidth B of the continuous system.
34
Closed-Loop System with Digital Computer Compensation
b
aK
B
ACeBeAzDsGZ
Bz
AzCzD
bs
asKsG
zz
zzDzG
z
zzD
KrzzG
rz
zkzD
zzzGT
sssGp
zDzE
zU
zDzG
zDzGzT
zR
zY
bTaTcc
1
1 ;;);()}({;)( ;)(
240.01
7189.05.0)()( ;
240.0
7189.0359.1)(
. and parameters two thehave and 3678.0at )( of pole cancer the We
)(
)3678.0()(select weIf ;
3678.01
0.7189z0.3678)(1; when
)1(
1)(
plant a and holdorder -zero a with systemorder second heConsider t
)()(
)( iscomputer theoffunction tranfer The
)()(1
)()()(
)(
)(
35
Compensation Networks (10.3; page 747) The compensation network, Gc(s) is cascaded with the unalterable process
G(s) in order to provide a suitable loop transfer function Gc(s)G(s)H(s).
G(s) R(s)
Gc(s) + -
H(s)
Y(s)
Compensation
network lead-phase a called isnetwork thep,zWhen
rcompensatoorder First)(
)()(
)(
)(
)(
1
1
ps
zsKsG
ps
zsK
sG
c
N
ji
M
ii
c
j
-z -p
36
Closed-Loop System with Digital Computer Compensation There are two methods of compensator design:
(1) Gc(s)-to-D(z) conversion method, and
(2) Root locus z-plane method.
The Gc(s)-to-D(z) Conversion Method
0 when 1
1 ;;
transform)-(z )()}({
)Controller (Digital )(
r)CompensatoOrder -(First )(
sb
aK
B
ACeBeA
zDsGZ
Bz
AzCzD
bs
asKsG
bTaT
c
c
The Frequency Response
The frequency response of a system is defined as the
steady-state response of the system to a sinusoidal input
signal.
The sinusoid is a unique input signal, and the resulting
output signal for a linear system, as well as signals
throughout the system, is sinusoidal in the steady-state; it
differs form the input waveform only in amplitude and
phase.
37
Phase-Lead Compensator Using Frequency Response
A first-order phase-lead compensator can be designed using the frequency
response. A lead compensator in frequency response form is given by
In frequency response design, the phase-lead compensator adds positive phase to
the system over the frequency range. A bode plot of a phase-lead compensator
looks like the following
Gc s( )1 s
1 s p
1
z
1
m z p sin m
1
1
Phase-Lead Compensator Using Frequency Response
Additional positive phase increases the phase margin and
thus increases the stability of the system. This type of
compensator is designed by determining alfa from the
amount of phase needed to satisfy the phase margin
requirements.
Another effect of the lead compensator can be seen in the
magnitude plot. The lead compensator increases the gain of
the system at high frequencies (the amount of this gain is
equal to alfa. This can increase the crossover frequency,
which will help to decrease the rise time and settling time of
the system.
Phase-Lag Compensator Using Root Locus
A first-order lag compensator can be designed using the root locus. A lag
compensator in root locus form is given by
where the magnitude of z is greater than the magnitude of p. A phase-lag
compensator tends to shift the root locus to the right, which is undesirable. For this
reason, the pole and zero of a lag compensator must be placed close together
(usually near the origin) so they do not appreciably change the transient response
or stability characteristics of the system.
When a lag compensator is added to a system, the value of this intersection will be
a smaller negative number than it was before. The net number of zeros and poles
will be the same (one zero and one pole are added), but the added pole is a
smaller negative number than the added zero. Thus, the result of a lag
compensator is that the asymptotes' intersection is moved closer to the right half
plane, and the entire root locus will be shifted to the right.
Gc s( )s z( )
s p( )
Lag or Phase-Lag Compensator using Frequency Response
A first-order phase-lag compensator can be designed using the frequency
response. A lag compensator in frequency response form is given by
The phase-lag compensator looks similar to a phase-lead compensator, except
that a is now less than 1. The main difference is that the lag compensator adds
negative phase to the system over the specified frequency range, while a lead
compensator adds positive phase over the specified frequency. A bode plot of a
phase-lag compensator looks like the following
Gc s( )1 s
1 s
42
Example: Design to meet a Phase Margin Specification Based on Chapter 10 (Dorf): Example 13.7
differ! would)( oft coefficien the theperiod, sampling for the lueanother vaselect weIf
)73.0(
)95.0(85.4)(4.85; and 0.73,e ,95.0
have Wesecond. 0.001 Set
).(by realized be tois )(r compensato theNow
5.6. Then rad/s. 125 When
1)( yield order toin select We
)312(
)50()(;312 and ;50 ;
10.18). (Eq 6.25 is ratio zero-pole required that thefind we10.4,on Based
10.24). (Eq 2 ismargin phase that thefind we),( of diagram Bode theUsing
10.10). (Fig rad/s 125frequeny crossover a with 45 ofmargin phase a
achieve that weso )(design attempt to will We.)125.0(
1740)(
0.312-05.0
2
1
o
co
zD
z
zzDCBeA
T
zDsG
K
jωGGK
s
sKsGbaab
sG
sGss
sG
c
c
c
cc
p
cp
43
The Root Locus of Digital Control Systems
D(z)
Zero
Order
hold
KGp(s) R(s)
+
-
Y(s)
okozDzKGzDzKGzDzKG
zDzKGzDzKG
zDzKG
zR
zY
360180)()( and 1)()(or 0)()(1 4.
axis. real horizontal therespect to with lsymmetrica is locusroot The 3.
zeros. and poles ofnumber oddan ofleft the toaxis real theofsection aon lies locusroot The 2.
zeros. the toprogresses and poles at the starts locusroot The 1.
K varies. as system sampled theofequation sticcharacteri for the locusroot Plot the
equation) istic(Character 0)()(1 ;)()(1
)()(
)(
)(
44
Re {z}
Im {z}
2 poles at
z = 1
0 -1
One zero
At z = -1
-3 -2
Root locus
1;3;0)(
)()1(
)1(
for solve and Let
0)1(
)1(1)(1
21
2
2
d
dF
FK
Kz
z
zKzKG
Unit circle
K increasing
Unstable
SystemOrder Second a of LocusRoot
45
Design of a Digital Controller
plane.-z on the circleunit in thepoint with desired aat
rootscomplex ofset a
give willsystem dcompensate theof locus that theso b)-(zSelect
plane.-z theof
axis real positive on the lies that G(z)at pole one cancel toa)-(z Use
)(
)()( controller aselect willwe
method, locusroot a utilizing response specified a achieve order toIn
bz
azzD
46
Example: Design of a digital compensator
0.8.Kfor stable is system theThus
0.8. at circleunit on the is locusroot The
-2.56.z aspoint entry obtain the we),(for equation theUsing
)2.0)(1(
)1()()( have we
0.2, and 1 select weIf
)()1(
))(1()()(
)(Select system. unstable have we1,)(With
13.8. Examplein described as is )(when
system stable ain result that willD(z)r compensato adesign usLet
2
K
F
zz
zkzDzKG
ba
bzz
azzKzDzKG
bz
azzDzD
sGp
47
origin. at the isequation sticcharacteri theofroot the1,KWhen
plane.- theof axis real on the lie wouldlocusroot Then the
)1()98.0)(1(
)1()()(
thatso 0.98- and 1 selectingby locusroot the
improve would we,inadequate wereeperformanc system theIf
z
z
K
zz
zKzDzKG
ba
48
+1 0.2 -1
Unit circle
K=0.8
Im{z}
Re{z}
K increasing
Entry point at
z = -2.56
Root locus
49
P13.10 Dorf
0.55. isovershoot The .6843.04641.0 are poles the119.5,n Whe(f)
5661.0092.1
1982.02759.0)( 75; When(e)
75. find we0.3, ofovershoot maximum and 1for 13.19 Figure Using(d)
239. is of valuemaximum method, locusroot Using(c)
03679.0368.1
0026.00037.01 isequation sticcharacteri system loop-closed The (b)
3679.0368.1
0026.00037.0)()(function transfer The (a)
)(;1.0;)10(
1)(
2
2
2
jzK
zz
zzTK
KT/τ
K
zz
zK
zz
zKzDzG
KzDTss
sGp
50
P13.11 Dorf
150;999.0;993.0
1
1;;
999.0
993.0150)( :0.01)( method )( to)( Use(d)
3.155;99.0;9324.0
1
1;;
99.0
9324.03.155)( :0.1)( method )( to)( Use(b)
.01.0 and 30% are input) ramp a(for
error trackingstate-safety andovershoot system dcompensate The
150. and 0.1, 0.7, select may wePlot, Bode usingBy
)( (a)
01.007.0
01.0007.0
CeBeA
b
aK
B
ACeBeA
z
z
Bz
AzCzDTzDsG
CeBeA
b
aK
B
ACeBeA
z
z
Bz
AzCzDTzDsG
ePO
Kba
bs
asKsG
bTaT
c
bTaT
c
ss
c
