Embedded Systems7763B

Mt Druitt College of TAFEElectrical Engineering

Lesson 4 Interrupts, The Stack

Mike Stacey 2008 2

Interrupts [1]

• Interrupts are external or internal asynchronous hardware events that cause the microcontroller to branch away from the normal program flow to answer an immediate need– eg. occasional events (every 10mS).

Inefficient for uP to poll for an event.– application examples: keyboard, printer, disk.– IRQ: interrupt request

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Early Batch Systems

• Initially (1940s and 50s), computing systems ran in batch mode.– One user was allocated a block of time and all of that

time was allocated to that user’s program.– Operating systems were mainly involved in providing

efficient transition between jobs and organisation of the FIFO job queue.

• Timesharing or multitasking is when multiple tasks are each allocated a time slice and tasks rotated in and out of execution. At the end of each time slice, the OS stores the job’s state ready for the next allocation of time.

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Interrupts [2]

• IRQ causes uP to save its state of execution via a context switch, and begin execution of an interrupt handler.

• Only one CPU and multiple processes so CPU must be shared

• Parallel execution illusion• Actually, multiple tasks are executing serially• Scheduling: determines which task runs at a particular

time• Scheduling strategies are many and varied and are

implemented by the Operating System.• Interrupts have the power to override the scheduling

algorithm and demand immediate attention

The act of switching from one state to the next

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Round Robin Scheduling

Some examples of P1, P2, P3 etc would be?

CPU executing

P1

P2P3

P4

P5

P6P7

P8

2 time units

2 time units 2 time

units

2 time units

2 time units

2 time units

2 time units

2 time units

Run process for one time slice then move it to back of job queue, load next process into memory, execute it...

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Interrupts and the Stack

• If a process or hardware device requires immediate attention, it can interrupt the usual scheduling strategy and the uP will service the interrupting program or device

• So that the program that is interrupted can resume execution at the same place after the interrupt is serviced, the uP must save its current state

• The Stack is an area of memory that is used for this.

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The Stack

• The following quoted from the 8535 data sheets page 8: “During interrupts and subroutine calls, the return address Program Counter (PC) is stored on the stack. The stack is effectively allocated in the general data SRAM and consequently, the stack size is only limited by the total SRAM size and the usage of the SRAM. All user programs must initialize the SP in the reset routine (before subroutines or interrupts are executed). The 10-bit stack pointer (SP) is read/write-accessible in the I/O space”.

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Stack allocation in SRAM data space

Stack pointer normally set to the highest address in data memory. As items are added to the stack, the stack pointer decrements.

ldi temp,low(ramend)out spl,templdi temp,high(ramend)out sph,temp

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How does Stack pointer code work?

ldi temp,low(ramend)out spl,temp

ldi temp,high(ramend)out sph,temp

Stack pointer high byte (02)

Stack pointer low byte (02)

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Stack Push and Pop Operations

• The following quoted from the 8535 data sheets page 29: “The Stack Pointer must be set to point above $60. The Stack Pointer is decremented by 1 (8 bits stored) when data is pushed onto the stack with the PUSH instruction and it is decremented by 2 (16 bits stored) when an address is pushed onto the stack with subroutine calls and interrupts. The Stack Pointer is incremented by 1 when data is popped from the stack with the POP instruction and it is incremented by 2 when an address is popped from the stack with return from subroutine RET or return from interrupt RETI.”

• See and follow the operation of sample programs: es_stack_ops.asm and es_stack_subroutinecalls.asm

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Stack Push Code

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The Stack (see page 20 8535 data sheet)•2 stack operations: push and pop

•Follows the LIFO principle

•Push() adds an element to the top of the stack

•Pop() removes (returns) the top most element.

•Application: sub-routine calls, interrupt handling, temp. data storage

•Requires a stack pointer to keep track of the address of the top element

•Stack pointer is incremented after Pops and decremented after Pushes

Stack pointer

The stack pointer points to the top of the stack. This is the highest address allocated for the stack.

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The Stack [2]

0008

0006

0008

0008

Two 16 bit elements pushed on stack. Stack pointer = 0006 0008

On element popped. Stack pointer = 0008

One 16 bit element pushed on stack. Stack pointer = 0008

Empty Stack. Stack pointer points to highest address allocated for stack. As elements are added, it decrements. SP = 000A

1234

1234

4567

1234

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Atmel 90S8535 interrupts (page 20 8535 data sheet)

• 16 interrupt vectors plus RESET

• When interrupt occurs:– uCtrlr branches to the address for the

interrupt– executes the programmer defined interrupt

service routine– just like a sub routine except the service

routine is can be called by the occurrence of a hardware event

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90S8535 Interrupt Sequence1. The interrupt occurs (external signal or internal event)2. The microcontroller completes the current instruction cycle (this

causes the time to respond to the interrupt to vary depending on how far through the current cycle the processor is when the interrupt occurs – interrupt latency)

3. The contents of the Program Counter (the next instruction to be executed after the interrupt service routine) is stored on the stack.

4. The microcontroller branches to an assigned address, which must hold either the program code written to service the interrupt.

5. Upon completion of the interrupt service routine, the microcontroller returns to the program code that was being executed when the interrupt occurred. The microcontroller retrieves and puts in the program counter the continuation address from the stack which was previously saved when the interrupt started .

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Interrupt Control [1]

• The program must control when and in what order (if more than one interrupt event occurs) interrupts are to be processed

• The interrupts must be enabled for the interrupts to function – set interrupt enable bits in a control register – In the Atmel 90S8535, the Input/Output registers

GIMSK (General Interrupt Mask register) and TIMSK (Timer/counter Interrupt Mask register) are used to control interrupts. (see page 25,26 of the 8535 data sheet)

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Interrupt Control [2]

• One additional bit, the Global Interrupt Enable, must also be set for any interrupts to operate. This bit is in effect a master interrupt enable which is used to enable/disable all interrupts which have been enabled by having their respective control bits set high.

• In the Atmel 90S8535 the Global Interrupt Enable bit is found in bit 7 of the status register SREG (see page 19 of 8535 data sheet).

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• See – C:\Program Files\Atmel\AVR Tools\AvrAssembler\Appnotes– for definitions and equates for the relevant chip

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Interrupts and the addresses assigned for interrupt service routines (interrupt handlers)

from ATMega8515 data sheet page 54

download from http://www.atmel.com/dyn/products/datasheets.asp?family_id=607#760

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Inside the m8515def.inc file.equ INT0addr=$001 ;External Interrupt0 Vector Address.equ INT1addr=$002 ;External Interrupt1 Vector Address.equ ICP1addr=$003 ;Input Capture1 Interrupt Vector Address.equ OC1Aaddr=$004 ;Output Compare1A Interrupt Vector Address.equ OC1Baddr=$005 ;Output Compare1B Interrupt Vector Address.equ OVF1addr=$006 ;Overflow1 Interrupt Vector Address.equ OVF0addr=$007 ;Overflow0 Interrupt Vector Address.equ SPIaddr =$008 ;SPI Interrupt Vector Address.equ URXCaddr=$009 ;UART Receive Complete Interrupt Vector

Address.equ UDREaddr=$00a ;UART Data Register Empty Interrupt Vector

Address.equ UTXCaddr=$00b ;UART Transmit Complete Interrupt Vector

Address.equ ACIaddr =$00c ;Analog Comparator Interrupt Vector AddressWe can use “OVFOaddr” to set the interrupt service routine (interrupt handler)

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Interrupt Coding Example [1].include "m8515def.inc“; Interrupt service vectors.org $0000rjmp Reset ;Reset vector.org OVF0addrrjmp timer_0_int ;T/C0 overflow vector for counter 0.

Counter 0 is an 8 bit internal hardware counter and can be configured to generate an interrupt whenever it over flows.

For example: we may configure the counter to begin counting at 00h. We the start the counter and when it hits FFh it will send an interrupt signal to the uP.

When the uP receives the interrupt, it will save the address of the next instruction on the stack and branch to the assigned address (0007h) to execute the interrupt handler. See slide 15 for the rest of the process.

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Interrupt Programming

• Programming to use interrupts in assembly code requires special attention. Since it is not possible to know which part of the program is executing when an interrupt occurs, it is very important that the interrupt service routines must leave all registers exactly as they were before the interrupt took over the program execution. Therefore, most interrupt service routines:

• Begin with a series of push instructions to save all the registers used by the interrupt service routine; and

• End with a corresponding series of pop instructions to restore the same registers.

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Interrupt Coding Example [2]

; interrupt service routinetimer_0_int:

push r16push r17push r18ldi r16, SREGout TCNT0, r17com r18out PortB, r18pop r16pop r17pop r18reti

Body of interrupt routine. This will happen whenever the counter overflows.

Save the current state of registers

Restore previous state of registers

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Stack Example

INSTRUCTION STACK POINTER (SP)

STACK CONTENTS

R16 R17 R18 R19 R20 R21

LDI R16, $12 025F EMPTY 12 PUSH R16 025E 12 12 LDI R17, $34 025E 12 34 PUSH R17 025D 34 12 34 LDI R18, $56 025D 34 12 56 PUSH R18 025C 56 34 12 56 POP R19 025D 34 12 56 POP R20 025E 12 34 POP R21 025F EMPTY 12