UN Department of EN Time Allowed: 2 Hours INSTRUCTIONS TO CANDID 1. This paper contains 4 questio 2. This examination accounts fo marks each and marks assign 3. This is a closed book examin 4. Answer ALL questions. This NIVERSITY OF MORATUWA Faculty of Engineering f Electronic & Telecommunication Engineering B.Sc. Engineering Semester 2 Examination N 1802 – BASIC ELECTRONICS No DATES ons on 4 Pages. or 70% of the module assessment. Each question ned for each section are included in square brack nation. Space is Intentionally Left Blank ovember 2011 n carry 25 kets.
UNIVERSITY OF MORATUWADepartment of Electronic &
Telecommunication EngineeringEN Time Allowed: 2 Hours INSTRUCTIONS
TO CANDIDATES 1.This paper contains 4 questions on 2.This
examination accounts for 70% of the module assessment. marks each
and marks assigned for each section are included in square 3.This
is a closed book examination.4.Answer ALL questions. This Space is
Intentionally Left Blank UNIVERSITY OF MORATUWA Faculty of
Engineering Department of Electronic & Telecommunication
Engineering B.Sc. Engineering Semester 2 Examination EN 1802 BASIC
ELECTRONICS November INSTRUCTIONS TO CANDIDATES questions on 4
Pages. This examination accounts for 70% of the module assessment.
Each question carry 25 marks assigned for each section are included
in square bracketsbook examination. This Space is Intentionally
Left Blank November 2011 Each question carry 25 brackets. Question
1 1.1Drawthediodecharacteristics(Vregion, reversed biased
region1.2A photo diode is connected in The photo diode has a
reversed biased leakage current of
2Aatdaytime.Neglectingthecurrentdracomparator threshold level
1.3A18VzenerdiodeDanda500
Q1.2.Thecurrentthroughthezenerdiode(Iproperoperation.Themaximumpowerratingofthezecurrent
is kept at 3mA constant.Find the that ensure the proper operation
of the Question 2 2.1Astudentwantstodesignacombinationallogic and
B, 1 select pin S, and 1 output pin ZS is set to 0, the student
wants the circuit to behave as set to 1, he wants the circuit to
behave as an OR gate. (a)Draw the truth table for the combinational
circuit.wthediodecharacteristics(V-I)curveandclearlymarktheforwardbiased
region, reversed biased region, and the break down region.diode is
connected in series with a 10 K resistor as shown in The photo
diode has a reversed biased leakage current of 20 A at night time
and Neglectingthecurrentdrawnbythecomparator,determine comparator
threshold level VT to detect day and night. Figure Q1.1
anda500resistorRareconnectedasshowncurrentthroughthezenerdiode(Iz)hastobegreaterthan
Themaximumpowerratingofthezeneris486mW. mA constant.Find the
minimum and the maximum source voltagproper operation of the
voltage stabilizer. Figure Q1.2
Astudentwantstodesignacombinationallogiccircuitwhichhas2inputpinsA,
B, 1 select pin S, and 1 output pin Z as shown in Figure Q2.1.When
the select pin to 0, the student wants the circuit to behave as a
XOR gate.If the select pin Sto 1, he wants the circuit to behave as
an OR gate. Figure Q2.1 Draw the truth table for the combinational
circuit. )curveandclearlymarktheforwardbiased [5 Marks] resistor as
shown in Figure Q1.1.A at night time and 100
wnbythecomparator,determinethe [10 Marks] connectedasshowninFigure
than1mAforits mW.Theload aximum source voltage [10 Marks]
circuitwhichhas2inputpinsA, .When the select pin a XOR gate.If the
select pin S is [5 Marks] Page 3 of 4(b) Write the min term
expression for the output Z.[5 Marks] (c)Use Karnaugh Map to
simplify the combinational logic.[5 Marks] (d) Design the
combinational circuit using 1 AND gate, 1 XOR gate, and 1 OR gate
only.[5 Marks] 2.2Design a positive edge D Flip flop using a
SRLatch (with EN Pin), a negativeedge detection circuit, and 2 NOT
gates only.[5 Marks] Question 3
3.1HowisaBipolarJunctionTransistorbiased?Whataretheconfigurationtypesofa
BJT?Explain one configuration with a suitable diagram(s). [6 Marks]
3.2What is meant by Q-Point? What is the significance of it and
explain how you would find this? [5 Marks] 3.3Determine the load
line without using characteristic curves[6 Marks]
3.4Forthecircuitgivenbelow,answerthefollowingquestions:AssumeSilicon
Transistor. (a)If IC= 1.2 mA, what is VCE?(b) If VCE=11.5 V, what
is IC? [8 Marks] Question 4 1.Briefly describe one method of JFET
Biasing with suitable diagrams.[5 Marks] 2.Give five comparisons
between BJT and a JFET. [5 Marks] +20V+6V4k 2k+V24VQ1220k4.7k Page
4 of
43.ExplaintheoperationofaN-channelJFETwithsuitablediagrams(s)and
mathematical expressions. [6 Marks] 4.The following JFET has
IDSS=11mA and VP=4.4V. Compute ID and VDS when VGS= -1.2V. Assume
that the JFET is biased in the pinch-off region.
