SEQUENTIAL DIGITAL CONTROL AND DATA ACQUISITION

ET 438bDepartment of Technology Southern Illinois University Carbondale

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DIGITAL CONTROL OF ANALOG SYSTEMS

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Set point

Error

Controller

SensorsFeedback

PlantControlOutput

-

+

Summing (error generation)Integration (integral control)Differentiation (derivative control)Amplification (proportional control)

Analog Controllers

Controller implemented with analog electronics (OP AMPS)

DIGITAL CONTROL OF ANALOG SYSTEMS

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Digital Controllers

Analog-to-Digital

Converter

Controller

Digital–to- Analog

ConverterPlant

Control Output

SensorsFeed Back

Setpoint

+

-

Error

CharacteristicsAnalog Inputs and outputsContinuous signals converted to digital valuesController - Implemented with microprocessor System control variable modified by mathematical functions + - x /Result converted to analog signal by digital-to-analog conversion

ADVANTAGES AND CHALLENGES OF DIGITAL PROCESS CONTROL

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Advantages

Can implement complex control algorithms along with P-I-DSoftware-based controller Direct input of digital sensors

Challenges

Need Analog-to-Digital (A/D) Conversion- World is analogHigh speed sampling required for rapidly changing signalsPrecision of converted value. Infinite number of values mapped to a finite number of bitsMust reconstruct most signals to analog for output to analog world. Need DAC (digital-to-analog converters)

OVERVIEW OF THE DATA ACQUISITION PROBLEM

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Use computers to gather data, process data, and control system: Higher level control

Monitored Systems

Computer System with data acquisition

Analog Output

sDACs

Analog InputsADCs

Digital In/Out

Application Program

Transducers

(Sensors)Signal

ConditioningAnalog Input Signals

Analog Output Signals

Digital Signal

Conditioning

OVERVIEW OF THE SEQUENTIAL CONTROL PROBLEM

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Control of a staged processes with discrete steps.

Examples around the home

Washing Machines

Dishwashers

Time-driven sequentialprocesses

Cloths Dryers

All processes driven by timingof the events

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OVERVIEW OF THE SEQUENTIAL CONTROL PROBLEM

Event-Driven Sequential Processes

Next step of process can not take place until an external event occurs

Robotic Arms

Motion sequence depends of position of mechanical part

Sensors are switches thatIndicate position

Examples

CONTROL PROGRAMMING AND DATA ACQUISITION USING LABVIEW

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LabVIEW is a graphical programming language that allows rapid development of programs that:

Read analog input signal data

Process and store data

Display data and system status

Read switch input (digital) signal data

Write analog output signals

Write digital output signals for on/off control

LABVIEW EXAMPLE

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Compact Florescent Light Testing Controller Analog

inputs read lamp

currentsDigital outputs

control lamp operation

Plot monitors lamp voltage

over time

Analog samples processed to

give RMS V and I values

LABVIEW PROGRAMMING ENVIRONMENT

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LabVIEW is a graphical programming environment

Create user interface

here

Front Panel

Block Diagram

(back panel

Create program

here

Controls and Indicators

Palette

Palette changes to programming functions when you click on block diagram

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LABVIEW PROGRAMMING ENVIRONMENT

Tool Palette

Program Control

Run/Stop Pause

Operate Value

PointerText

WiringDebug Tools

LABVIEW PROGRAMMING ENVIRONMENT

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In LabVIEW Input variables = controls Output variables = indicators

Numeric Controls

Numeric Indicators

BooleanControls

BooleanIndicato

rs

LABVIEW PROGRAMMING ENVIRONMENT

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Other data types in LabVIEW

Integers(Signed and Unsigned) I32 I16 I8 U32 U16 U8

ArraysCollect data of the same type. 1-D and multi-D Indexing begins at 0

ClustersCollect data of dissimilar data types. Only include indicators or controls

Data Structures in LabVIEW Programming

StringsArrays of characters

LABVIEW PROGRAMMING ENVIRONMENT

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Data Types and Structures in LabVIEW Programming

Array of Float Point

Array Icon

Integer I32 and U32

Integer Icons

String Control

String Icon

Array of Integers

Integer Array Icon

Cluster

Cluster

LABVIEW PROGRAMMING STRUCTURES

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FOR Loop – Repeats enclosed instructions for a predetermined amount of iterations (N)

WHILE Loop – Repeats enclosed instructions until stop condition is met

Index, i, in both structures holds current iteration number

Graphical Programming Structures

StopConditio

n

LABVIEW PROGRAMMING STRUCTURES

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IF-THEN/CASE Executes enclosed based on logical test (TRUE/FALSE) or Index (CASE)

Graphical Programming Structures

Logical test connects

here

TRUE condition executes these items

FALSE condition executes these items

LABVIEW PROGRAMMING STRUCTURES

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Computed nodes, when written code is simpler

MathScript Node Write code in syntax similar toMatlab. Define I/O variable. Allows error checking from other blocks.

Error inError Out

Formula Node Write code in syntax similar toC . Define I/O variable likeMathScript

PROGRAMMING IN LABVIEW

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Define Input/Output Variables and Design User

Interface

Define and/or Select Data

Collection and Control Channels

and Tasks

Program Functionality

Control and Data Acquisition Programming

PROGRAMMING STEPS

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Define the I/O and design the interface

Place the programming blocks on back panel

Wire the programming blocks on back panel to make a functional program

See more programming examples on the course website and in D2L

DEVELOPING DATA ACQUISITION AND CONTROL PROGRAMS IN LABVIEW

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Overview of Data Acquisition and Control Program Structure

HardwareNI-6024NI 6221

Measurement and Automation

Explorer

LabVIEW Program

Define I/O Tasksand channels

DATA ACQUISITION IN LABVIEW

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Define Types of Signals to Measure

Connecting to the outside world with Measurement and Automation Explorer (MAX)

Analog input signalsTransducer inputs (V, I)Digital inputs signalsBinary inputs Switches

Create Measurement

Channels and Tasks Using (MAX)

Analog input signalsDifferential, Ground Referenced Digital inputs signalsPorts (8-bits)Digital lines (1-bit)

Access Channels and Tasks Using

DAQmax in LabVIEW

Analog/Digital Read/Write Single/Multi-sample

DATA ACQUISITION IN LABVIEW

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Reading Analog Inputs Reading Digital Inputs

Access the DAQ functions from the Measurement I/O choice on the programming palette

Polymorphic Virtual Instrument (VI). Click to change nature.

IDEAL OP AMPSet438b-1

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Ideal OP AMP Model

Av = 200,000Ri = 1-2 MWR0 = 75 WI1 = I2 = 80 nAfc=1.5 MHz

Parameters

Idea

Voltage Gain: Av = infiniteInput Resistance: Rin= infiniteOutput Resistance: Ro = 0Input I: I1=I2=0Cutoff Frequency, fc: infinite

Typical (LM741)

Rin Rout

+

-+

-V1

V2

+Vcc

-Vcc

Vo

Vo= Av(V2-V1)

Av

I1

I2

NON-IDEAL OP AMP MODEL

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Non-idea OP AMP parameters and characteristics

Slew rate - maximum rate of change of output voltage for large changes in the input voltage. Typical value - 0.5 V/mS = 500,000 V/s

Output offset voltage - voltage on the output when both of the inputs are grounded. Typical value - 2 mV (LM741)

Gain-Bandwidth Product-rate of frequency roll-off for OP AMP without feedback. Frequency at which the open loop gain of the OP AMP is 1 (0 dB). Typical 1 MHz (LM741) Applies to small signal level changes.

NON-IDEA OP AMP PARAMETERS et438b-1

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Determine the frequency limit due to slew rate limiting.

Assume sine input and determine the rate of voltage change, dV/dt

maxp

maxp

p

p

fV2

dtdv

f2V=dt

dv

)ft2cos()f2V(dt

dv)ft2sin(V = v(t)

Maximum rate of change in sine occurs at t=0, so set t=0 in derivative to find fmax

Example dv/dt = 500,000 V/s , Vp = 10 V

dvdtV

fp2

500 000

2 107958

max

,

( ) Hz

Found in OP AMP

Data Sheets

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NON-IDEA OP AMP PARAMETERS

Gain-Bandwidth Product=GBP

Open loop frequency response

GBP = (Gain)(Input Frequency) = 1 MHz Find max frequency for 20 dB gain: 1 MHz/10(20/20) = 1,000,000/10 = 100 kHzFind max frequency for 40 dB gain: 1 MHz/10(40/20) = 1,000,000/100 = 10 kHzFind max frequency for 60 dB gain: 1 MHz/10(60/20) = 1,000,000/1000 = 1 kHz

1 MHz100 kHz10 kHz1 kHz100 Hz10 Hz

100 dB

Input Frequency

80 dB

60 dB

40 dB

20 dB

Op

en L

oop

Ga

in

IDEAL VOLTAGE COMPARATORSet438b-1

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V1

+Vcc

V2-Vcc

Vo

Open loop OP AMP operation

Ideal Voltage Comparator Operation

Operation Logic

When V1 ≥ V2, Vo = -Vsat

When V2 ≥ V1, Vo = + Vsat

Transition take placeexactly when voltagesare equal

PRACTICAL OP AMP OUTPUT LIMITSet438b-1

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OP AMP outputs typically saturate at 80% of supply voltages ±Vcc

Output Voltage Vo=Av(V2-V1)

0 8 0 8. ( ) . ( ) V V Vcc o ccOutput Range

For a practical OP AMP with Av = 100,000 find the difference voltage that will cause output saturation. (±Vcc = 15 Vdc)

Vd = (V2-V1) so Vo/Vd = Av

0 8

0 8 15

100 0000 12

2 1

. ( )( )

. ( )

,.

V

AV V Vcc

Vd

mV = Vd

NON-IDEAL OP AMP COMPARATORS

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Assume ±15 Vdc = ±Vcc Av = 100,000. so Vsat = 0.8(± Vcc) = 0.8(±15) = ± 12 Vdc

From previous calculation Vd = 0.12 mV

so Vd = V2 - V1 which gives 0.12 mV = V2 - V1

Take V1 as the input voltage

sat021

12

VV then VV + mV 12.0

)VV( = mV 12.

Take V2 as the input voltage012

0122 1

1

. ( )

.

mV =

mV - V2

V V

V

NON-INVERTING COMPARATORS

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Circuit realization with OP AMPs

Logic: When Vin > Vref V0 = +Vsat

If Vin > 5 then V0 = +12 Vdc

+15 Vdc

-15 Vdc

V0

Vin

Vref

V=+10 Vdc 5 kW

5 kW

R1

R2

Find Vref using voltage divider

V VR

R R

V

ref

ref

2

1 2

105000

5000 500010 0 5 5 0( . ) . Vdc

Input/output plot

Vin

V0

-Vsat

+Vsat

-12 Vdc

+12 Vdc

Vref = +5 Vdc

Input to +

NON-IDEAL VOLTAGE COMPARATORS

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Determine the voltage where output transition takes place with V2 as input

V mV

mV V then V = + V2

1 0 sat

012

0121

2

.

.

V

V

V1

+Vcc

Vin-Vcc

Vo

Input/Output Diagram

-Vsat

+Vsat

V2=Vin

V0

0.12 mV

V2=V1

Av < infinity produces small voltage error in comparator circuits

INVERTING COMPARATORS

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Use standard OP AMPs when slow transitions are expected in the input signal. (e.g. thermostat application). When higher speeds are needed use dedicated comparator IC. (LM311)

If Vin > 8 then V0 = -12 Vdc

+15 Vdc

-15 Vdc

Vin

Vref

V=+10 Vdc

2 kW

8 kWR2

R1

Logic: When Vin > Vref V0 = -Vsat

Input to -

V0

Find Vref using voltage divider

V VR

R R

V

ref

ref

2

1 2

108000

8000 200010 0 8 8 0( . ) . Vdc

Input/output plot

Vin

V0

-Vsat

+Vsat

-12 Vdc

+12 Vdc

Vref = +8 Vdc

Controller

SIMPLE DIGITAL CONTROL ON/OFF PROCESS CONTROL

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In on/off control error signal is binary in nature.

Process

Disturbances

Sensor

Final ControlElement

Controlledvariable

Comparator

Signal Conditionin

g

ControllerLogic

Setpoint

Errorsignal

Final control element is run at either 100% or 0%

Comparator is hardware or software that comparesthe sensor value to the desired value (setpoint) and then outputs a binary value

Manipulatedvariable

ON/OFF CONTROL EXAMPLE

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Home heating

Controller

Room

Heat Loss

BimetallicStrip

Furnace

Thermostat

Mechanical Scale

Setting

Fuel/FanElectric Control

Desired Temperature

Errorsignal

Furnacerun time

RoomTemperature

When room temperature falls below a preset temperature, the thermostat contacts activatethe furnace fan and fuel supply.

ON/OFF CONTROL APPLICATION CRITERIA

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1Precise control must not be required

2

Process must have sufficient internal storage capacity to allow final control element to supply the load while measurement is taken.

3Energy entering the load must be small compared to the stored energy in the process

ON/OFF CONTROLLER TIME PLOTS

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Controller output goesto 100% when the temperature falls belowset point value .

Example for furnaceshows furnace on whentemperature falls belowset point of 72 degrees

DIFFERENTIAL GAP CONTROLLER

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To improve the stability of an on/off controller a hysteresis is added to the comparator element This is called differential gap control

Logic - when measured variable goes above upper boundary final control element turns on. Remains on until variable falls below lower level Gap also known as dead zone. Typically 0.5-2.0% of full range.

Gap introduces a known control error but reduces cycling

DIFFERENTIAL GAP CONTROLLER TIME PLOT

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Furnace controller with3 degree differential gap

Temperature below Set=72degrees furnace on. Shut off temperature isSet1=75 degrees.

Controller Logic: IF Room Temp ≤ Set AND Furnace Output= 0 THEN Furnace Output =1 (T ↑) IF Room Temp ≤ Set1 AND Furnace Output= 1 THEN Furnace Output =0 (T↓)

Output depends on temperature and previous output state

COMPARATORS WITH HYSTERESIS

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Implementing Differential Gap Control with Comparators requireshysteresis

Hysteresis - the output depends on the input and the previous state of the output.

Vo

Vin

+

R1=5kR2= 5k

+10V

Inverting Comparator with Hysteresis

Vref

Analysis: assume that Vin < Vref V0 = 0.8Vcc

Vo =+ Vsat = 8 Vdc

Determine Vref from voltage divider formula

Vdc 4k5k5

k58V

RR

RVV

ref

21

2oref

Define this as the upper trip point (UTP)

COMPARATORS WITH HYSTERESIS

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Analysis continued Now assume that Vin > Vref

If Vin > Vref, then V0 = -Vsat = 0 Vdc

When Vin > 0, Vo = 0 Vdc and Vref = 0 Vdc Define as lower trip point (LTP)

Vo

Vin

+

R1=5kR2= 5k

+10V

Vref

Vo= 0 V

Vref = 0 V

Input/output Plot Comparator with Hysteresis

-VsatVin

V0

+10 Vdc

VUTP = +4 Vdc

VLTP= 0 Vdc

+Vs

at

Increasing Vin

Decreasing Vin

COMPARATORS WITH HYSTERESIS

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Vref5V

Vo Vin +

+10V

R11k

R29k

Non-zero voltage referenceUse superposition to find the contributions to V1 from output Vo and Vref.

Circuit Analysis

Assume Vin < V1 V0 = +Vsat = 8 Vdc

Ground Vref and find contribution to V1 due to Vo

V1

Vo= 8 V

V 8.0k9k1

k18

RR

RV'V

21

1o1

Ground V0 and find contribution due to Vref

V VR

R R

k

k kref' ' .12

1 2

59

1 94 5

V

Final value when Vin > V1

V''

Vdc1

V V'

. . .1 1

4 5 0 8 5 3 Upper trip point value (UTP)

VUTP = 5.3 V

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COMPARATOR WITH HYSTERESIS - ANALYSIS

Vref5V

Vo Vin +

+10V

R11k

R29k

Non-zero voltage reference

V1

Vo= 0 V

Assume that Vin > V1 so V0 = -Vsat = 0 V

V VR

R R'1 0

1

1 2

0

Vdc

Since Vo = 0 and Vref is grounded

Vdc 5.4k9k1

k95

RR

RV''V

21

2ref1

Now find contribution due to Vref

Lower trip point value (LTP)

V''

Vdc1

V V'

. .1 1

4 5 0 4 5By Superposition

VLTP = 4.5 V

Hysteresis voltage is the difference between the VUTP

and VLTP. In this case: 5.3 - 4.5 = 0.8 Vdc (hysteresis)

COMPARATOR WITH HYSTERESIS - ANALYSISet438b-1

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Input/output Plot

-Vsat=0

+Vsat=+8 Vdc

Vin

VUTP = 5.3 Vdc

VLTP = 4.5 Vdc

V0

Increasing Vin

Decreasing Vin

Hysteresis voltage is the difference between the Vutp and Vltp. In this case: 5.3 - 4.5 = 0.8 Vdc (hysteresis)

LTPUTPh VVV

Vh

HYSTERESIS COMPARATOR TIME PLOT

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Xa: 0.000 Xb: 0.000 Yc: 5.333 Yd: 4.533

a-b: 0.000 c-d: 800.0m

freq: 0.000

X: 0.000 Offsets Y:-100.00mOffsets

Ref=Ground X=8.33m/Div

Y=voltage

d

c

baV(3)

V(4)

VUTP VLTP

Vin

Vout

Vh

COMPARATORS WITH HYSTERESIS

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Design Equations and Procedure

2R1R

1RV2V

2R1R

2RV

2R1R

1RVV

2R1R

2RV

2R1R

1RVV

sath

refsatLTP

refsatUTP

Design Procedure Given: Vcc, Vh, VUTP, and R1,

1.) Find Vsat 2.) Use Equation 3 to find R23.) Use Equation 1 to find Vref

1

2

3

Assumesbipolar output voltage

DESIGN EXAMPLE

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A temperature sensor has a gain of 20 mV/F. It will be used in an electronic thermostat system. Design a comparator with hysteresis circuit that will give a 4 degree F deadband for the thermostat control around a setpoint temperature of 72 degrees F. The comparator will use bipolar power supplies at +- 5Vdc. Interface the thermostat logic to a transistor driver (2N3904 hfe = 300) that will actuate a furnace control relay. The relay has a dc resistance of 250 ohms.

DESIGN CALCULATIONS

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Vref

Vo Vin +

+ 5 V

R1R2

-5 V

DESIGN CALCULATIONS

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Continued -1-

DESIGN CALCULATIONS

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Continued -2-

Check Centering

DESIGN CALCULATIONS

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Continued -3-

Vref=1.44 V

Vo Vin +

+ 5 V

R1=4.7kR2=582.8k

-5 V

Now include the transistor output stage

DESIGN CALCULATIONS

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D11N4004

Q12N3904

24V

-5V

Vref1.44V

Vin +

+5V Rc250

Rb

R14.7k

R2583k

Find value of Rb to activate relay

Vce(SAT)+-

Vbe(SAT)

+

Find Ic assuming saturation

Ic

DESIGN CALCULATIONS

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D11N4004

Q12N3904

24V

-5V

Vref1.44V

Vin +

+5V Rc250

Rb

R14.7k

R2583k

Vce(SAT)+-

Vbe(SAT)

+

Ic Relate Ic to Ib through hFE (also known as b, dc current gain)

Reduce hFE by a factor of 10 due to effects ofsaturation on dc gain

Apply KVL around the base-to-emitter circuit

Ib

D1 Suppresses

voltage spikes